JPS6358302U - - Google Patents

Info

Publication number
JPS6358302U
JPS6358302U JP15150886U JP15150886U JPS6358302U JP S6358302 U JPS6358302 U JP S6358302U JP 15150886 U JP15150886 U JP 15150886U JP 15150886 U JP15150886 U JP 15150886U JP S6358302 U JPS6358302 U JP S6358302U
Authority
JP
Japan
Prior art keywords
bias
running speed
recording sensitivity
tape running
test signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15150886U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15150886U priority Critical patent/JPS6358302U/ja
Publication of JPS6358302U publication Critical patent/JPS6358302U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は、この考案の実施例を示
すもので、第1図はブロツク図、第2図はフロー
チヤート図である。 1:バイアス録音感度調整回路、2:調整用テ
スト信号発生回路、3:録音部、4:再生部、5
:レベル比較回路、6:基準レベル信号生成回路
、7:キヤプスタンモータ,リールモータ。
1 and 2 show an embodiment of this invention, with FIG. 1 being a block diagram and FIG. 2 being a flow chart. 1: Bias recording sensitivity adjustment circuit, 2: Adjustment test signal generation circuit, 3: Recording section, 4: Playback section, 5
: Level comparison circuit, 6: Reference level signal generation circuit, 7: Capstan motor, reel motor.

Claims (1)

【実用新案登録請求の範囲】 テープレコーダにおけるバイアス,録音感度調
整回路において、 バイアス,録音感度調整時に、テスト信号録音
時のテープ走行スピードと、その録音されたテス
ト信号再生時のテープ走行スピードの内、少なく
ともいずれか一方のテープ走行スピードを可変可
能に構成したことを特徴とするバイアス,録音感
度調整回路。
[Scope of Claim for Utility Model Registration] In a bias and recording sensitivity adjustment circuit in a tape recorder, when adjusting the bias and recording sensitivity, the difference between the tape running speed when recording a test signal and the tape running speed when playing back the recorded test signal. , a bias and recording sensitivity adjustment circuit characterized in that the tape running speed of at least one of the tapes is configured to be variable.
JP15150886U 1986-10-03 1986-10-03 Pending JPS6358302U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15150886U JPS6358302U (en) 1986-10-03 1986-10-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15150886U JPS6358302U (en) 1986-10-03 1986-10-03

Publications (1)

Publication Number Publication Date
JPS6358302U true JPS6358302U (en) 1988-04-19

Family

ID=31068644

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15150886U Pending JPS6358302U (en) 1986-10-03 1986-10-03

Country Status (1)

Country Link
JP (1) JPS6358302U (en)

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