JPS6351642A - Manufacture of compound semiconductor device - Google Patents
Manufacture of compound semiconductor deviceInfo
- Publication number
- JPS6351642A JPS6351642A JP19389886A JP19389886A JPS6351642A JP S6351642 A JPS6351642 A JP S6351642A JP 19389886 A JP19389886 A JP 19389886A JP 19389886 A JP19389886 A JP 19389886A JP S6351642 A JPS6351642 A JP S6351642A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- oxide film
- compound semiconductor
- phosphoric acid
- etchant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 150000001875 compounds Chemical class 0.000 title claims abstract description 23
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000005530 etching Methods 0.000 claims abstract description 28
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 20
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 18
- 239000010407 anodic oxide Substances 0.000 claims description 13
- 238000005406 washing Methods 0.000 claims description 7
- 238000004381 surface treatment Methods 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 abstract description 3
- 239000007788 liquid Substances 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 241000272201 Columbiformes Species 0.000 description 1
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 1
- 241001189642 Theroa Species 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 description 1
- 230000000415 inactivating effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910001425 magnesium ion Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔発明の目的〕
(童業上の利用分野)
本発明は、半導体装置の製造方法に係り、特に基板の表
面処理を改良した化合物半導体装置の製造方法に関する
。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Use) The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a compound semiconductor device in which surface treatment of a substrate is improved.
(従来の技術)
化合物半導体基板を用いてイオン注入によりpn接合を
形成する一般的な素子形成工程を第4図を用いて説明す
る。先ずn形基板1の表面に陽極酸化膜2を形成する(
a)。この後、レジストマスク3を形成し、例えば鳩イ
オン4をイオン注入してpN 5 (5s、5t)を形
成する(b)。この後、レジスト3および陽極酸化膜2
を除去して基板表面を清浄にしくC)、再度陽極酸化膜
6を形成する(d)。この後必要な電極配線を形成する
。(Prior Art) A general device forming process in which a pn junction is formed by ion implantation using a compound semiconductor substrate will be described with reference to FIG. First, an anodic oxide film 2 is formed on the surface of an n-type substrate 1 (
a). Thereafter, a resist mask 3 is formed and, for example, pigeon ions 4 are implanted to form pN 5 (5s, 5t) (b). After this, resist 3 and anodic oxide film 2
The substrate surface is cleaned by removing C), and an anodic oxide film 6 is formed again (D). After this, necessary electrode wiring is formed.
このような方法において、第4図(C)の陽極酸化膜除
去の工程には通常リン酸が使用されている。In such a method, phosphoric acid is usually used in the step of removing the anodic oxide film shown in FIG. 4(C).
しかしながら、この酸化膜除去の工程には次のような問
題があった。一般に酸化膜除去にはその酸化膜に対する
エツチング速度が十分に速く、下地である化合物半導体
基板に対するエツチング速度が十分に遅いことが必要で
ある。エツチング速度は温度が高い程大きく、例えば厚
さ約5Qnmの陽極酸化膜を除去する場合には、80〜
85°0のリン酸を使用して3〜5分を要するが、それ
以上では速すぎ、また60℃以下では極端に遅くなるこ
とが苅られている。ところが、80〜85℃のリン酸を
使用して陽極酸化、漢をエツチングした後水洗する際に
、リン酸、水、化合物半導体基板の間の反応によると見
られる堆積物が形成され、基板表面が白濁する。この白
濁を防止する一つの方法は流水で基板表面を素早く洗浄
することであるが、これは極めて高度のテクニックを要
し、またこの方法では完全な白濁防止は出来ない。流水
洗浄が難しいのは、リン酸の粘性が大きいためである。However, this process of removing the oxide film has the following problems. Generally, in order to remove an oxide film, it is necessary that the etching rate for the oxide film be sufficiently fast and the etching rate for the underlying compound semiconductor substrate be sufficiently slow. The higher the temperature, the higher the etching rate; for example, when removing an anodic oxide film with a thickness of about 5 Qnm,
It takes 3 to 5 minutes using phosphoric acid at 85°C, but it is said that anything longer than that is too fast, and temperatures below 60°C are extremely slow. However, when washing with water after anodic oxidation and etching using phosphoric acid at 80 to 85 degrees Celsius, deposits appear to be formed due to a reaction between phosphoric acid, water, and the compound semiconductor substrate, and the substrate surface deteriorates. becomes cloudy. One way to prevent this cloudiness is to quickly wash the substrate surface with running water, but this requires extremely sophisticated techniques, and this method cannot completely prevent cloudiness. The reason why washing with running water is difficult is because phosphoric acid has a high viscosity.
(発明が解決しようとする問題点)
上記白濁の原因は、高温の状態で化合物半導体基板の上
にリン酸と水が同時に存在することであり、生成される
白濁は化合物半導体の水酸化物と考えらnる。この様な
白濁が一旦形成されると、その除去は容易ではなく、基
板の平坦性を保ったまま除去するのは殆ど不可能である
。またこの白濁は、第4図に示すように本工程前にイオ
ン注入、アニールなどによりpn接合が形成されている
場所の周辺部の異面不活性化を行ってダイオードを作っ
たり、或いは後にMI3構造を形成したりする際に、界
面準位の原因となり、素子特性を著しく低下させる。(Problem to be Solved by the Invention) The cause of the cloudiness described above is that phosphoric acid and water simultaneously exist on the compound semiconductor substrate at high temperatures, and the cloudiness that is generated is due to the hydroxide of the compound semiconductor. I can't think of anything. Once such cloudiness is formed, it is not easy to remove it, and it is almost impossible to remove it while maintaining the flatness of the substrate. Moreover, as shown in Fig. 4, this cloudiness can be avoided by making a diode by inactivating the area around the place where the pn junction is formed by ion implantation, annealing, etc. before this process, or by making a diode later by using MI3. When forming a structure, it becomes a cause of interface states and significantly deteriorates device characteristics.
本発明は上記した点に鑑みなされたもので、関度のテク
ニックを要せず、容易に酸化膜を除去して半導体基板の
清浄な面を出すことを可能とし、もって素子特性の向上
を可能とした化合物半導体装置の製造方法を提供するこ
とを目的とする。The present invention was developed in view of the above points, and makes it possible to easily remove an oxide film and expose a clean surface of a semiconductor substrate without requiring any special techniques, thereby improving device characteristics. An object of the present invention is to provide a method for manufacturing a compound semiconductor device.
(問題点を解決するための手段及び作用)本発明は、陽
極酸化膜等が形成された化合物半導体基板をリン酸を含
む60℃以上に昇温された第1のエツチング液に浸して
表面処理し、引上げた基板をリン酸を含む常温の第2の
エツチング液に浸した後、水洗することを特徴とする。(Means and effects for solving the problem) The present invention performs surface treatment by immersing a compound semiconductor substrate on which an anodic oxide film, etc. is formed, in a first etching solution containing phosphoric acid and heated to 60° C. or higher. The method is characterized in that the pulled substrate is immersed in a second etching solution containing phosphoric acid at room temperature and then washed with water.
第1.第2のエツチング液としては、リン酸(HsPO
4)に過酸化水素水(H!0.+H,0)、フッ酸(H
F)などを混合して得られるが、第2のエツチング液は
表面処理した化合物半導体基板を水洗する罰に冷却する
ために使用するものであるから、両者が同一成分である
必要はない。またその目的から、第2のエツチング液は
エツチング速度が極めて遅いことが望ましく、かつ、第
1のエツチング液から第2のエツチング液への置換は短
時間で行うことが清浄な化合物半導体全板表面を出す上
で望ましい。水洗は流水で行うが、リン酸は粘性が高い
ため、10分以上の十分な時間を掛けることが望ましい
。また通常純水といえども酸素が溶は込んでおり、長時
間水洗すると自然酸化膜が生成される。従ってその自然
酸化族を除去するため、例えば3%クエンfi +H,
O□(1:1)溶液で3〜5分エツチングする工程を加
えるのがよい。この溶液によるエツチング後の水洗は、
溶液の粘性が低いため1〜2分で十分である。またこの
溶液による(111) B間化合物半導体基板のエツチ
ング速度は例えばIn=へssbの場合20〜3Qnr
n/分と遅く、面の凹凸も生じ難い。1st. As the second etching solution, phosphoric acid (HsPO
4) Hydrogen peroxide solution (H!0.+H,0), hydrofluoric acid (H
F) etc., but since the second etching liquid is used to cool the surface-treated compound semiconductor substrate rather than washing it with water, it is not necessary that the two have the same composition. For that purpose, it is desirable that the etching rate of the second etching solution be extremely slow, and that the replacement of the first etching solution with the second etching solution should be carried out in a short period of time so that the entire surface of the clean compound semiconductor board can be etched. desirable for producing Washing is performed with running water, but since phosphoric acid has a high viscosity, it is desirable to wash it for a sufficient time of 10 minutes or more. In addition, even pure water usually contains dissolved oxygen, and a natural oxide film is formed when washed for a long time. Therefore, in order to remove the natural oxidation group, for example, 3% citric fi + H,
It is preferable to add an etching step for 3 to 5 minutes with an O□ (1:1) solution. Washing with water after etching with this solution is as follows:
Since the viscosity of the solution is low, 1 to 2 minutes is sufficient. In addition, the etching rate of a (111) B compound semiconductor substrate using this solution is, for example, 20 to 3 Qnr when In = ssb.
It is slow at n/min and does not easily cause surface irregularities.
(実施例)
以下本発明の詳細な説明する。第4図(′b)の工程で
、Mgイオン5 X 10”7cm”のドーズ量でイオ
ン注入し、350’Oでアニールした後の陽極酸化膜の
除去工程に本発明を適用した。先ず第1因に示すように
、エツチング!!11にリン酸を含む80〜85゛Cに
昇温された第1のエツチング液12を満たし、ホルダ1
3に支持されたInAsSb基板14を浸して表面の陽
極酸化膜15をエツチングした。16は温4閲コントロ
ーラ付ヒータである。陽極酸化膜15が除去されたIn
AsSb基板14を引上げ、直ちに第2図に示すように
、ホルダおに支持して別のエツチング槽21のリン酸を
含む常温の第2のエツチング液乙に浸して冷却した。そ
の後このInAsSb基板14を、第3図に示すように
、ホルダあに支持して水蕊が矢印のように流れるオーバ
ーフロー形流水洗浄槽31に入れて水洗した。(Example) The present invention will be described in detail below. In the step shown in FIG. 4('b), the present invention was applied to the step of removing the anodic oxide film after implanting Mg ions at a dose of 5.times.10"7 cm" and annealing at 350'O. First of all, as shown in the first cause, etching! ! 11 is filled with a first etching solution 12 containing phosphoric acid heated to 80 to 85°C, and the holder 1 is
The InAsSb substrate 14 supported by the substrate 3 was immersed in the etching process, and the anodic oxide film 15 on the surface was etched. 16 is a heater with a temperature controller. In from which the anodic oxide film 15 has been removed
The AsSb substrate 14 was pulled up, immediately supported in a holder as shown in FIG. 2, and immersed in a second etching solution B containing phosphoric acid in another etching tank 21 at room temperature for cooling. Thereafter, as shown in FIG. 3, this InAsSb substrate 14 was supported in a holder and placed in an overflow type running water cleaning tank 31 in which water stamens flow as shown by the arrows, and was washed with water.
この実施例によれば、従来のような白濁のない清浄なI
nAs S b基板表面を出すことが出来た。そして
この体、第4図(d)の工程を蛯で得られたダイオード
特性を測定したところ、ROA値(零バイアス抵抗値几
02面積人の積)は3×10ゝΩ1m”以上と十分に大
きいものであった。According to this embodiment, a clean I
The surface of the nAs S b substrate could be exposed. When we measured the diode characteristics of this body using the process shown in Figure 4(d), we found that the ROA value (product of zero bias resistance value x 02 area) was sufficiently high to be over 3 x 10゜Ω1m''. It was big.
なお本発明は、InAsSb基板の陽極酸化膜の除去に
限らず、高圧水蒸気酸化による故化膜の除去にも同様に
適用することが可能である。またInAsSb基板は(
100)面、 (111) B面、 (211)
B面等いずれを用いた場合にも不発明は有効である。Note that the present invention is not limited to the removal of an anodic oxide film of an InAsSb substrate, but can be similarly applied to the removal of a decayed film by high-pressure steam oxidation. In addition, the InAsSb substrate (
100) side, (111) B side, (211)
Non-invention is valid regardless of whether side B or the like is used.
本発明によれば、化合物半導体基板表面の陽極酸化膜等
を除去して白濁のない清浄な表面を出すことができ、従
って化合物半導体を用いたダイオードやMI8構造など
の素子特性が大幅に改善される。According to the present invention, it is possible to remove the anodic oxide film, etc. on the surface of a compound semiconductor substrate to provide a clean surface without clouding, and therefore the characteristics of devices such as diodes and MI8 structures using compound semiconductors are significantly improved. Ru.
/J全
第1図4第3図は本発明の一実施例の化合物半導体陽極
酸化膜除去工程を説明するための図、第4図は従来の方
法を説明するための図である。
11・・・エツチング槽、12・・・第1のエツチング
液、13 ・・・ホルダ、14・・・InAsSb基板
、15・・・陽極酸化膜、16・・・温度コントローラ
付ヒータ、21・・・エツチング槽、
n・・・第2のエッチジグ液、 n・・・ホルダ、31
・−・オーバーフロー形流水洗浄槽、32・・・水、
あ・・・ホルダ。
代理人 弁理士 則 近 憲 佑
同 竹 花 喜久男
第1図
乍 2 図FIG. 3 is a diagram for explaining a compound semiconductor anodic oxide film removal process according to an embodiment of the present invention, and FIG. 4 is a diagram for explaining a conventional method. DESCRIPTION OF SYMBOLS 11... Etching tank, 12... First etching liquid, 13... Holder, 14... InAsSb substrate, 15... Anodized film, 16... Heater with temperature controller, 21...・Etching tank, n...Second etching jig liquid, n...Holder, 31
・-・Overflow type running water cleaning tank, 32...Water,
Ah... holder. Agent Patent Attorney Noriyuki Chika Yudo Kikuo Takehana Figures 1 and 2
Claims (3)
温された第1のエッチング液に浸して表面処理し、引上
げた基板をリン酸を含む常温の第2のエッチング液に浸
した後、水洗する工程を含むことを特徴とする化合物半
導体装置の製造方法。(1) After surface treatment of a compound semiconductor substrate by immersing it in a first etching solution containing phosphoric acid heated to 60°C or higher, and then immersing the pulled-up substrate in a second etching solution containing phosphoric acid at room temperature. . A method for manufacturing a compound semiconductor device, comprising the steps of washing with water.
の除去である特許請求の範囲第1項記載の化合物半導体
装置の製造方法。(2) The method for manufacturing a compound semiconductor device according to claim 1, wherein the surface treatment of the compound semiconductor substrate is the removal of an anodic oxide film.
膜を除去する工程を含む特許請求の範囲第1項記載の化
合物半導体装置の製造方法。(3) The method for manufacturing a compound semiconductor device according to claim 1, further comprising the step of removing a natural oxide film on the surface of the compound semiconductor substrate after the water washing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19389886A JPS6351642A (en) | 1986-08-21 | 1986-08-21 | Manufacture of compound semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19389886A JPS6351642A (en) | 1986-08-21 | 1986-08-21 | Manufacture of compound semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6351642A true JPS6351642A (en) | 1988-03-04 |
Family
ID=16315578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19389886A Pending JPS6351642A (en) | 1986-08-21 | 1986-08-21 | Manufacture of compound semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6351642A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8225481B2 (en) * | 2003-05-19 | 2012-07-24 | Pratt & Whitney Rocketdyne, Inc. | Diffusion bonded composite material and method therefor |
-
1986
- 1986-08-21 JP JP19389886A patent/JPS6351642A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8225481B2 (en) * | 2003-05-19 | 2012-07-24 | Pratt & Whitney Rocketdyne, Inc. | Diffusion bonded composite material and method therefor |
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