JPS6350215A - Radio receiver - Google Patents

Radio receiver

Info

Publication number
JPS6350215A
JPS6350215A JP19436886A JP19436886A JPS6350215A JP S6350215 A JPS6350215 A JP S6350215A JP 19436886 A JP19436886 A JP 19436886A JP 19436886 A JP19436886 A JP 19436886A JP S6350215 A JPS6350215 A JP S6350215A
Authority
JP
Japan
Prior art keywords
input
diode
voltage
high frequency
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19436886A
Other languages
Japanese (ja)
Inventor
Yuji Mizoguchi
溝口 雄士
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP19436886A priority Critical patent/JPS6350215A/en
Publication of JPS6350215A publication Critical patent/JPS6350215A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the output distortion by adding an input limiting circuit, which consists of a series circuit of a diode or a transistor TR to which a diode is connected and a resistance, between the input terminal of a high frequency amplifying circuit and the ground. CONSTITUTION:If an input voltage (c) lower than a breakdown voltage (b) is applied to an input terminal 1, the reverse voltage (c) is applied to a diode 6, but the input signal is amplified by a high frequency amplifying circuit 2 as it is because the voltage (c) is lower than the breakdown voltage, (b). If an input voltage (d) higher than the breakdown voltage (b) is applied to the input terminal 1, the voltage exceeding the breakdown voltage (b) is applied to the diode 6. A divided path passing the input terminal, the diode 6, a resistance 7, and the ground is formed besides the path passing the input terminal 1 and the high frequency amplifying circuit 2. Consequently, the signal level inputted to the high frequency amplifying circuit 2 is changed by a ratio of the input impedance of the high frequency amplifying circuit 2 to the value of the resistance 7 to limit the input signal to the high frequency amplifying circuit 2.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、FMラジオ放送信号又はムMラジオ放送信号
を受信可能なラジオ受信機に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a radio receiver capable of receiving FM radio broadcast signals or MU radio broadcast signals.

従来の技術 近年、ラジオ受信機は感度等の特性も向上してきている
が、強電界地域で強入力を受信した場合に混変調や相互
変調を受け、受信が困難になるという問題が発生してき
ている。
Conventional technology In recent years, the sensitivity and other characteristics of radio receivers have improved, but when receiving strong input in areas with strong electric fields, they are subject to cross-modulation and intermodulation, making reception difficult. There is.

以下図面を参考にしながら従来のラジオ受信機の一例に
ついて説明する。
An example of a conventional radio receiver will be described below with reference to the drawings.

第7図は従来のラジオ受信機の入力回路のブロック図を
示す。第7図において、入力端子1より入力した信号は
高周波増幅回路2で増幅され、局部発振回路4からの局
部発振信号と混合回路3において周波数変換されて中間
周波数信号となり、中間周波数増幅回路5で増幅される
FIG. 7 shows a block diagram of an input circuit of a conventional radio receiver. In FIG. 7, a signal input from an input terminal 1 is amplified by a high frequency amplifier circuit 2, frequency-converted by a local oscillation signal from a local oscillation circuit 4 and a mixing circuit 3 to become an intermediate frequency signal, and then converted to an intermediate frequency signal by an intermediate frequency amplifier circuit 5. amplified.

発明が解決しようとする問題点 しかしながら、従来のラジオ受信機では、入力端子1に
強大な入力信号が入ってきた場合、高周波増幅回路2に
もそのままの入力が入り増幅されるが、信号成分が大き
いために高周波増幅回路2や混合回路3の電源ライン、
バイアスライン、アースライン等を通って信号が局部発
振回路4に影響を与え、局部発振周波数が変動し、弱入
力時に比べ強入力時には出力が歪む現象が起こるという
問題があった。
Problems to be Solved by the Invention However, in conventional radio receivers, when a strong input signal is input to the input terminal 1, the same input signal is also input to the high frequency amplifier circuit 2 and amplified, but the signal components are Due to its large size, the power supply line of the high frequency amplifier circuit 2 and mixing circuit 3,
There is a problem in that the signal affects the local oscillation circuit 4 through the bias line, the ground line, etc., the local oscillation frequency fluctuates, and the output is distorted when there is a strong input compared to when there is a weak input.

本発明は、従来のラジオ受信機が持っていた強大な入力
が入力端子に入った時にその信号が高1波増幅回路に入
って増幅されて電源ラインやアースラインを通って局部
発振周波数を変動させ、その出力が歪むという問題点を
解決するものである。
In the present invention, when the powerful input that conventional radio receivers have enters the input terminal, the signal enters a high single-wave amplifier circuit, is amplified, and changes the local oscillation frequency by passing through the power line and ground line. This solves the problem that the output is distorted.

問題点を解決するための手段 本発明のラジオ受信機は、高周波増幅回路の入力端子と
アース間に、ダイオード又はダイオード接続したトラン
ジスタと抵抗との直列接続体よりなる入力制限回路を設
けたことを特徴とするものである。
Means for Solving the Problems The radio receiver of the present invention is provided with an input limiting circuit consisting of a diode or a series connection of a diode-connected transistor and a resistor between the input terminal of the high frequency amplifier circuit and the ground. This is a characteristic feature.

作用 本発明は、上記した構成によって、ダイオード又はダイ
オード接続したトランジスタの降伏電圧を基準とし、そ
れ以上の信号電圧が入力端子に加わった時、入力信号を
高周波増幅回路と、ダイオード又はダイオード接続した
トランジスタと抵抗との直列回路の2つに分割し、高周
波増幅回路に過大な入力信号が入らないように信号入力
を制限し得るものである。したがって、入力端子に強大
な入力が入った場合に一定のレベル以上の入力信号を制
限し、高周波増幅回路への入力を抑え、局部発振周波数
の変動を抑えて強入力時の出力歪を少なくすることがで
きることとなる。
According to the above-described structure, when a signal voltage higher than the breakdown voltage of the diode or diode-connected transistor is applied to the input terminal, the input signal is connected to the high-frequency amplification circuit and the diode or diode-connected transistor. It is possible to limit signal input to prevent excessive input signals from entering the high frequency amplification circuit by dividing the circuit into two series circuits, ie, a series circuit and a resistor. Therefore, when a strong input is applied to the input terminal, the input signal above a certain level is restricted, the input to the high-frequency amplifier circuit is suppressed, and the fluctuation of the local oscillation frequency is suppressed to reduce output distortion at the time of strong input. This means that you can do it.

実施例 以下本発明の一実施例のラジオ受信機について図面を参
照しながら説明する。
Embodiment Hereinafter, a radio receiver according to an embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の入力制限回路をもつラジオ受信機の一
実施例を示すものである。第2図はダイオードの電圧電
流特性である。本例のラジオ受信機は、入力端子1とア
ース間に、ダイオード6と、このダイオード6のアノー
ド側に接続した抵抗子よりなる直列回路で構成した入力
制限回路を設けたものである。
FIG. 1 shows an embodiment of a radio receiver having an input limiting circuit according to the present invention. FIG. 2 shows the voltage-current characteristics of the diode. The radio receiver of this example is provided with an input limiting circuit constituted by a series circuit consisting of a diode 6 and a resistor connected to the anode side of the diode 6 between the input terminal 1 and the ground.

このような構成において、いま、入力端子1に第2図て
示す降伏電圧すよりも小さな入力電圧Cが加わった場合
、ダイオード6には逆電圧Cが加わるが、降伏電圧すよ
り小さいので、入力信号はそのまま高周波増幅回路2で
増幅されることになる。次に入力端子1に第2図の降伏
電圧すより大きい入力電圧dが加わった場合、ダイオー
ド6に第2図の降伏電圧すを越える電圧d75吻口わる
ことになり、従来の信号経路である入力端子1→高周波
増幅回路2という経路以外にも、入力端子1→ダイオー
ドe→抵抗7→アースという分割経路が形成されること
になる。したがって抵抗7の値と高周波増幅回路2の入
力インピーダンスの比例よって高周波増幅回路2に入力
される信号レベルを変化させることができ、高周波増幅
回路2への入力信号を制限することができる。つまり、
ダイオード6に直列に接続した抵抗アは入力制限回路が
動作した時に入力の短絡を防ぐとともに、その抵抗値は
高周波増幅回路2以降の入力インピーダンスとの比によ
って入力制限される電圧を変化することができる。
In such a configuration, if an input voltage C smaller than the breakdown voltage shown in Fig. 2 is applied to the input terminal 1, a reverse voltage C is applied to the diode 6, but since it is smaller than the breakdown voltage, the input The signal is directly amplified by the high frequency amplification circuit 2. Next, when an input voltage d greater than the breakdown voltage shown in Figure 2 is applied to the input terminal 1, a voltage d75 exceeding the breakdown voltage shown in Figure 2 will be applied to the diode 6, and the conventional signal path will be reversed. In addition to the path from input terminal 1 to high frequency amplifier circuit 2, a divided path from input terminal 1 to diode e to resistor 7 to ground is formed. Therefore, the level of the signal input to the high frequency amplification circuit 2 can be changed by proportionality between the value of the resistor 7 and the input impedance of the high frequency amplification circuit 2, and the input signal to the high frequency amplification circuit 2 can be restricted. In other words,
The resistor A connected in series with the diode 6 prevents the input from being shorted when the input limiting circuit operates, and its resistance value can change the input limited voltage depending on the ratio with the input impedance of the high frequency amplifier circuit 2 and beyond. can.

尚、上記の実施例では入力端子1側にダイオード6、ア
ース側に抵抗7を持つように入力制限回路を構成したが
、これ以外ても第3図に示すように入力端子1側に抵抗
T、アース側にダイオード6を持つように入力制限回路
を構成してもよい。
In the above embodiment, the input limiting circuit was configured to have a diode 6 on the input terminal 1 side and a resistor 7 on the ground side. , the input limiting circuit may be configured to have a diode 6 on the ground side.

また、入力制限回路を構成するダイオード6は、ダイオ
ードを直列に複数個接続したり、逆方向の耐圧の異なる
ダイオード全使用して構成してもよい。例として第4図
に2側腹列に接続したダイオード8,9を利用した入力
制限回路を示す。この時、ダイオード8.9のそれぞれ
のダイオード特性がダイオード6と同じものだとすると
、ダイオード8,9の総合の電圧電流特性は第6図のよ
うKなる。したがって、第4図のような回路であれば、
入力電圧が5以上のb′になった時に入力制限回路が動
作する。つまり、第1図又は第3図の。
Furthermore, the diode 6 constituting the input limiting circuit may be constructed by connecting a plurality of diodes in series, or by using all diodes having different breakdown voltages in the reverse direction. As an example, FIG. 4 shows an input limiting circuit using diodes 8 and 9 connected in the second diagonal row. At this time, assuming that the diode characteristics of each of the diodes 8 and 9 are the same as those of the diode 6, the total voltage-current characteristics of the diodes 8 and 9 will be K as shown in FIG. Therefore, if the circuit is as shown in Figure 4,
The input limiting circuit operates when the input voltage reaches b' of 5 or more. That is, as shown in FIG. 1 or 3.

回路に比べてより大きな電圧が入力端子に加わらないと
入力制限回路が動作しないことがわかる。
It can be seen that the input limiting circuit does not operate unless a voltage larger than that of the circuit is applied to the input terminal.

また、第6図のよって逆方向の耐圧の低い電圧のダイオ
ードを使用した場合は、より小さな入力電圧で入力制限
回路が動作することがわかる。また、ダイオードはダイ
オード接続したトランジスタであってもよいことは言う
までもない。
Further, as shown in FIG. 6, it can be seen that when a diode with a low voltage withstand voltage in the reverse direction is used, the input limiting circuit operates with a smaller input voltage. Further, it goes without saying that the diode may be a diode-connected transistor.

発明の効果 以上、説明したように本発明のラジオ受信機は、ダイオ
ード又はダイオード接続したトランジスタと抵抗の直列
回路よりなる入力制限回路を追加することKより、ラジ
オ受信機の高周波増幅回路への入力制限を行なうことが
でき、出力歪を少なくできる実用上きわめて有益なもの
である。
Effects of the Invention As described above, the radio receiver of the present invention has the advantage of adding an input limiting circuit consisting of a diode or a series circuit of a diode-connected transistor and a resistor, thereby reducing the input to the high frequency amplifier circuit of the radio receiver. This is extremely useful in practice as it can limit output distortion and reduce output distortion.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のラジオ受信機の一実施例を示すブロッ
ク図、第2図は同ラジオ受信機に使用するダイオードの
電圧電流特性図、第3図、第4図は本発明のラジオ受信
機の他の実施例を示すブロック図、第5図は同ラジオ受
信機に使用したダイオードの電圧電流特性図、第6図は
逆耐圧の異なるダイオードの電圧電流特性図、第7図は
従来のラジオ受信機のブロック図である。 1・・・・・・入力端子、2・・・・・・高周波増幅回
路、3・・・・・・混合回路、4・・・・・・局部発振
回路、6・・・・・・中間周波増幅回路、6,8.9・
・・・・・ダイオード、7・・・・・・抵抗。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第2図 第3図 第 5 図         第 6 回置 7 図
Fig. 1 is a block diagram showing an embodiment of the radio receiver of the present invention, Fig. 2 is a voltage-current characteristic diagram of a diode used in the radio receiver, and Figs. 3 and 4 are diagrams of the radio receiver of the present invention. Fig. 5 is a voltage-current characteristic diagram of diodes used in the same radio receiver, Fig. 6 is a voltage-current characteristic diagram of diodes with different reverse breakdown voltages, and Fig. 7 is a diagram of the conventional FIG. 2 is a block diagram of a radio receiver. 1...Input terminal, 2...High frequency amplifier circuit, 3...Mixing circuit, 4...Local oscillation circuit, 6...Intermediate Frequency amplification circuit, 6,8.9・
...Diode, 7...Resistor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 Figure 5 Figure 6 Rotation 7 Figure

Claims (1)

【特許請求の範囲】[Claims] 高周波増幅回路の入力端子とアース間に、ダイオード又
はダイオード接続したトランジスタと抵抗の直列接続体
よりなる入力制限回路を設けたことを特徴とするラジオ
受信機。
A radio receiver characterized in that an input limiting circuit consisting of a diode or a series connection of a diode-connected transistor and a resistor is provided between an input terminal of a high-frequency amplifier circuit and ground.
JP19436886A 1986-08-20 1986-08-20 Radio receiver Pending JPS6350215A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19436886A JPS6350215A (en) 1986-08-20 1986-08-20 Radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19436886A JPS6350215A (en) 1986-08-20 1986-08-20 Radio receiver

Publications (1)

Publication Number Publication Date
JPS6350215A true JPS6350215A (en) 1988-03-03

Family

ID=16323424

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19436886A Pending JPS6350215A (en) 1986-08-20 1986-08-20 Radio receiver

Country Status (1)

Country Link
JP (1) JPS6350215A (en)

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