JPS6348996A - Electric signal repeater - Google Patents

Abstract

PURPOSE:To simplify the constitution of a memory circuit and to obtain the correct output of a good waveform by storing a signal converted into a parallel signal by a remote control IC in a memory and reading it as a serial signal by the use of a bidirectional terminal. CONSTITUTION:Plural repeaters 2a-2n are connected to the housing information disk 1 of a home security system by a power line 3 and abnormality detection signals from various types of sensors 4a-4d are received through transmitters 5a-5d by the repeaters 2a-2n. The respective abnormal signals are received in the receiving circuit 7 of the repeaters 2a-2n and an input signal is converted from serial to parallel or parallel to serial by an IC8 for a remote control. To this IC8, an oscillator circuit 9 for supplying a clock pulse, a recording circuit 10 for temporarily recording a parallel signal from the IC8 and returning the signal in the IC again and an address switch circuit 11 for setting an address in the IC8 are connected and the serial signal is outputted to the power line 3 by a power carrying circuit 12.

Description

[Detailed description of the invention]

[Ge] Field of Application The present invention is used to prevent fires and gas leaks in ordinary homes.
Home safety systems that issue eye alarms, or lighting equipment and other equipment! 10 In a remote control system that controls electrical equipment etc. from a distance, various sensors are used. , or 1 from the remote control transmitter! L
Receive waves, house f# report board, twin lights 1Itr! A
−? ``This invention relates to an electrical signal repeater that transmits via an electric light line to a control device that controls a control device. (b) Conventional technology Conventionally, this Hashi repeater has a remote control IC that has a mechanism for inputting a serial signal and outputting it as a parallel signal, inputting a parallel signal No. 46 and outputting it as a serial signal, and this remote control IC. Stores the parallel IS number of the IC for use. Return the latch part and 1 to the remote control IC again.
In 4JR, this remote control IC converts the serial signal from the receiving circuit that receives the signal from the remote control transmitter into a parallel signal and outputs it to the latch section.
Input all the parallel signals stored in the latch section again and convert them into serial signals! From the power supply circuit? ! A method for transmitting data via a source is known from Japanese Patent Application Laid-open No. 107997/1983. However, in this configuration, there are two memory ICs in the latch section.
This has the disadvantage that two gate control circuits are required, making the circuit complex and expensive. (c) Departure-! The problem that A is trying to solve Unexploited uA was created in view of the above problem. Our technical mission is to provide an inexpensive one-time signal repeater by converting the circuit n1IhX. )Means for solving the problemTo solve the above technical problem, the memory circuit is
The remote control IC is composed of a four-constant circuit consisting of a capacitor and a resistor that stores the parallel signals until the remote control IC receives all the parallel signals from the storage circuit and outputs them as serial signals. (E) Operation Since the configuration is as described above in the book, the serial signal sent to the remote control IC is transformed into a parallel signal and output to the storage circuit via the bidirectional terminal. i
It is stored in the self-memory circuit. Then, the remote control IC again takes in the parallel signal stored in the bad circuit in both directions, converts it into a real signal, and outputs it. The memory circuit u9 stores the parallel signal until the remote control IC outputs the serial signal, and then sends an accurate serial output from the remote control IC. (f) Embodiment Figure 6 shows the configuration of a home security system which is a prerequisite device of the present invention. These units are interconnected by electric power (3). (4aJ to (4d) are fire sensors, gas leak sensors, security sensors, etc., and (5a) to (4d) are fire sensors, gas leak sensors, security sensors, etc. 5d) is a transmitter that is connected to the various sensors (4a] to (4d), and transmits the abnormality detection signal of the valley sensors (48) to (4d).・Rano sensor hard +2
The abnormality detection signal is converted to wireless No. 13 and output. When various sensors (4a) to (4dJ) detect an abnormality/l, the corresponding transmitter 6 (583 to [5d]
Send to N detection signal. The repeaters (2a) to (2n) receive this xi and send their own address numbers in the same town and J!
The IF signal including the 4-way side signal is carried to the 7-line power line (3) and transmitted to the housing information panel (1). The housing information 4ffitL) receives the 1i notification signal 1S, determines which error caused the pressure to be generated, and issues a 4# notification corresponding to the abnormality from the alarm device. At the same time, the operating repeater is determined and displayed based on the address number in the D-report signal. The present invention relates to these middle cabinets (2aJ to (2n)), and if the block circuit diagram of No. 7 is drawn based on FIG.
Each of the repeaters (2a] to (2n) is a receiving antenna (6)
The output of the receiving circuit (7) marked with 20 and the output of the 20 reception circuit +71 is inputted, and when the input signal is a serial signal, it is output as a parallel signal. The remote control IC+81 has the ability to output as a serial signal, and the remote control IC+83 has an oscillator circuit that generates clock pulses for the oscillation circuit αJ (built in the 81, which will be described later). (9), a storage circuit QQ that temporarily stores the parallel signal of #dc! remote control lCf5J sword, and returns it to parallel -f11%'9 to the remote control IC (8), and the remote control IC (Address switch circuit LLIB that sets the address number of the same town to 8:,!5σ
1%-) A power supply transfer circuit (3) that transfers the serial signal output from the control ICf81 to the power supply (3).
It consists of 1). fItJ remote control IC + 3) is Sanbe Electric's ta) Jla (DVLM-5020 type IC"e,
-togx) Some of them are shown in FIG. The second bidirectional connectors 08CI and 08Cz that input and output the function code are terminals for clock oscillation, and one oscillation circuit [131 is continued for a long time. Ml and Mz are reception mode setting terminals. The content of the reception mode can be selected by combining the two old levels of fL, etc.R8T is a reset terminal and a terminal for initializing the control device Ct, SD! is an input terminal, and ST commands the start of transmission. This is the start signal input terminal for the 18m56
It is designed so that the command to start transmission will not be given unless an input of 08m560 or more is made. SDO is an output terminal for the output signal, DR indicates that transmission data has been received, and the two-way terminals AO to A9. F'O-, -F3 are all terminals indicating that they are in the output state, RC is the output terminal of the external relay control agent, TC is the control signal output terminal of the external chest circuit triac, AC is the zero-cross detection pulse input of the commercial power supply voltage It is a terminal. Next, inside the control IC, α4 is a timing generation circuit that generates various clock pulses necessary for internal operations, and αω is a 20-bit serial code transmitted from the SDI terminal through the input circuit CLe. This is a serial-in/parallel-out shift register that stores digitally encoded received signals. αn is the ratio of the signal stored in the serial-in/parallel-out shift register +151 and the number recorded in the parallel-in/serial at-shift register αa, which will be described later!
This is a comparison circuit that performs i for both address codes. This comparison circuit (171 also compares the signals input twice to the SDK terminal, that is, compares the first and second received signals. αa is the signal input to the SDK terminal twice.
The parallel-in/serial-out shift register is activated by the operation of the timing generation circuit I based on the transmission start signal sent to the STi, and outputs a serial encoded signal. α9 is a parity generating circuit which adds 1 bit of a parity bit to the output of the parallel-in Q serial-out shift register. 1 is a modulation circuit that modulates the transmission (7 signal) from the parallel-in serial-out shift register (lE9) at 120 Kdz, and this output is output from the SDO and J terminals.Next, Figs. 2 and 3 To elaborate on the original rotation based on
Input the serial signal from the receiving circuit (7) from the 5DI93 of the remote control ICt8J. Ao--As4 child and F'o-FxyB child eNatl+
%QfJ and converts the serial signal input from the SDI terminal into a parallel signal and outputs it to the storage circuit ul. As shown in the third factor, there are inverter resistors Δ and MO8b between the serial in/parallel out shift register and the parallel in/serial out shift register 0 barrel and the AO to A4i and F'o to Fs terminals. 'ET(
C) Parallel signal output surface 116I2 consisting of a series circuit
41 and parallel signal input port E? 5h is connected and there is 1. The circuit QG mentioned above is a remote control IC (
8) between the capacitors (C1) to (C9] that are connected to the AO to A4 terminals and the Fo to F3 terminals, and the contents t(CI) to (C9) and the AO to A4 terminals and the FO to F3 terminals. 4 with a time constant circuit consisting of a series of pull-up resistors.
g has been completed. 1c (8) A5-A 9m for remote control
The child is connected to the address switch circuit [1, 1)K. This address switch B path tlυHQN・OF'F'
From Suitsuna (SNt 3 to (S'5)) and pull-up grinding assistant (4a). Also, the DR terminal of the remote control IC + 81 is used as the 8T terminal. O8Ctffi of the remote control IC + 8) The oscillator circuit (9) is connected to the oscillator circuit (9), and this oscillator circuit (9) generates a clock pulse to the eight-pin oscillation circuit u3 of the remote control IC (8). This oscillator circuit (9) is a 480KHz crystal oscillation preload,
It is composed of capacitors (CA), (CIl) and resistors (R). Therefore, the first output signal a) from the receiving circuit (7) is
The serial signal (C1) is the IC for remote control.
When the signal is input to the SDI terminal of f81, the input circuit e starts operating, and the tie voltage generating circuit a starts operating. The serial data of this first serial signal (at) is stored in a serial-in/parallel-out shift register (15
1VC is inserted. after that. When the second serial signal (C2) is input from the SDI terminal, the first serial data and the second serial data are compared in the comparator circuit (lower), and if these data do not match, It is determined that these serial signals (al) (JL2) contain noise signals, and subsequent operations are stopped. At this time, a parity check is also performed. If the second serial data matches #memory 1 and the parity is normal, the serial in-parallel out
The serial data from the shift register uSl is converted into a parallel signal and output (b) to the storage circuit 4 as parallel data from the terminals AO to A4 and terminals Fo to F3. To explain the ffl operation of the memory circuit αC, when the parallel signal from the serial in/parallel out/shift register σ is sH#, the inverter +217 is
The constant voltage current flowing through the bubble-up resistor 4 is reversed to L# and the MOSFET becomes OF'F'.
C1) ~ (C11) Nian, =ydensa (C1)
~(C9) is photoelectrically stored and stores 1H'. Also, when the parallel signal is 1L', MOSF'ETI is turned on and the constant voltage 4 currents flowing through the pull amplifier resistor are MO8F'ET (c). Therefore, capacitors (C1) to (C9) are mosFETs.
%L' is stored. In this way, each terminal AO-, -A4. The signal of 1H1 or ViIL" output from Fo-, F3 sword 1 is constant (C1)
~ (C9) is written in d1, and this combination is stored as parallel data. The 1L# signal (b) is continuously output (c) for 18m5@C or more to the terminal.When this 1H' signal is input to the ST terminal for 16m5.C continuously, the chattering removal circuit (not shown) is output. outputs a transmission start signal, and the remote control IC+83 enters the transmission state. The 1E1# signal output from the DRMA child stops. The contact ticl of the memory circuit αQ

% stored in [C9]
Hat or 1L# signal is connected to Ao-A4 terminal and Fo
~ From the F3 terminal and the address data of the address switch Uυ are once read from the A5 to A9 terminals into the parallel-in/serial-out shift register u8 A, and then output, and the parity according to this parallel data is generated by the parity generator circuit 9. It is added to the parallel data and is further modulated by the modulation circuit 4 at 12 (IKHz).
Output twice (from DO terminal to new serial signal) as (
dl) and transmitted to the housing information board (1) by power supply
As shown in figure (b), the remote control IC (8
) 1L' parallel output from the Ao-At relay and Fo-F3 terminals except when parallel data is being output from the AO to A4 bubbles and the F' o to F34 terminals. When the data has been outputted, it flashes rapidly, and when the remote control ICt81 switches to the transmitting state, it memorizes %Le. Also,
Capacitor<C1)~

[C9] and the number of pull-up resistors (to) are output twice (dx
)(dz) until t[, a is set as an error to store parallel data. In addition, the parallel-in/serial-out shift register Qa of the remote control IC (8) is 1L below Vth in Figure 4 (b).
'L') is true. (g) Effects of the invention By making the unexploded I811RI memory circuit simple and inexpensive, it is possible to obtain a pure and clean output signal.

[Brief explanation of drawings]

The drawings all show one practical example of the present invention, and Fig. 1 is a block circuit diagram, Fig. 2 is a detailed drowsiness circuit diagram of Fig. 1, Fig. 3 is an electrical circuit diagram of the main part, and Fig. The figures are kick-off and time waveform diagrams of the two points in Figures 1 and 2, Figure 5 is a block diagram of the main parts of the remote control IC, and Figure 6 is the homepage that is the basis for the invention. FIG. 2 is an explanatory diagram of a security system. (8)...Remote control IC, (lfJ・
...C memory 1, (Cxt~(C9)...Capacitor, [Yes]...Pull amplifier resistor (resistance).

Claims (1)

[Claims] (1) A remote control IC that has the function of inputting a serial signal and outputting it as a parallel signal, inputting a parallel signal and outputting it as a serial signal, and having a bidirectional terminal for inputting and outputting the parallel signal. ,
A memory circuit is connected to a bidirectional terminal of the remote control IC and stores the parallel signal, and the memory circuit inputs the parallel signal from the memory circuit to the remote control IC and converts it into a serial signal. An electrical signal repeater comprising a time constant circuit consisting of a capacitor and a resistor that stores a parallel signal until it is output.