JPS6347984A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6347984A JPS6347984A JP61193411A JP19341186A JPS6347984A JP S6347984 A JPS6347984 A JP S6347984A JP 61193411 A JP61193411 A JP 61193411A JP 19341186 A JP19341186 A JP 19341186A JP S6347984 A JPS6347984 A JP S6347984A
- Authority
- JP
- Japan
- Prior art keywords
- crystal
- sic
- layer
- added
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 19
- 239000013078 crystal Substances 0.000 claims abstract description 79
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 39
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 37
- 239000012535 impurity Substances 0.000 claims abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 4
- 239000010703 silicon Substances 0.000 claims abstract description 4
- 239000000370 acceptor Substances 0.000 claims description 5
- 125000004429 atom Chemical group 0.000 abstract description 11
- 238000000034 method Methods 0.000 abstract description 8
- 230000005669 field effect Effects 0.000 abstract description 7
- 125000004433 nitrogen atom Chemical group N* 0.000 abstract description 6
- 239000002784 hot electron Substances 0.000 abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 239000007789 gas Substances 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 abstract description 3
- 150000002500 ions Chemical class 0.000 abstract description 3
- 229910052751 metal Inorganic materials 0.000 abstract description 3
- 239000002184 metal Substances 0.000 abstract description 3
- 238000005275 alloying Methods 0.000 abstract description 2
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052785 arsenic Inorganic materials 0.000 abstract description 2
- -1 arsenic ions Chemical class 0.000 abstract description 2
- 239000012159 carrier gas Substances 0.000 abstract description 2
- 125000005842 heteroatom Chemical group 0.000 abstract 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 7
- 150000001875 compounds Chemical class 0.000 description 2
- 238000005381 potential energy Methods 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000010587 phase diagram Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000001294 propane Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0891—Source or drain regions of field-effect devices of field-effect transistors with Schottky gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
シリコン（Ｓｉ）結晶と、これよりエネルギーバンドギ
ャップの大きい炭化珪素（ＳｉＣ）結晶をヘテロ接合に
形成した構造の半導体装置であって、このＳｉＣの結晶
層にのみ、ドナーとなる不純物原子が添加され、Ｓｉ結
晶とＳｉＣ結晶のエネルギーバンドギャップの相違によ
りＳｉの結晶とＳｉＣの結晶界面で、Ｓｉ結晶側に発生
するエネルギーバンドギャップの窪みに蓄積された電子
を利用した電界効果型トランジスタである。[Detailed Description of the Invention] [Summary] A semiconductor device having a structure in which a silicon (Si) crystal and a silicon carbide (SiC) crystal having a larger energy band gap are formed in a heterojunction, and the SiC crystal layer has a However, impurity atoms that serve as donors are added, and due to the difference in the energy band gap between the Si crystal and SiC crystal, electrons accumulated in the energy band gap depression generated on the Si crystal side at the interface between the Si crystal and the SiC crystal are This is a field-effect transistor used.
或いは、ＳｉＣ結晶に添加した場合はドナーとなるが、
Ｓｉ結晶に添加した場合はドナーとは成らない不純物原
子が、前記ＳｉＣ結晶層に添加され、前記Ｓｉ結晶には
予め、アクセプタとなる不純物原子が添加され、Ｐ−Ｎ
接合を設けたバイポーラ型のホットエレクトロントラン
ジスタである。Alternatively, when added to SiC crystal, it becomes a donor, but
Impurity atoms that do not become donors when added to a Si crystal are added to the SiC crystal layer, and impurity atoms that become acceptors are added to the Si crystal in advance to form P-N.
This is a bipolar hot electron transistor with a junction.
本発明は半導体装置に係り、特にＳｉ結晶と、該Ｓｉ結
晶よりエネルギーバンドギャップの大きいＳｉＣ結晶を
ヘテロ接合させて製造した半導体装置に関する。The present invention relates to a semiconductor device, and more particularly to a semiconductor device manufactured by forming a heterojunction between a Si crystal and an SiC crystal having a larger energy band gap than the Si crystal.
ＩＣ１或いはＬＳＩを形成する半導体装置を構成するト
ランジスタは、益々、高速化、微細化を図ることが要求
されている。Transistors constituting semiconductor devices forming IC1 or LSI are increasingly required to be faster and smaller.
ガリウム−砒素（ＧａＡｓ）の結晶と、アルミニウムー
ガリウム−砒素（Ａｌ）ＧａＡｓ）の結晶とをヘテロ接
合に形成し、このＧａＡｓとＡｇＧ ａ Ａ ｓの間の
エネルギーハンドギヤツブの相違を利用した、電界効果
型トランジスタの一種である高電子移動移動度トランジ
スタ（ＨＥＭＴ）や、或いはこのエネルギーバンドギャ
ップの相違を利用したトランジスタの一４ｆｆｉのホッ
トエレクトロントランジスタ（ＨＥＴ）は周知である。A gallium-arsenic (GaAs) crystal and an aluminum-gallium-arsenic (Al)GaAs) crystal are formed into a heterojunction, and the difference in energy hand gear between GaAs and AgGaAs is utilized. A high electron mobility transistor (HEMT), which is a type of field effect transistor, or a hot electron transistor (HET), which is a type of transistor that utilizes this difference in energy band gap, is well known.
ところで、このような半導体装置はＧａＡｓの結晶のよ
うな化合物半導体結晶に、八ΩＧａＡｓの結晶のような
三元の化合物半導体結晶層を分子線エピタキシャル法等
を用いて形成されており、そのヘテロ接合を形成するの
に大規模な装置を必要としたり、或いは煩雑な作業を必
要とする等問題が多い。By the way, such a semiconductor device is formed by using a molecular beam epitaxial method or the like to form a ternary compound semiconductor crystal layer such as an 8Ω GaAs crystal on a compound semiconductor crystal such as a GaAs crystal. There are many problems such as requiring large-scale equipment or complicated work to form the .
そこで本発明は、ＧａＡｓ結晶よりも低価格で容易に得
やすく、かつ一種類の半導体元素より構成されるＳｉの
結晶の上に比較的、簡単な装置で単結晶層が気相エピタ
キシャル成長方法で形成されやすいＳｉＣの結晶層をヘ
テロ接合に形成し、このＳｉとＳｉＣのへテロ接合を用
いた電界効果型トランジスタ、或いはバイポーラ型トラ
ンジスタを得ようするものである。Therefore, the present invention aims to form a single-crystal layer using a relatively simple device using a vapor phase epitaxial growth method on a Si crystal, which is cheaper and easier to obtain than a GaAs crystal and is composed of one type of semiconductor element. The purpose is to form a SiC crystal layer, which is susceptible to oxidation, into a heterojunction, and to obtain a field effect transistor or a bipolar transistor using this heterojunction of Si and SiC.
本発明の半導体装置は、Ｓｉ結晶にＳｉＣよりなる結晶
がヘテロ接合に形成され、該炭化珪素結晶にのみ、ドナ
ーとなる不純物原子、例えば窒素原子が添加されて形成
されている。In the semiconductor device of the present invention, a crystal made of SiC is formed in a heterojunction with a Si crystal, and an impurity atom serving as a donor, for example, a nitrogen atom, is added only to the silicon carbide crystal.
或いは前記Ｓｉ結晶にアクセプタとなる不純物原子が予
め添加された後、前記炭化珪素結晶に注入するとドナー
となる不純物原子が前記炭化珪素結晶に添加して形成さ
れている。Alternatively, impurity atoms that become acceptors are added to the Si crystal in advance, and then impurity atoms that become donors when implanted into the silicon carbide crystal are added to the silicon carbide crystal.
本発明の半導体装置は、Ｓｉ結晶にＳｉＣよりなる結晶
がヘテロ接合として形成され、該ＳｉＣ結晶にのみ、ド
ナーとなる不純物原子が添加され、このＳｉＣ結晶層の
上にゲート電極が、ＳｉＣ結晶に対して金属を用いてシ
ョットキー接合で形成されている。In the semiconductor device of the present invention, a crystal made of SiC is formed as a heterojunction in a Si crystal, impurity atoms serving as a donor are added only to the SiC crystal, and a gate electrode is formed on the SiC crystal layer on the SiC crystal. On the other hand, it is formed using metal and a Schottky junction.
またＳｉの結晶層に対してはソースおよびドレイン電極
を形成し、ＳｉとＳｉＣのへテロ接合面のＳｔ側に、Ｓ
ｔとＳｉＣのエネルギーバンドギャップの相違により、
エネルギーの不連続となることで、ＳｉＣ結晶に注入さ
れてイオン化されたドナーにより発生した電子が蓄積さ
れる窪みが形成されている。In addition, source and drain electrodes are formed for the Si crystal layer, and S
Due to the difference in energy band gap between t and SiC,
The energy discontinuity forms a depression in which electrons generated by ionized donors injected into the SiC crystal are accumulated.
そしてＳｉ中の電子を、前記したイオン化したドナーで
、Ｓｉ中に注入されると散乱源となるドナーと分離して
高速で注入された電子が５ｉｊ５を通過するような電界
効果型トランジスタが得られる。Then, a field effect transistor is obtained in which the electrons in Si are separated from the donor which becomes a scattering source when injected into Si using the ionized donor described above, and the injected electrons pass through 5ij5 at high speed. .
またＳｉＣ結晶、Ｓｉ結晶、ＳｉＣ結晶が三層構造に形
成され、エミッタ、ベース、コレクタ領域が形成され、
このＳｉＣ結晶のみ、ドナーとなる窒素原子が添加され
、Ｓｉ結晶にはアクセプタとなるボロン（Ｂ）原子が予
め添加され、エミッタ領域を形成するＳｉＣＮと、ベー
ス領域を形成するＳｉ層の間のエネルギーバンドギャッ
プの相違によって形成される高ポテンシャルエネルギー
のホットエレクトロンを、ベース中に注入して高速でベ
ース領域を通過させるようにする。In addition, SiC crystal, Si crystal, and SiC crystal are formed in a three-layer structure, and emitter, base, and collector regions are formed.
Only this SiC crystal is doped with nitrogen atoms to serve as donors, and the Si crystal is pre-doped with boron (B) atoms to serve as acceptors. Hot electrons with high potential energy formed by the difference in band gaps are injected into the base and are caused to pass through the base region at high speed.
以下、図面を用いて本発明の一実施例につき詳細に説明
する。Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.
第１図は本発明の半導体装置の第１の実施例を示す断面
図で図示するように、Ｓｉ基板１上にモノシラン（Ｓｉ
Ｈａ）ガスとプロパンガス（Ｃ３Ｈ）とを反応ガスとし
て用い、水素ガスをキャリアガスとして用い、反応温度
を１０００℃とした気相エピタキシャル成長法によりＳ
ｉＣの結晶層２が１００ｎＩｒｌの厚さに形成され、前
記したＳｉ基板１上にＳｉＣの結晶層２がへテロ構造に
形成された後、このＳｊＣの結晶層２に窒素原子がイオ
ン注入されている。FIG. 1 is a sectional view showing a first embodiment of the semiconductor device of the present invention. As shown in FIG.
Ha) gas and propane gas (C3H) as reaction gases, hydrogen gas as a carrier gas, and a reaction temperature of 1000°C by vapor phase epitaxial growth.
After the iC crystal layer 2 is formed to a thickness of 100 nIrl and the SiC crystal layer 2 is formed in a heterostructure on the Si substrate 1 described above, nitrogen atoms are ion-implanted into the SjC crystal layer 2. There is.
更にＳｉＣの結晶層２上にアルミニウム（八Ω）金ｆＥ
ＩＷが蒸着法、およびホトリソグラフィ法を用いて所定
のパターンに形成され、ゲート電極４がショットキィ接
合の状態で形成されている。Furthermore, aluminum (8Ω) gold fE is applied on the SiC crystal layer 2.
IW is formed into a predetermined pattern using a vapor deposition method and a photolithography method, and the gate electrode 4 is formed in a Schottky junction state.
更にソース、及びドレイン領域に砒素イオンが注入され
、その上にＮｉの金属電極をアロイ法で形成してソース
電極３とドレイン電極５とが、オーミック接合の状態で
形成されている。Further, arsenic ions are implanted into the source and drain regions, and a Ni metal electrode is formed thereon by an alloying method, so that the source electrode 3 and the drain electrode 5 are formed in an ohmic contact state.
このような半導体装置のエネルギーバンドギャップの状
態図を第２図に示す。FIG. 2 shows a phase diagram of the energy band gap of such a semiconductor device.
図示するように、エネルギーバンドギャップの大きいＳ
ｉＣ結晶２とＳｉＣ結晶２よりエネルギーバンドギャッ
プの狭いＳｉの結晶１との間の結晶境界面６にはエネル
ギーバンド幅の不連続となる箇所が生じ、Ｓｉ結晶１側
に於いて、Ｓｉの伝導帯Ｅｃの底のエネルギー値が、フ
ェルミレベルＥＦより下の位置になり、この箇所に窪み
７が生じる。As shown in the figure, S with a large energy bandgap
At the crystal boundary surface 6 between the iC crystal 2 and the Si crystal 1, which has a narrower energy bandgap than the SiC crystal 2, a discontinuous point in the energy band width occurs, and on the Si crystal 1 side, the Si conduction The energy value at the bottom of band Ec is below the Fermi level EF, and a depression 7 is generated at this location.
そしてイオン化によって発生した電子８が前記した窪み
７内に蓄積される。Electrons 8 generated by ionization are accumulated in the depression 7 described above.
そしてこの窪み７内に蓄積された電子８は、イオン９と
分離され、電子のみ単独の状態となり、この電子が、不
純物原子が添加されていない為にこの電子が衝突するキ
ャリアが無いＳｔ結晶層１内を高速で通過し、そのため
に高速で動作する電界効果型トランジスタが得られる。The electrons 8 accumulated in the recess 7 are separated from the ions 9 and become a single electron, and the electrons are transferred to the St crystal layer, which has no carriers to collide with since no impurity atoms are added. 1 at a high speed, resulting in a field effect transistor that operates at high speed.
また本発明の半導体装置の第２の実施例を第３図に示す
。Further, a second embodiment of the semiconductor device of the present invention is shown in FIG.
第３図は本発明の半導体装置の要部を示す断面図で、図
示するように予めボロン等のアクセプタとなる不純物原
子が添加されたＳｉの結晶基板１１上には、前記した気
相エピタキシャル成長法によりＳｉＣの結晶層１２が形
成されている。FIG. 3 is a cross-sectional view showing the main part of the semiconductor device of the present invention. A crystal layer 12 of SiC is formed.
このＳｉＣの結晶層１２内には、該ＳｉＣ結晶層１２内
に添加された時にはドナーとなるが、Ｓｉ結晶１１内に
添加された時にはドナー、およびアクセプタと＋８
成らない窒素原子を１０７ｃＩ１１２の原子濃度でＳｉ
Ｃ結晶１２内にイオン注入されている。In this SiC crystal layer 12, nitrogen atoms, which become donors when added to the SiC crystal layer 12, but which do not form a donor and an acceptor when added into the Si crystal 11, have an atomic concentration of 107cI112. DeSi
Ions are implanted into the C crystal 12.
するとこのＳｉ結晶１１とＳｉＣ結晶１２とのへテロ接
合面１３には、Ｐ−Ｎ接合面が、正確に判然と形成され
る。Then, a P-N junction plane is formed accurately and clearly at the heterojunction plane 13 between the Si crystal 11 and the SiC crystal 12.
そしてＳｉ結晶基板１１を所定の厚さにエツチング等に
より薄層化し、その下側に窒素原子が添加されたＳｉＣ
の結晶層１４を形成すれば、狭いエネルギーバンドギャ
ップのＰ型のＳｉ結晶１１を、両側より広いエネルギー
バンドギャップのＮ型のＳｉＣ結晶１２、１４で挟んだ
構造となる。Then, the Si crystal substrate 11 is thinned to a predetermined thickness by etching or the like, and the underside of the Si crystal substrate 11 is made into a thin layer with nitrogen atoms added thereto.
If the crystal layer 14 is formed, a structure will be obtained in which a P-type Si crystal 11 with a narrow energy bandgap is sandwiched between N-type SiC crystals 12 and 14 with a wider energy bandgap on both sides.
そして結晶層１２をエミッタ、結晶１１をベース、結晶
層１４をコレクタとすれば、このエネルギーバンドギャ
ップの広いＳｉＣの結晶１２に注入されたエミッタの電
子が、そのエネルギーバンドギャップの広いことで、高
いポテンシャルエネルギーでベース層１１を通過し、高
速で動作するホットエレクトロントランジスタが得られ
る。If the crystal layer 12 is used as an emitter, the crystal 11 is used as a base, and the crystal layer 14 is used as a collector, the emitter electrons injected into the SiC crystal 12 with a wide energy band gap will have a high Potential energy passes through the base layer 11, resulting in a hot electron transistor that operates at high speed.
以上述べたように、本発明の半導体装置によれば、高速
で動作する電界効果型トランジスタ、或いはホソトレク
トロントランジスタが、簡単な工程で容易に得られる効
果がある。As described above, the semiconductor device of the present invention has the advantage that a field effect transistor or phototrectron transistor that operates at high speed can be easily obtained through a simple process.
第１図は本発明の半導体装置の第１の実施例の要部構造
を示す断面図、
第２図は第１の実施例の半導体装置のエネルギーバンド
構造を示す模式図、
第３図は本発明の第２の実施例の要部構造を示す断面図
である。
図に於いて、FIG. 1 is a cross-sectional view showing the main structure of the first embodiment of the semiconductor device of the present invention, FIG. 2 is a schematic diagram showing the energy band structure of the semiconductor device of the first embodiment, and FIG. FIG. 7 is a cross-sectional view showing the main structure of a second embodiment of the invention. In the figure,
Claims (2)
）よりなる結晶（２）がヘテロ接合に形成され、該炭化
珪素結晶（２）にのみ、ドナーとなる不純物原子が添加
されていることを特徴とする半導体装置。(1) Silicon carbide (SiC) in silicon (Si) crystal (1)
) is formed in a heterojunction, and an impurity atom serving as a donor is added only to the silicon carbide crystal (2).
原子が添加され、更に前記炭化珪素結晶（２）にドナー
となる不純物原子が添加されていることを特徴とする特
許請求の範囲第１項記載の半導体装置。(2) Impurity atoms serving as acceptors are added to the silicon crystal in advance, and further impurity atoms serving as donors are added to the silicon carbide crystal (2). Semiconductor equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61193411A JPS6347984A (en) | 1986-08-18 | 1986-08-18 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61193411A JPS6347984A (en) | 1986-08-18 | 1986-08-18 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6347984A true JPS6347984A (en) | 1988-02-29 |
Family
ID=16307511
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61193411A Pending JPS6347984A (en) | 1986-08-18 | 1986-08-18 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6347984A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2317054A (en) * | 1996-09-09 | 1998-03-11 | Nissan Motor | Power MOSFET having a heterojunction |
| WO1999010919A1 (en) * | 1997-08-27 | 1999-03-04 | Matsushita Electric Industrial Co., Ltd. | Silicon carbide substrate, process for producing the same, and semiconductor element containing silicon carbide substrate |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59106154A (en) * | 1982-12-10 | 1984-06-19 | Hitachi Ltd | Semiconductor device |
| JPS60142568A (en) * | 1983-12-29 | 1985-07-27 | Sharp Corp | Manufacture of sic field effect transistor |
| JPS61150272A (en) * | 1984-12-24 | 1986-07-08 | Sharp Corp | Manufacture of silicon carbide semiconductor element |
| JPS61150271A (en) * | 1984-12-24 | 1986-07-08 | Sharp Corp | Manufacture of silicon carbide semiconductor element |
-
1986
- 1986-08-18 JP JP61193411A patent/JPS6347984A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59106154A (en) * | 1982-12-10 | 1984-06-19 | Hitachi Ltd | Semiconductor device |
| JPS60142568A (en) * | 1983-12-29 | 1985-07-27 | Sharp Corp | Manufacture of sic field effect transistor |
| JPS61150272A (en) * | 1984-12-24 | 1986-07-08 | Sharp Corp | Manufacture of silicon carbide semiconductor element |
| JPS61150271A (en) * | 1984-12-24 | 1986-07-08 | Sharp Corp | Manufacture of silicon carbide semiconductor element |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2317054A (en) * | 1996-09-09 | 1998-03-11 | Nissan Motor | Power MOSFET having a heterojunction |
| JPH1084113A (en) * | 1996-09-09 | 1998-03-31 | Nissan Motor Co Ltd | Field-effect transistor |
| GB2317054B (en) * | 1996-09-09 | 1998-10-14 | Nissan Motor | Power mosfet having hetero junction |
| WO1999010919A1 (en) * | 1997-08-27 | 1999-03-04 | Matsushita Electric Industrial Co., Ltd. | Silicon carbide substrate, process for producing the same, and semiconductor element containing silicon carbide substrate |
| US6270573B1 (en) | 1997-08-27 | 2001-08-07 | Matsushita Electric Industrial Co., Ltd. | Silicon carbide substrate, and method for producing the substrate, and semiconductor device utilizing the substrate |
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