JPS634754B2 - - Google Patents

Info

Publication number
JPS634754B2
JPS634754B2 JP56094671A JP9467181A JPS634754B2 JP S634754 B2 JPS634754 B2 JP S634754B2 JP 56094671 A JP56094671 A JP 56094671A JP 9467181 A JP9467181 A JP 9467181A JP S634754 B2 JPS634754 B2 JP S634754B2
Authority
JP
Japan
Prior art keywords
signal
noise
circuit
component
components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56094671A
Other languages
Japanese (ja)
Other versions
JPS57210406A (en
Inventor
Akira Hirota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP56094671A priority Critical patent/JPS57210406A/en
Priority to US06/389,041 priority patent/US4563704A/en
Priority to KR1019820002713A priority patent/KR840001034A/en
Priority to FR8210716A priority patent/FR2508261B1/en
Priority to GB08217850A priority patent/GB2104338B/en
Priority to DE3223066A priority patent/DE3223066C2/en
Publication of JPS57210406A publication Critical patent/JPS57210406A/en
Priority to KR2019870010200U priority patent/KR870003487Y1/en
Priority to KR2019870010865U priority patent/KR870003488Y1/en
Priority to MY309/87A priority patent/MY8700309A/en
Publication of JPS634754B2 publication Critical patent/JPS634754B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/91Television signal processing therefor
    • H04N5/911Television signal processing therefor for the suppression of noise
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • H04N5/21Circuitry for suppressing or minimising disturbance, e.g. moiré or halo

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Television Signal Processing For Recording (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Description

【発明の詳細な説明】 本発明はノイズリダクシヨン回路に係り、情報
信号からこの情報信号を遅延させて高域成分を除
去した信号を引算して高域成分を分離し、情報信
号から分離した高域成分を引算して高域成分を除
去された情報信号を得、情報信号の特に立上り直
後のノイズ成分を確実に除去し得るノイズリダク
シヨン回路を提供することを目的とする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a noise reduction circuit, which separates the high-frequency component from the information signal by subtracting a signal obtained by delaying the information signal and removing the high-frequency component from the information signal. It is an object of the present invention to provide a noise reduction circuit that obtains an information signal from which the high-frequency component has been removed by subtracting the high-frequency component, and can reliably remove noise components, especially immediately after the rise of the information signal.

家庭用小形磁気記録再生装置(以下VTRとい
う)では、特に、再生系においてFM復調された
再生輝度信号に重畳されたノイズ成分を除去する
所謂ノイズリダクシヨン回路が設けられており、
従来種々の回路が提案されている。第1図は従来
のノイズリダクシヨン回路の一例のブロツク系統
図を示す。
Small household magnetic recording and reproducing devices (hereinafter referred to as VTRs) are particularly equipped with a so-called noise reduction circuit that removes noise components superimposed on the FM demodulated reproduced brightness signal in the reproduction system.
Various circuits have been proposed in the past. FIG. 1 shows a block system diagram of an example of a conventional noise reduction circuit.

入力端子1に入来したノイズ成分を含むFM復
調された再生輝度信号の一部は、高域フイルタ2
にて高域成分を分離され、リミツタ3にて信号成
分である大振幅成分については振幅制限されてノ
イズ成分と考えられる小振幅成分のみそのままと
り出されて逆相で加算器4に供給される一方、こ
の再生輝度信号の他の一部はそのまま同相で加算
器4に供給される。加算器4においてノイズ成分
を重畳された再生輝度信号からノイズ成分が引算
され、出力端子5よりノイズ成分を除去された再
生輝度信号がとり出される。
A part of the FM demodulated reproduced luminance signal containing noise components that has entered input terminal 1 is passed through high-pass filter 2.
The high frequency components are separated by the limiter 3, and the amplitude of the large amplitude components which are signal components is limited by the limiter 3. Only the small amplitude components considered to be noise components are taken out as they are and supplied to the adder 4 in reverse phase. On the other hand, the other part of this reproduced luminance signal is supplied as is to the adder 4 in the same phase. The adder 4 subtracts the noise component from the reproduced luminance signal on which the noise component has been superimposed, and the output terminal 5 takes out the reproduced luminance signal from which the noise component has been removed.

然るに、この回路ではノイズ成分をとり出す手
段として高域フイルタ2及びリミツタ3を用いて
いるため、第2図に示す如く、特に輝度信号の立
上り直後(一般に、VTRでは黒から白に急激に
変化した時はエンフアシスが行なわれているので
SN比が悪く、この部分の高精度のノイズ除去が
望まれる)にあるノイズ成分nを除去し得ず、高
品質の画像が得られない欠点があつた。
However, since this circuit uses a high-pass filter 2 and a limiter 3 as means for extracting noise components, as shown in Fig. When you do this, emphasis is being performed, so
This method has the drawback that it cannot remove the noise component n, which has a poor signal-to-noise ratio and requires high-precision noise removal in this area, making it impossible to obtain a high-quality image.

本発明は上記欠点を除去したものであり、第3
図以下と共にその一実施例について説明する。
The present invention eliminates the above drawbacks, and the third
An example will be described below with reference to the drawings.

第3図は本発明になるノイズリダクシヨン回路
の一実施例のブロツク系統図を示す。同図におい
て、入力端子1に入来したノイズ成分を含むFM
復調された再生輝度信号a(第4図Aは、後述の
低域フイルタ6の立上り時間(0.5μsec〜2μsec)
を△とした場合(1H−△)(Hは1水平走査期
間)なる遅延量をもつ遅延回路8にて遅延され
る。即ち、遅延回路8の出力は第4図Bに示す如
き信号aの略1H前の信号bであり、信号bは低
域フイルタ6にてノイズ成分を含む高域成分を除
去されて信号c(第4図Cとされ、逆相で加算器
7に供給される。但し、低域フイルタは一般に積
分作用があるため、信号cはある時定数を以て立
上り、その波形は多少なまる。
FIG. 3 shows a block system diagram of one embodiment of the noise reduction circuit according to the present invention. In the same figure, FM including noise components that entered input terminal 1
Demodulated reproduced luminance signal a (FIG. 4A is the rise time (0.5 μsec to 2 μsec) of the low-pass filter 6, which will be described later)
The signal is delayed by the delay circuit 8 having a delay amount of (1H - Δ) (H is one horizontal scanning period) where Δ is Δ. That is, the output of the delay circuit 8 is a signal b approximately 1H before the signal a as shown in FIG. C in FIG. 4, and is supplied to the adder 7 in reverse phase.However, since a low-pass filter generally has an integral action, the signal c rises with a certain time constant, and its waveform is somewhat rounded.

一方、再生輝度信号aは同相で加算器7及び加
算器4に供給される。加算器7において、信号a
から信号cが引算されて高域成分のみとされ、リ
ミツタ9にて信号成分である大振幅信号成分のみ
振幅制限されてノイズ成分と考えられる小振幅成
分のみそのまま出力され、リミツタ9の出力は逆
相で加算器4に供給される。この際、加算器7で
は信号cのうち完全に立上つたHレベルの信号を
信号aから引算しているので、信号aの特に立上
り直後のノイズ成分を確実に分離とり出し得る。
On the other hand, the reproduced luminance signal a is supplied to the adder 7 and the adder 4 in the same phase. In the adder 7, the signal a
The signal c is subtracted from the signal c to obtain only the high-frequency component, and the limiter 9 limits the amplitude of only the large amplitude signal component, which is the signal component, and outputs only the small amplitude component, which is considered to be a noise component, as it is, and the output of the limiter 9 is It is supplied to the adder 4 in reverse phase. At this time, since the adder 7 subtracts the fully risen H level signal of the signal c from the signal a, it is possible to reliably separate out the noise component of the signal a, especially immediately after the rise.

加算器4において、信号aからリミツタ9の出
力のノイズ成分が引算され、出力端子5より第4
図Dに示す如きノイズ成分を除去された再生輝度
信号dがとり出される。なお、信号aから信号c
を引算する際、信号cにはある立下り時定数があ
るためにこの立下り部分のノイズ成分を完全にと
り出し得ず、このために加算器4における引算の
際に信号dの立下り直前に多少のノイズが残る
が、一般にVTRの再生輝度信号の立下りノイズ
は立上り直後のそれに比して小さく、又、この部
分のノイズは立上り直後のそれに比して目立たな
いため、これを完全に除去し得なくても実質的に
は殆ど問題ない。
In the adder 4, the noise component of the output of the limiter 9 is subtracted from the signal a, and the noise component of the output of the limiter 9 is subtracted from the signal a.
A reproduced luminance signal d from which noise components have been removed is extracted as shown in Figure D. In addition, from signal a to signal c
When subtracting, signal c has a certain falling time constant, so the noise component of this falling part cannot be completely extracted. Although some noise remains immediately before the start, the falling noise of the VTR's reproduced brightness signal is generally smaller than the noise immediately after the rise, and the noise in this part is less noticeable than the noise immediately after the rise, so it is necessary to completely eliminate this noise. Even if it cannot be removed immediately, there is practically no problem.

又、この立下り直前のノイズ成分除去について
は従来の方法との併用も可能である。
Furthermore, the removal of the noise component immediately before the fall can be performed in combination with conventional methods.

第5図は本発明回路を実際のVTRに適用した
ブロツク系統図を示し、同図中、第3図と同一構
成部分には同一番号を付す。同図において、FM
変調された輝度信号と低域変換された搬送色信号
とが重畳されて記録されている磁気テープ10か
ら磁気ヘツド11にて映像信号が再生され、プリ
アンプ12を経て高域フイルタ13にて輝度信号
a′が分離されてとり出される。なお、搬送色信号
系は省略する。
FIG. 5 shows a block system diagram in which the circuit of the present invention is applied to an actual VTR, in which the same components as in FIG. 3 are given the same numbers. In the same figure, FM
A video signal is reproduced by a magnetic head 11 from a magnetic tape 10 on which a modulated luminance signal and a carrier color signal subjected to low frequency conversion are superimposed and recorded.
a′ is separated and extracted. Note that the carrier color signal system is omitted.

輝度信号a′はリミツタ14にて振幅制限された
後FM復調器15にてFM復調されて信号aとさ
れ、同相で加算器7に供給される一方、遅延回路
8にて遅延されてリミツタ16にて振幅制限され
た後FM復調されて信号bとされ、低域フイルタ
6にて信号cとされて逆相で加算器7に供給され
る。以後の動作は第3図において説明した動作と
同様であるので、その説明を省略する。
The luminance signal a' is amplitude limited by the limiter 14 and then FM demodulated by the FM demodulator 15 to form the signal a, which is supplied in phase to the adder 7 while being delayed by the delay circuit 8 and sent to the limiter 16. After the amplitude is limited at , the signal is FM demodulated into a signal b, which is converted into a signal c by a low-pass filter 6 and supplied to an adder 7 in reverse phase. Since the subsequent operations are similar to those described in FIG. 3, their explanation will be omitted.

この輝度信号再生系によれば、出力端子5より
とり出される輝度信号のタイミングは原輝度信号
のままで遅延されていないため、搬送色信号系は
このままのタイミングで処理し得る。
According to this luminance signal reproduction system, the timing of the luminance signal taken out from the output terminal 5 remains the original luminance signal and is not delayed, so that the carrier color signal system can be processed with the same timing.

上述の如く、本発明になるノイズリダクシヨン
回路は、情報信号を所定量遅延した後高域成分を
除去するフイルタ回路と、情報信号からこのフイ
ルタ回路の出力を引算して高域成分を分離してと
り出す演算回路と、この演算回路の出力に対し、
信号成分である大振幅成分についてはその振幅を
制限し、ノイズ成分と考えられる小振幅成分につ
いてはそのまま出力するリミツタと、情報信号か
らリミツタの出力を引算する回路とを設けたた
め、情報信号の特に立上り直後のノイズ成分を確
実に分離し得、これにより、ノイズ成分を確実に
除去し得、特に、VTRの輝度信号のノイズリダ
クシヨン回路に適用した場合、輝度信号のノイズ
成分を高域フイルタのみにて分離して輝度信号か
らこのノイズ成分を引算していた従来の回路に比
して黒から白に急激に変化した直後のノイズ成分
を確実に除去し得、高品質の画像を得ることがで
き、又、輝度信号は遅延されずにそのままとり出
されるので、搬送色信号系にタイミングを一致さ
せるための回路を必要としない等の特長を有す
る。
As described above, the noise reduction circuit of the present invention includes a filter circuit that removes high-frequency components after delaying an information signal by a predetermined amount, and a filter circuit that removes high-frequency components after delaying an information signal by a predetermined amount. For the arithmetic circuit and the output of this arithmetic circuit,
We installed a limiter that limits the amplitude of the large amplitude component that is the signal component, and outputs the small amplitude component that is considered to be a noise component as is, and a circuit that subtracts the output of the limiter from the information signal. In particular, it is possible to reliably separate the noise component immediately after the rise, thereby reliably removing the noise component. In particular, when applied to a noise reduction circuit for the brightness signal of a VTR, the noise component of the brightness signal can be removed using a high-pass filter. Compared to conventional circuits that separate the noise components using a chisel and subtract this noise component from the luminance signal, it is possible to reliably remove the noise component immediately after a sudden change from black to white, resulting in a high-quality image. Furthermore, since the luminance signal is taken out as is without being delayed, it has the advantage of not requiring a circuit for matching the timing with the carrier color signal system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は夫々従来回路の一例のブロ
ツク系統図及びその出力信号波形図、第3図及び
第4図A〜Dは夫々本発明回路の一実施例のブロ
ツク系統図及びその動作説明用信号波形図、第5
図は本発明回路をVTRの輝度信号再生系に適用
したブロツク系統図である。 1……入力端子、4,7……加算器、5……出
力端子、6……低域フイルタ、8……遅延回路、
9……リミツタ。
1 and 2 are block system diagrams and their output signal waveform diagrams, respectively, of an example of a conventional circuit, and FIGS. 3 and 4, A to D, are block system diagrams and their operations, respectively, of an embodiment of the circuit of the present invention. Explanatory signal waveform diagram, 5th
The figure is a block system diagram in which the circuit of the present invention is applied to a brightness signal reproducing system of a VTR. 1...Input terminal, 4, 7...Adder, 5...Output terminal, 6...Low pass filter, 8...Delay circuit,
9...Limitsuta.

Claims (1)

【特許請求の範囲】[Claims] 1 情報信号からノイズ成分を分離してとり出
し、該情報信号と該ノイズ成分とを演算して該情
報信号から該ノイズ成分を除去するノイズリダク
シヨン回路において、該情報信号を所定量遅延し
た後高域成分を除去するフイルタ回路と、該情報
信号から該フイルタ回路の出力を引算して高域成
分を分離してとり出す演算回路と、該演算回路の
出力に対し信号成分である大振幅成分については
その振幅を制限し、ノイズ成分と考えられる小振
幅成分はそのまま出力するリミツタと、該情報信
号から該リミツタの出力を引算する回路とよりな
ることを特徴とするノイズリダクシヨン回路。
1. In a noise reduction circuit that separates and extracts a noise component from an information signal, calculates the information signal and the noise component, and removes the noise component from the information signal, after delaying the information signal by a predetermined amount. A filter circuit that removes high-frequency components; an arithmetic circuit that subtracts the output of the filter circuit from the information signal to separate and extract the high-frequency components; and a large amplitude signal component for the output of the arithmetic circuit. 1. A noise reduction circuit comprising: a limiter that limits the amplitude of components and outputs small amplitude components considered to be noise components as they are; and a circuit that subtracts the output of the limiter from the information signal.
JP56094671A 1981-06-19 1981-06-19 Noise reduction circuit Granted JPS57210406A (en)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP56094671A JPS57210406A (en) 1981-06-19 1981-06-19 Noise reduction circuit
US06/389,041 US4563704A (en) 1981-06-19 1982-06-16 Noise reduction circuit for a video signal
KR1019820002713A KR840001034A (en) 1981-06-19 1982-06-18 Noise reduction circuit
FR8210716A FR2508261B1 (en) 1981-06-19 1982-06-18 NOISE REDUCTION CIRCUIT FOR VIDEO SIGNALS
DE3223066A DE3223066C2 (en) 1981-06-19 1982-06-21 Noise reduction circuit
GB08217850A GB2104338B (en) 1981-06-19 1982-06-21 Noise reduction circuit for a video signal
KR2019870010200U KR870003487Y1 (en) 1981-06-19 1987-06-25 Noise reduced circuit
KR2019870010865U KR870003488Y1 (en) 1981-06-19 1987-07-03 Noise reduced circuit
MY309/87A MY8700309A (en) 1981-06-19 1987-12-30 Noise reduction circuit for a video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56094671A JPS57210406A (en) 1981-06-19 1981-06-19 Noise reduction circuit

Publications (2)

Publication Number Publication Date
JPS57210406A JPS57210406A (en) 1982-12-24
JPS634754B2 true JPS634754B2 (en) 1988-01-30

Family

ID=14116695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56094671A Granted JPS57210406A (en) 1981-06-19 1981-06-19 Noise reduction circuit

Country Status (1)

Country Link
JP (1) JPS57210406A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61159876A (en) * 1984-12-29 1986-07-19 Victor Co Of Japan Ltd Noise elimination circuit

Also Published As

Publication number Publication date
JPS57210406A (en) 1982-12-24

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