JPS6344520U - - Google Patents
Info
- Publication number
- JPS6344520U JPS6344520U JP13842186U JP13842186U JPS6344520U JP S6344520 U JPS6344520 U JP S6344520U JP 13842186 U JP13842186 U JP 13842186U JP 13842186 U JP13842186 U JP 13842186U JP S6344520 U JPS6344520 U JP S6344520U
- Authority
- JP
- Japan
- Prior art keywords
- contact
- control terminal
- power supply
- circuit
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Noise Elimination (AREA)
- Amplifiers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13842186U JPS6344520U (en17) | 1986-09-09 | 1986-09-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13842186U JPS6344520U (en17) | 1986-09-09 | 1986-09-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6344520U true JPS6344520U (en17) | 1988-03-25 |
Family
ID=31043389
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13842186U Pending JPS6344520U (en17) | 1986-09-09 | 1986-09-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6344520U (en17) |
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1986
- 1986-09-09 JP JP13842186U patent/JPS6344520U/ja active Pending