JPS6342750Y2 - - Google Patents
Info
- Publication number
- JPS6342750Y2 JPS6342750Y2 JP1982086779U JP8677982U JPS6342750Y2 JP S6342750 Y2 JPS6342750 Y2 JP S6342750Y2 JP 1982086779 U JP1982086779 U JP 1982086779U JP 8677982 U JP8677982 U JP 8677982U JP S6342750 Y2 JPS6342750 Y2 JP S6342750Y2
- Authority
- JP
- Japan
- Prior art keywords
- local
- diode
- switch
- high frequency
- reception
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000008054 signal transmission Effects 0.000 claims description 7
- 239000003990 capacitor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 1
Description
【考案の詳細な説明】
本考案は受信機、殊にFM受信機のDX（遠距離
受信）−Local（近距離受信）切換回路に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a DX (long distance reception)-Local (short distance reception) switching circuit for a receiver, particularly an FM receiver.
第１図はFM受信部にDX−Local切換回路が設
けられたFM−AM受信機の従来例を示す要部回
路図である。 FIG. 1 is a main circuit diagram showing a conventional example of an FM-AM receiver in which a DX-Local switching circuit is provided in the FM receiving section.
第１図に於いて、１はアンテナ、２はFMチユ
ーナ部、３はアンテナ１とFMチユーナ部２との
間に設けたDX−Local切換回路で、抵抗R1，R2
及びDX−Local切換スイツチS1とで構成されて
いる。４はAMチユーナー部、L1，C1はアンテナ
１とAMチユーナー部４との間に設けたFM、
AMの各受信信号分離用のコイル、及び直流カツ
ト用コンデンサ、S2はバンド切換スイツチであ
る。 In Figure 1, 1 is an antenna, 2 is an FM tuner section, 3 is a DX-Local switching circuit provided between the antenna 1 and FM tuner section 2, and resistors R 1 and R 2
and a DX-Local changeover switch S1 . 4 is an AM tuner section, L 1 , C 1 is an FM installed between the antenna 1 and the AM tuner section 4,
A coil for separating each AM received signal, a capacitor for DC cut, and S2 is a band selection switch.
第１図の回路で、FM受信時にはDX受信時抵
抗R1がスイツチS1にて短絡されるとともに抵抗
R2の非アース側が開放され、Local受信時は抵抗
R1とR2がアンテナ１とアース５間に直列に接続
されるので、抵抗R1とR2の比によりDX受信時の
受信信号レベルとLocal受信時の受信信号レベル
の比（即ちDX／Local比）が得られる。 In the circuit shown in Figure 1, when receiving FM, the resistor R 1 is shorted by switch S 1 and the resistor R 1 is shorted when receiving DX.
The non-ground side of R2 is open, and there is a resistance during local reception.
Since R 1 and R 2 are connected in series between antenna 1 and ground 5, the ratio of the received signal level during DX reception and the received signal level during local reception (i.e. DX/ Local ratio) is obtained.
然しながら第１図の回路では、DX−Local切
換スイツチS1と高周波信号伝送路６とを接続する
ためのリード線や印刷配線基板のパターンが長く
なると、不安定な受信状態になつたり、受信感度
が悪くなる等特性が劣化する欠点があつた。 However, in the circuit shown in Fig. 1, if the lead wires and printed wiring board patterns used to connect the DX-Local switch S 1 and the high-frequency signal transmission line 6 become long, the receiving condition may become unstable or the receiving sensitivity may deteriorate. There was a drawback that the characteristics deteriorated, such as poor performance.
この様な欠点を解消した回路として、従来から
第２図に示す回路が知られている。 A circuit shown in FIG. 2 has been known as a circuit that eliminates such drawbacks.
第２図に於いて、C2はFM高周波信号伝送路６
に直列接続された直流カツト用コンデンサ、D1
はFM高周波信号伝送路６とアース間に接続した
PINダイオードで、該PINダイオードは順方向電
流が1μA〜10ｍＡ程度即ち抵抗値が数KΩ〜10Ω
程度迄変化する可変インピーダンス素子である。
R3はDX−Local切換スイツチS1のLocal側固定端
子とPINダイオードD1のアノード間に接続した
抵抗である。 In Figure 2, C 2 is the FM high frequency signal transmission line 6.
DC cut capacitor connected in series with D 1
is connected between FM high frequency signal transmission line 6 and ground.
The PIN diode has a forward current of about 1 μA to 10 mA, or a resistance value of several kilohms to 10 ohms.
It is a variable impedance element that changes to a certain degree.
R3 is a resistor connected between the Local side fixed terminal of the DX-Local changeover switch S1 and the anode of the PIN diode D1 .
次に第２図の回路の動作を具体的な数値を用い
て説明する。 Next, the operation of the circuit shown in FIG. 2 will be explained using specific numerical values.
一例として、FM受信時の受信周波数90MHz、
アンテナインピーダンス75Ω、C2＝33PF、Local
時のPINダイオードD1の順方向電流が５ｍＡで、
このときのPINダイオードD1の抵抗値を20Ωとす
る。 As an example, the reception frequency when receiving FM is 90MHz,
Antenna impedance 75Ω, C 2 = 33PF, Local
When the forward current of PIN diode D1 is 5mA,
The resistance value of PIN diode D 1 at this time is 20Ω.
このときアンテナインピーダンスがコンデンサ
C2を経てPINダイオードD1のアノード側端子に
変換される抵抗値は、受信周波数90MHzに於いて
約112Ωとなる。そしてDX受信時、PINダイオー
ドD1には電流が流れずPINダイオードD1の抵抗
値は数KΩ以上になるので、このPINダイオード
D1による挿入損失は無視出来る。一方Local受信
時PINダイオードD1の抵抗値は20Ωとなるので、
DX受信時とLocal受信時の受信信号レベルの比
（DX／Local比）は約16dB得られる。 At this time, the antenna impedance is the capacitor.
The resistance value converted to the anode side terminal of PIN diode D 1 via C 2 is approximately 112Ω at a receiving frequency of 90 MHz. When receiving DX, no current flows through PIN diode D 1 , and the resistance value of PIN diode D 1 becomes several kilohms or more, so this PIN diode
Insertion loss due to D 1 can be ignored. On the other hand, during local reception, the resistance value of PIN diode D 1 is 20Ω, so
The ratio of the received signal level during DX reception and local reception (DX/Local ratio) is approximately 16dB.
この様に第２図の回路では、FMチユーナー部
２の入力端をPINダイオードD1で終端すること
によつて所望のDX／Local比を得る様にしてい
る。 In this manner, in the circuit shown in FIG. 2, a desired DX/Local ratio is obtained by terminating the input end of the FM tuner section 2 with the PIN diode D1 .
然しながら第２図の回路の場合、FM受信時に
はLocal受信時、FMチユーナー部２の入力端を
低インピーダンスで終端するためにFMチユーナ
ー部２内の同調周波数可変形アンテナ同調回路９
のＱを低下させてしまう。そのため、アンテナ同
調回路９の選択度特性が悪くなり、アンテナ同調
回路９で不要信号を充分に減衰させることが出来
ず、殊に隣接チヤンネルの信号を充分に除去する
ことが出来ず、混信を起こし易いという欠点があ
つた。 However, in the case of the circuit shown in Fig. 2, during FM reception, the variable tuning frequency antenna tuning circuit 9 in the FM tuner section 2 is used to terminate the input end of the FM tuner section 2 with low impedance during local reception.
This reduces the Q of As a result, the selectivity characteristics of the antenna tuning circuit 9 deteriorate, and the antenna tuning circuit 9 cannot sufficiently attenuate unnecessary signals, especially the signals of adjacent channels cannot be sufficiently removed, causing interference. It had the disadvantage of being easy.
本考案は斯る点に鑑み、アンテナ同調回路のＱ
を低下させることなく大きなDX／Local比を得
ることが出来、且つ大入力特性をも改善した受信
機を提案するもので、以下本考案の一実施例を第
３図に従い説明する。 In view of this, the present invention has been developed to improve the Q of the antenna tuning circuit.
This invention proposes a receiver that can obtain a large DX/Local ratio without reducing the DX/Local ratio and also has improved large input characteristics.An embodiment of the present invention will be described below with reference to FIG.
尚、第３図に於いて、第１図、第２図と同一部
分については第１図、第２図と同一図番を用いる
ことにする。 In FIG. 3, the same parts as in FIGS. 1 and 2 are designated by the same numbers as in FIGS. 1 and 2.
第３図に於いてD2はFM高周波信号伝送路６に
直列接続した高周波スイツチング用ダイオード
（例えば周波数が100MHzで数ｍＡの電流が流れる
ときの抵抗値が1Ω以下、逆バイアス状態で極間
容量が2PF以下になるようにしたダイオード）
で、このダイオードD2はカソードがアンテナ１
側になる様に接続している。R4，R5は一端がダ
イオードD2のカソード及びアノードに夫々接続
された第１第２抵抗で、抵抗R4は他端がバンド
切換スイツチS2のFM側固定端子に、抵抗R5は他
端がDX−Local切換スイツチS1のDX側固定端子
に接続されている。 In Fig. 3, D 2 is a high frequency switching diode connected in series to the FM high frequency signal transmission line 6 (for example, the resistance value is 1Ω or less when a current of several mA flows at a frequency of 100 MHz, and the capacitance between poles in a reverse bias state). (diode with 2PF or less)
So, the cathode of this diode D 2 is connected to antenna 1.
It is connected so that it is on the side. R 4 and R 5 are first and second resistors whose one end is connected to the cathode and anode of the diode D 2 , respectively, the other end of the resistor R 4 is connected to the FM side fixed terminal of the band switching switch S 2, and the resistor R 5 is connected to the FM side fixed terminal of the band switching switch S 2 . The other end is connected to the DX side fixed terminal of DX-Local switch S1 .
Q1はコレクタ・エミツタ路がコイルL1の一端
とアース５間に接続され、ベースが抵抗R6を介
してDX−Local切換スイツチS1のDX側固定端子
に接続されたスイツチングトランジスタである。 Q1 is a switching transistor whose collector-emitter path is connected between one end of coil L1 and ground 5, and whose base is connected to the DX side fixed terminal of DX-Local changeover switch S1 via resistor R6 . .
次に第３図の回路の動作について説明する。 Next, the operation of the circuit shown in FIG. 3 will be explained.
先ずFM受信時、DX−Local切換スイツチS1を
DX側に設定したとき（DX受信時）。このとき、
電源電圧供給線路７からスイツチS2，S1及び抵抗
R6を介してトランジスタQ1のベースに電圧が印
加されてトランジスタQ1がON状態になるととも
に、ダイオードD2がON状態となつて、電源電圧
供給線路７→スイツチS2，S1→抵抗R5→ダイオ
ードD2→コイルL1→トランジスタQ1→アース５
の経路で電流が流れ、ダイオードD2の抵抗値は
非常に小さくなる。〔例えばダイオードD2には２
〜３ｍＡの電流が流れ、ダイオードD2の抵抗値
が0.5Ω程度になる様に構成されている。〕
次にFM受信時DX−Local切換スイツチS1を
Local側に設定したとき（Local受信時）。 First, when receiving FM, set the DX-Local switch S 1 .
When set to the DX side (when receiving DX). At this time,
From the power supply voltage supply line 7 to switches S 2 , S 1 and resistors
A voltage is applied to the base of the transistor Q 1 via R 6 to turn on the transistor Q 1 , and at the same time, the diode D 2 turns on, and the power supply voltage supply line 7 → switch S 2 , S 1 → resistor R 5 → Diode D 2 → Coil L 1 → Transistor Q 1 → Earth 5
Current flows through the path, and the resistance of diode D2 becomes very small. [For example, diode D 2 has 2
The structure is such that a current of ~3 mA flows and the resistance value of diode D2 is approximately 0.5Ω. ] Next, when receiving FM, set the DX-Local switch S1.
When set to Local side (when receiving Local).
このときトランジスタQ1のベース及びダイオ
ードD2のアノードには電圧が印加されず、トラ
ンジスタQ1及びダイオードD2は共にOFF状態に
なる。更にダイオードD2のカソード側には電源
供給線路７から抵抗R4を介して＋Ｂ電圧（約8V）
が印加され、ダイオードD2は逆バイアスに設定
される。 At this time, no voltage is applied to the base of the transistor Q 1 and the anode of the diode D 2 , and both the transistor Q 1 and the diode D 2 are in an OFF state. Furthermore, +B voltage (approximately 8V) is connected to the cathode side of diode D 2 from power supply line 7 via resistor R 4 .
is applied and diode D 2 is set to reverse bias.
従つてアンテナ１とFMチユーナー部２との間
の結合部８に挿入されるインピーダンス素子につ
いて考えてみると、DX受信時にはダイオードD2
の抵抗値が非常に小さいからインピーダンス素子
として直流カツト用コンデンサC2のみが挿入さ
れていると見做されるのに対して、Local受信時
にはコンデンサC2とダイオードD2の極間容量
（1PF）とが直列に挿入されている。そのため
Local受信時には、DX受信時に較べアンテナ１
とFMチユーナー部２との結合部８で、挿入損失
と不整合損失が増大し、20〜30dB程度の大きな
DX／Local比が得られる。 Therefore, considering the impedance element inserted in the coupling part 8 between the antenna 1 and the FM tuner part 2, when receiving DX, the diode D 2
Since the resistance value of is very small, it is assumed that only the DC cut capacitor C 2 is inserted as an impedance element, whereas during local reception, the capacitance between capacitor C 2 and diode D 2 (1PF) is inserted. are inserted in series. Therefore
When receiving Local, antenna 1 is smaller than when receiving DX.
Insertion loss and mismatch loss increase at the coupling part 8 between the
DX/Local ratio is obtained.
この様に第３図の回路では、Local受信時同調
周波数可変形アンテナ同調回路９のＱを低下させ
ることなく、大きなDX／Local比が得られる。
従つてLocal受信時でもアンテナ同調回路９での
選択度特性が悪化しないから、アンテナ同調回路
９で不要信号を充分に減衰させることが出来、隣
接チヤンネル信号を充分に除去して混信が起こる
のを防止することが出来る。又Local受信時若し
高周波スイツチング用ダイオードD2に逆バイア
スをかけていなければ、大入力時ダイオードD2
が導通することによつて高調波成分が発生し、大
入力特性（３次以上の高調波による相互変調、混
変調）が悪化する。しかし第３図の回路では
Local受信時ダイオードD2のカソード側を＋Ｂ電
圧に持ち上げて大きな逆バイアスをかけているの
で、大入力時でもダイオードD2は導通しないか
ら高調波成分が発生せず、大入力特性を改善する
ことが出来る。 In this way, in the circuit shown in FIG. 3, a large DX/Local ratio can be obtained without lowering the Q of the variable frequency tuned antenna tuning circuit 9 during local reception.
Therefore, even during local reception, the selectivity characteristics of the antenna tuning circuit 9 do not deteriorate, so that the antenna tuning circuit 9 can sufficiently attenuate unnecessary signals and sufficiently remove adjacent channel signals to prevent interference. It can be prevented. Also, during local reception or if the high frequency switching diode D 2 is not reverse biased, the diode D 2
Due to conduction, harmonic components are generated, and large input characteristics (intermodulation and cross modulation due to harmonics of third order or higher) are deteriorated. However, in the circuit shown in Figure 3,
During local reception, the cathode side of diode D 2 is raised to +B voltage and a large reverse bias is applied, so diode D 2 does not conduct even during large inputs, so no harmonic components are generated, improving large input characteristics. I can do it.
以上の様に本考案に係る受信機のDX−Local
切換回路に依れば、Local受信時にもアンテナ同
調回路のＱを低下させることなく（即ち選択度特
性を悪化させることなく）しかも大きなDX／
Local比を得ることが出来る。又Local受信時高
周波信号伝送路に直列接続したダイオードに逆バ
イアスをかけているので大入力特性を改善するこ
とが出来る。また、DX−Local切換スイツチに
て、高周波スイツチング用ダイオード及びスイツ
チングトランジスタの導通を制御するようにした
ので、回路構成の簡素化が計れる。 As mentioned above, the DX-Local of the receiver according to the present invention
The switching circuit allows for large DX/
Local ratio can be obtained. Also, since a reverse bias is applied to the diode connected in series to the high frequency signal transmission line during local reception, large input characteristics can be improved. Further, since the DX-Local changeover switch controls the conduction of the high frequency switching diode and the switching transistor, the circuit configuration can be simplified.
第１図、第２図は従来のラジオ受信機のDX−
Local切換回路を示す図、第３図は本考案に係る
DX−Local切換回路を示す図である。
２……FMチユーナー部、６……高周波信号伝
送路、７……電源供給線路、D2……高周波スイ
ツチング用ダイオード、Q1……スイツチングト
ランジスタ、S1……DX−Local切換スイツチ、
R4，R5……第１第２の抵抗。
Figures 1 and 2 show the DX-
A diagram showing the local switching circuit, Figure 3 is related to the present invention.
FIG. 3 is a diagram showing a DX-Local switching circuit. 2...FM tuner section, 6...High frequency signal transmission line, 7...Power supply line, D2 ...High frequency switching diode, Q1 ...Switching transistor, S1 ...DX-Local changeover switch,
R 4 , R 5 ...first and second resistors.
Claims (1)
イツチング用ダイオードと、共通端子が電源供給
線路に接続されたDX−Local切換スイツチと、
前記高周波スイツチング用ダイオードの一端と前
記電源供給線路との間に接続された第１の抵抗
と、前記高周波スイツチング用ダイオードの他端
と前記スイツチのDX側固定端子との間に接続さ
れた第２の抵抗と、ベースが前記スイツチのDX
側固定端子に接続されるとともにコレクタ・エミ
ツタ路が前記高周波スイツチング用ダイオードの
一端とアース間に接続され、前記スイツチをDX
側に設定したとき導通し、前記スイツチをLocal
側に設定したとき非導通状態となるスイツチング
トランジスタよりなる受信機のDX−Local切換
回路。 A high frequency switching diode connected in series to a high frequency signal transmission line, a DX-Local changeover switch whose common terminal is connected to a power supply line,
A first resistor connected between one end of the high frequency switching diode and the power supply line, and a second resistor connected between the other end of the high frequency switching diode and the DX side fixed terminal of the switch. and the base is the switch's DX
The collector-emitter path is connected between one end of the high-frequency switching diode and ground, and the switch is connected to the DX side fixed terminal.
When set to the side, conduction occurs and the switch is set to Local
The receiver's DX-Local switching circuit consists of a switching transistor that becomes non-conductive when set to the side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8677982U JPS58189639U (en) | 1982-06-10 | 1982-06-10 | Receiver DX-Local switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8677982U JPS58189639U (en) | 1982-06-10 | 1982-06-10 | Receiver DX-Local switching circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58189639U JPS58189639U (en) | 1983-12-16 |
| JPS6342750Y2 true JPS6342750Y2 (en) | 1988-11-09 |
Family
ID=30095547
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8677982U Granted JPS58189639U (en) | 1982-06-10 | 1982-06-10 | Receiver DX-Local switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58189639U (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6489624A (en) * | 1987-09-29 | 1989-04-04 | Maruwa Denshi Kagaku Kk | Sensitivity switching circuit for electronic tuner |
| JP2007288500A (en) * | 2006-04-17 | 2007-11-01 | Alps Electric Co Ltd | Am and fm broadcast receiving circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4032169Y1 (en) * | 1965-06-07 | 1965-11-11 |
-
1982
- 1982-06-10 JP JP8677982U patent/JPS58189639U/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4032169Y1 (en) * | 1965-06-07 | 1965-11-11 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58189639U (en) | 1983-12-16 |
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