JPS6340503B2 - - Google Patents

Description

[Detailed Description of the Invention] (Technical Field) The present invention relates to SS-TDMA (Satellite Switched-
In the Time Division Multiple Access (Time Division Multiple Access) satellite communication system, this relates to a method for monitoring the voltage-controlled crystal oscillator (VCXO) mounted on the satellite at the ground station.

(Background Art) In the SS-TDMA satellite communication system of the digital communication network, it is important to synchronize the satellite onboard clock frequency with the terrestrial digital network. To this end, it is desirable to mount an oscillator that is highly stable over a long period of time, but it is expected that the long-term stability of the clock frequency onboard the satellite will be poor under harsh environmental conditions. Therefore, the onboard clock frequency is constantly monitored by the ground station, and when it exceeds a predetermined threshold, the satellite onboard clock frequency is controlled from the satellite ground station, or the ground station's signal transmission clock frequency is changed to the satellite onboard clock frequency. There are known methods of controlling to synchronize them. As a method for monitoring the on-board clock frequency for this purpose, a method has been proposed for the SS-TDMA satellite communication system that monitors the phase difference using a signal for maintaining synchronization. After the ground station detects the switching timing of the microwave switching matrix (MSM) onboard the satellite and detects the synchronization window by the initial acquisition,
Sends a synchronization burst signal to the MSM synchronization window. The synchronization burst signal is composed of a synchronization word, a unique word, a metric word for measuring a phase difference, and the like. The synchronization burst signal is transmitted from the ground station so that the metric word temporally overlaps with the falling region of the synchronization window, and the number of metric bits within the synchronization window and the number of metric bits outside the synchronization window are measured, and the number of metric bits outside the synchronization window is always measured. Synchronization is established by controlling the phase of transmission so that the amounts are equal. After synchronization is established, the phase is constantly monitored, short-term fluctuations are dealt with by phase control of transmission, and long-term fluctuations are handled by accumulating the phase error that has been monitored for a certain period of time, and when the phase error exceeds a threshold value. Sometimes it controls the ground station's clock frequency to maintain synchronization. This on-board clock frequency monitoring and control method is described in SS-
This is when considering a communication network consisting only of TDMA satellite communication systems, but when considering the use of SS-TDMA satellite communication systems in digital communication networks including terrestrial digital networks, it is possible to completely PCM of the digital terrestrial network that makes up the synchronization network
In order to transmit and receive signals over the SS-TDMA satellite communication line without any inconvenience, the satellite clock frequency of the SS-TDMA satellite line must be synchronized subordinately to the digital terrestrial network.

Figure 1 is a system configuration diagram of a digital communication network using the SS-TDMA satellite communication system. The PCM signal of the digital terrestrial network 1 is transmitted and received to the satellite ground terminal equipment 3a and 3b via the synchronous multiplex converter 2. In the satellite ground terminal equipment, writing to and reading from the buffer memory 6 is performed using a highly stable clock signal extracted from the PCM signal.
The buffer memory signal is SS- on the wireless line 7.
The multi-beam antenna 9, transponder 11,
It is transmitted via a satellite 10 having an MSM 12. There are two types of clock frequency fluctuation factors in the SS-TDMA satellite communication system: long-term factors such as the clock frequency onboard the satellite, and short-term factors such as the Doppler frequency due to changes in the distance between the satellite and the ground station. Short-term fluctuations can be absorbed by the buffer memory, but with conventional monitoring and control methods, PCM signals may overflow or disappear from the buffer memory when dealing with long-term fluctuations in the on-board clock. There was a drawback that it was interrupted.

(Problems to be solved by the invention) In order to solve these drawbacks, the present invention relates to monitoring and controlling the clock frequency onboard a satellite using a highly stable clock frequency extracted from the PCM signal of the terrestrial network. A microwave switching matrix controlled by a clock frequency generated by a voltage-controlled crystal oscillator is mounted on the satellite, and signals are transmitted and received in bursts between multiple spot beams in synchronization with a predetermined connection mode. In a communication network in which the SS-TDMA satellite communication system is synchronized subordinately to the digital terrestrial network, which is fully synchronized with a highly stable clock frequency, the satellite ground station
A measurement reference pulse with the same period as the transmission frame period of the satellite line is generated from a highly stable clock signal extracted from the PCM signal, and the transmission frame pulse of the ground station corresponding to the connection mode of the microwave switching matrix on the satellite is generated. By measuring the time difference (1) of the reference pulse and the time difference (2) between the received frame pulse and the reference pulse, and calculating the sum of the time difference (1) and the time difference (2), the Doppler frequency due to the satellite position fluctuation is calculated. This measurement is repeated at predetermined intervals, and the fluctuation frequency of the onboard clock frequency is determined from the rate of change of the sum of the time differences during this period and the nominal value of the onboard clock frequency. monitor,
If the onboard clock frequency deviates by more than a predetermined threshold, the onboard voltage-controlled crystal oscillator is controlled by commands from the ground station to synchronize the satellite clock frequency dependently on the terrestrial digital network even if the onboard clock frequency deviates. SS - Located in TDMA satellite communication system.

(Structure and operation of the invention) FIG. 2 is an embodiment of the present invention, and shows the structure of a station having the function of transmitting a synchronization burst to the synchronization window of the above-mentioned satellite-mounted MSM. In the figure, 16 is a PCM signal of a digital network, 17 is a PCM signal clock extraction circuit, 18 is a reference pulse P _s generation circuit for measuring the onboard clock frequency, and 19 is a multiplexed PCM signal in units of a predetermined number of channels. 20 is a circuit for converting the satellite line burst signal into a digital network PCM signal; 21 is a satellite onboard clock frequency monitoring unit;
6a is a transmitting buffer circuit, 6b is a receiving buffer circuit, 24 is a circuit for converting into a frame structure suitable for the satellite line, 25 is a circuit for separating the TDM signal of the satellite line into a predetermined number of channels, 26 is a transmitting data transmission timing and Sending pulse _Pt generation circuit, 27
28 is a circuit that converts an 8-bit parallel signal into a TDM serial signal. 29 is a circuit that converts a TDM serial signal of the satellite line into a parallel signal of 8 bits. 30 is a transmission timing from the received pulse. 31 is a clock signal generation circuit for transmitting and receiving signals on the satellite line, 32 is a modulator/demodulator, and 33 is a satellite onboard clock frequency display and control data generation circuit. When synchronization is maintained, the 16 PCM signals of the digital network are PCM
The highly stable clock signal extracted from the signal is received, and the PCM multiplexed signal is sent to a predetermined number of channels at 19.
For example, the data is separated into 6 channels and written to a transmission buffer circuit installed at each transmitting station 6a. 6a
The data is read out from the corresponding transmission buffer circuit by the control signal of the 26 transmission timing generation circuits, converted into a signal format suitable for the satellite line by the 24 transmission data synthesis control circuits, and serialized by the 28 parallel-serial conversion circuits. It is converted and sent out from a modem in synchronization with the satellite's MSM. The signals from the satellite are demodulated by 32 modulators, converted to parallel signals in 8-bit units by a serial-to-parallel conversion circuit, and then converted into 6 channels by 25 reception data distribution control circuits using control signals from 27 reception timing generation circuits. It is distributed into units and written to the corresponding receiving buffer circuit. 20 multiplex control circuits read out the data in the reception buffer circuit, convert it into a PCM multiplex signal of the digital network, and then send it out in synchronization with the digital network using a highly stable clock signal extracted from the PCM signal. The reception timing generation circuit 27 generates a reception timing signal from the reception signal from the satellite and assists the operation of the reception data distribution control circuit 25 as a control signal.
It also receives the synchronization burst sent by its own station, generates a reception frame pulse _Pr , and sends it to the satellite-mounted clock frequency monitoring section 21 and the transmission timing control section 30. The transmission timing control section 30 receives the transmission frame pulse P _t from the transmission timing generation circuit 26 at the time of the above-mentioned initial acquisition, detects and stores the temporal relationship with the reception frame pulse _Pr . Therefore, if the distance between the satellite and the ground station is constant, the transmission timing control section can reproduce the correct transmission frame pulse P _t from the latest reception frame pulse P _r . However, since the distance between the satellite and the ground station is constantly changing, a function to correct this is required.

That is, the reception timing control unit checks the number of metric bits received after passing through the synchronization window of the MSM onboard the satellite as described above, learns the error in the transmission timing of the synchronization burst from the result, and calculates the error between the known _Pr and the synchronization burst transmission timing. By correcting the difference from P _t ,
Control is performed so that the temporal position of the transmission frame pulse is always at a predetermined position.

Now, assuming that the distance between the satellite and the ground station is constant, the temporal positional relationship between the transmitted pulse and the received pulse is kept constant by controlling the transmission timing by advancing or delaying the transmission timing of the transmitted data. is maintained. However, 6a, 6
Writing and reading are performed in the transmitting/receiving buffer circuit b using a clock signal completely synchronized with the digital terrestrial network. Therefore, 21 on-board clock frequency monitoring units extract ±1
Based on the highly stable clock signal of 10 ^-11 and the measurement pulse P _s generated from that clock signal, P _s
The time difference between P _t and P _s and P _r is measured using the extracted clock signal. To measure the rate of change d of the on-board clock frequency from the measured time difference, it is sufficient to examine the change in the measured time difference over time; in this case, P _t −P _s ,
Alternatively, the result is the same no matter which time difference P _r −P _s is used. The on-board clock frequency display/control unit 33 multiplies the result by the nominal value _s of the on-board clock frequency to determine the fluctuating frequency, and displays this result. Since the rate of change d measured in this way actually includes the influence of the Doppler frequency due to positional fluctuations of the satellite, it is necessary to take measures to eliminate this influence.

Next, consider the case where the on-board clock frequency on the satellite is strictly synchronized with the clock frequency on the ground, and only the distance between the satellite and the ground station changes in one direction. In this case, the time difference P _t −P _s also changes in one direction, and the magnitude of the change matches the change in propagation time due to a change in the distance between the satellite and the ground station. On the other hand, P _r −P _s changes in the opposite direction, and the magnitude of the change is P _t −P _s
This is the same as in the case of . Therefore, by calculating the sum of the time differences of P _t -P _s and P _{r -s} , it is possible to cancel the influence of the variation in the distance between the satellite and the ground station.

Figure 3 is a block diagram of the satellite onboard clock frequency measurement method, which uses a highly stable clock signal (CLK) 34 extracted from the PCM signal of the terrestrial digital network.
A P _s 35 having the same period as the transmission frame period is generated. Further, the transmission timing generation circuit generates a transmission pulse 36 P _t that matches the transmission frame cycle, and the reception timing generation circuit generates a reception pulse 37 P _r that matches the reception frame cycle.

At a certain time T, the time difference T _t between P _s and P _t , P _s and
Measure the time difference T _r of P _r . Then T + ΔT
The same measurement is performed again at , and T _t ′ and T _r ′ are measured. As a result, if there is no influence on the Doppler frequency due to satellite fluctuations, the time difference due to fluctuations in the onboard clock frequency is T _t −T _t ′=Δt ……(1) T _r −T _r ′=Δt ……(2) . However, it is actually affected by the Doppler frequency. In other words, if the satellite moves away from the satellite ground station in (4) by ΔR at time ΔT, in order to maintain synchronization at the satellite ground station, ΔR/C (C is the speed of light) =
It is necessary to transmit earlier by ΔD, and the generation position of the transmission frame pulse _Pt is advanced by ΔD, and similarly, the generation position of the reception frame pulse is delayed by ΔD, as shown in the following equation.

T _t −T _t ′=Δt+ΔD ……(3) T _r −T _r ′=Δt−ΔD ……(4) Taking the sum of equations (3) and (4), (T _t −T _t ′) +(T _r −T _r ′)/2=Δt (5), so the influence of Doppler disappears, and only the temporal changes due to fluctuations in the on-board clock frequency occur. Now, if the rate of change during ΔT is d, then d=Δt/ΔT=(T _t −T _t ′)+(T _r −T _r ′)/2ΔT…
...(6), and the fluctuation frequency is displayed in 33 by multiplying the rate of change d by the nominal frequency of the satellite onboard clock. If the measured value deviates by more than a predetermined threshold, frequency control information is transmitted from the control circuit 33 to the ground telemeter/command control device 5 and the telemeter/command circuit 14 onboard the satellite via the telemeter/command line 8. The oscillation frequency of the VCXO is controlled to a predetermined value.

Using the clock signal extracted from the PCM signal of the digital terrestrial network as a reference, we measured the fluctuation of the clock frequency onboard the satellite as a temporal rate of change.
By controlling it, it becomes possible to synchronize dependently with the ground station digital network. Incidentally, the clock frequency stability for transmitting and receiving burst signals of the 31 satellite ground stations uses a highly stable oscillator that does not pose a system problem compared to the onboard clock frequency.

(Effect of the invention) As explained above, the position changes over time by following the clock frequency fluctuation of the satellite line, using the pulse P _s generated from the highly stable clock frequency extracted from the PCM signal of the terrestrial digital network as the reference. The time difference between the transmitted frame pulse P _t and the received frame pulse P _r with respect to P _s is measured, and the influence of the Doppler frequency is eliminated by summing them, and ΔT
By measuring at intervals of , it becomes possible to measure with a predetermined accuracy focusing on long-term fluctuations in the onboard clock frequency.

Furthermore, by adopting a monitoring method that uses a highly stable clock for digital networks, it is possible to use the SS-TDMA satellite line as a line synchronized with the terrestrial digital network, and there is no need for a highly stable oscillator for measurement at the satellite ground station. Become. It has the advantage that the onboard clock frequency, which is obtained by multiplying the measured rate of change d by the nominal frequency of the onboard clock frequency, can be directly observed at the satellite ground station.

[Brief explanation of the drawing]

Figure 1 is a system configuration diagram when the SS-TDMA satellite communication system is used in a digital network, Figure 2 is a configuration diagram of a satellite ground station TDMA device, and Figure 3 is a block diagram of the satellite onboard clock frequency monitoring method according to the present invention. It is a diagram. 1 is a terrestrial digital network, 2 is a synchronous multiplex converter for the terrestrial digital network, 3 is a satellite ground station device, 4 is a satellite ground monitoring station, 5 is a ground telemeter/command control device, 6 is a buffer memory, 7 is a wireless line, 8 is a telemeter/command line, 9 is a multi-beam antenna, 10 is a satellite, 11 is a transponder, 1
2 is MSM, 13 is VCXO, 14 is on-board telemeter/command circuit, 15 is control signal line, 16 is
PCM signal, 17 is a clock extraction circuit, 18 is a clock control circuit, 19 is a separation control circuit, 20 is a multiplex control circuit, 21 is a satellite onboard clock frequency monitoring circuit, 24 is a transmission data synthesis control circuit, 25 is a reception data distribution control circuit circuit, 26 is a transmission timing generation circuit, 27 is a reception timing generation circuit, 28 is a parallel-to-serial conversion circuit, 29 is a series-to-parallel conversion circuit, 3
0 is a transmission timing control circuit, 31 is a clock frequency, 32 is a modem, 33 is a satellite onboard clock frequency, display and control circuit, 34 is CLK (clock), 35 is a reference pulse P _s , 36 is a transmission frame pulse P _t , 37 is a received frame pulse P _r .

Claims (1)

[Claims] 1. A microwave switching matrix controlled by a clock frequency generated by a voltage-controlled crystal oscillator is mounted on the satellite, and signals are transmitted and received in bursts between multiple spot beams in synchronization with a predetermined connection mode. SS-TDMA
In a communication network in which the satellite communication system is subordinately synchronized with a digital terrestrial network that is fully synchronized with a highly stable clock frequency, a highly stable clock signal extracted from the PCM signal of the digital terrestrial network at a satellite ground station. Generates a reference pulse for measurement with the same period as the frame period of the satellite line from By measuring the time difference (2) between the pulse and the reference pulse, and taking the sum of the time difference (1) and the time difference (2), the influence of the Doppler frequency due to the satellite position fluctuation is canceled, and this measurement is carried out at a predetermined interval. The onboard clock frequency is monitored by the ground station by repeatedly determining the fluctuation frequency of the onboard clock frequency from the rate of change of the sum of the time differences and the nominal value of the onboard clock frequency during this period, and the onboard clock frequency is monitored at the ground station until the onboard clock frequency reaches a predetermined threshold. Even if the onboard clock frequency deviates, the satellite clock frequency can be synchronized subordinately to the terrestrial digital network by controlling the onboard voltage-controlled crystal oscillator with a command from the ground station.
SS - TDMA satellite communication system.