JPS6339141B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal processing device, and more particularly to a signal processing device for converting analog video signals generated in a photoelectric conversion unit such as a facsimile or OCR into multi-values.

An analog video signal photoelectrically converted in a facsimile or the like does not have a uniform size even if the original is completely white. The causes of this are variations in the light intensity distribution of the light source, a decrease in peripheral light intensity due to the lens, and the like. Generally, in facsimile, analog video signals are handled as binary (digital) signals, but as mentioned above, it is difficult to properly binarize the black (image) information superimposed on the non-uniform all-white analog video signal. A slice signal proportional to a uniform all-white analog video signal must be created. Generally, a floating slice level method is used to generate slice signals using an integrating circuit.
The slice level will not be accurate. For example, when a gray analog video signal is generated continuously, the floating slice level gradually approaches the black level, and eventually the gray information is binarized as white information.

Various correction methods have been proposed to eliminate such problems. The method of performing correction processing on the analog video signal itself, as described in JP-A-54-76008 and JP-A-53-38401, is difficult to use because the analog video signal containing image information is a high-frequency signal. The circuitry that performs the correction processing must have good high frequency characteristics and is expensive. Furthermore, the method described in JP-A-50-46425 is a method of converting an incoming analog video signal into multiple values by using a parabolic comparison level corresponding to distortion characteristics. The distortion characteristics of video signals are unique to new devices, and it is difficult to obtain parabolic characteristics that match each device. Therefore, it is easy to obtain a comparison level that accurately multi-values analog video signals. Not.

SUMMARY OF THE INVENTION An object of the present invention is to propose a signal processing device that can accurately convert an analog video signal containing image information into multiple values without requiring an expensive arithmetic processing circuit with good high frequency characteristics.

To this end, the present invention provides a signal processing device that compares an analog video signal generated for each scan with a reference signal voltage and converts it into a multi-value signal. A peak hold circuit that generates a hold voltage,
a reversible counter whose output is converted into an analog voltage by a digital-to-analog converter with reference to a peak hold voltage; means for causing a reversible counter to count; and initial value storage means for storing an output of the reversible counter as an initial value when the analog voltage becomes equal to an initial value of an all-white analog video signal containing no image information; The all-white analog video signal to be output is compared with the value of the reversible counter and the analog signal output from the digital-to-analog converter at the initial value, and the reversible counter is incremented or decremented so that the two become equal. a distortion value storage means for storing the up/down count control signal as a distortion value indicating the direction of deviation from the initial value of the all-white analog video signal; In response to the input, the initial value is read from the initial value storage means and loaded into the reversible counter, and the reversible counter is updated by the strain value read from the distortion value storage means.
means for performing down-count control and creating an analog signal as a reference for multileveling the analog video signal containing the image information; and a reference signal voltage obtained based on the analog signal voltage and an analog video containing the image information. The present invention is characterized in that it includes a comparing means for comparing the signals and converting the analog video signal containing the image information into a multivalued signal.

The following description will be given based on the drawings. In FIG. 1, reference numeral 1 denotes an information document for transmission in a facsimile or the like, which is illuminated by a light source 2 such as a fluorescent lamp. 3 is an imaging lens that images the scanning line area of the information document onto a photoelectric converter (line sensor) 4; 5 is the amplifier, 6
1 is a peak hold circuit, 7 is a storage/reproduction circuit for storing and reproducing the all-white shading waveform, and 8 is a binarization circuit. The output of the line sensor 4 is amplified by an amplifier 5 and input as an analog video signal AVS to a peak hold circuit 6, a storage/reproduction circuit 7, and a binarization circuit 8. Incidentally, even when the information document is completely white due to a decrease in the amount of light around the lens 3, the analog video AVS follows the all-white shading waveform AWS as shown in FIG.
Therefore, this analog video signal AVS can be correctly converted into 2
To convert into a value, use the all-white shading waveform.
We must create a slice signal VSS proportional to AWS. The storage/reproduction circuit 7 stores the distortion value of the all-white shading waveform AWS in advance, and then reads out this distortion value in synchronization with the incoming analog video signal, and refers to the peak hold voltage VP output from the peak hold circuit 6. to create the slice signal VSS.

FIG. 3 is a detailed diagram of the storage/reproduction circuit 7. 71
is a reversible counter which is controlled to be in count-up or count-down mode by the control signal UD and counts the driving clock CLK1.
This counter 71 also loads the output of a serial-to-parallel converter (S/P converter) 75 by being supplied with a load signal LD. 72
is a digital-to-analog converter (D/A converter)
Then, the output of the reversible counter 71 is converted into an analog output voltage VDA with reference to the peak hold voltage VP. A comparator 73 compares the magnitude of the output voltage VDA of the D/A converter 72 and the incoming analog video signal AVS. 74 is a memory device that stores the initial value V ₀ and distortion value of the analog video signal AVS. The S/P converter 75 described above is connected to the memory device 7
The serial information output from 4 is converted into parallel information. A parallel-to-serial converter (P/S converter) 76 operates under the control of the clock CLK3 and converts digital parallel information output from the reversible counter 71 into serial information. A voltage divider 77 divides the output voltage VDA of the D/A converter 72 and outputs a slice signal VSS.

Next, the operation will be explained with reference to FIGS. 4 and 5. First, the initial value of the all-white analog video signal AVS having the initial value V ₀ shown in FIG.
Detect and store V ₀ . During this detection period, the clock CLK1 is counted up by the reversible counter 71 during the initial period for each all-white analog video signal AVS that repeatedly enters. As a result, the output voltage VDA of the D/A converter 72 also increases with reference to the peak hold voltage VP. The count-up of the reversible counter 71 is controlled by the output of the comparator 73, and continues until the initial value _V0 and the output voltage VDA of the D/A converter 72 become equal, and then stops. The output of the reversible counter 71 at this time is a digital value of the initial value V ₀ , and by applying the control clock CLK3 to the P/S converter 76, this value is stored in the memory device 74. After the initial value _V0 is detected, the clock CLK1 is switched continuously during the analog video signal period,
Thereafter, a comparator 73 compares the incoming all-white analog video signal AVS with the output voltage VDA of the D/A converter 72.
While controlling the up and down of the reversible counter 71 with the output of this comparator 73,
The output voltage VDA of the D/A converter 72 is made to follow the waveform of the all-white video signal AVS. Then, the output signal of the comparator 73 at this time is stored in the memory device 74 as a distortion value indicating the direction of deviation from the initial value. The above is the storage operation of the all-white shading waveform.

Next, reproduction of slice signals will be explained. First, the digital value of the initial value V ₀ stored in the memory device 74 is read out to the S/P converter 75 . This reading is performed by applying the control clock CLK2 to the S/P converter 75. Thereafter, a load signal ID is given to the reversible counter 71, and the output of the S/P converter 75 (digital value of initial value _V0 ) is loaded.
As a result, the magnitude of the output voltage DVA of the D/A converter 72 becomes an initial value V ₀ corresponding to the peak hold voltage VP at that time. Next, the driving clock CLK1 is applied to the reversible counter 71, and at the same time, the above-mentioned distortion value stored in the memory device 74 is read out to control up and down of the reversible counter 71. Therefore, the reversible counter 71, that is, the D/A converter 72 outputs the same output voltage VDA during storage. This output voltage VDA is converted into a slice signal VSS by a voltage divider 77 and output.

In relatively slow signal processing equipment, the initial value
If V ₀ is not stored and reproduced, the reproduced waveform will be accurately reproduced during the clock counting period t ₀ until the output voltage VDA of the D/A converter 72 rises, as shown by the dotted line in FIG. It won't happen. Naturally, if a high-speed signal processing circuit is used, the t ₀ period can be made negligible. Such high-speed signal processing circuits are expensive. However, in the present invention, as soon as the analog video signal AVS comes in, the initial value V ₀
is loaded into the reversible counter 71, so the D/A
The output voltage VDA of converter 72 will immediately follow the all-white shaded waveform, and the accuracy of the slice signal can be improved without using expensive high-speed signal processing circuits.

As described above, according to the present invention, the initial value of an analog video signal is stored and used to reproduce this initial value and accurately generate a slice signal, thereby eliminating the need to use an expensive high-speed signal processing circuit. Therefore, it is possible to obtain a signal processing device that can correctly binarize an analog video signal without any problems.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention; FIG. 1 is a block diagram of a facsimile signal processing device, FIG. 2 is a signal waveform diagram, FIG. 3 is a block diagram of a storage/reproduction circuit, and FIG. 4 is a time chart. , FIG. 5 is a signal waveform diagram. 1... Information manuscript, 4... Photoelectric converter, 6... Peak hold circuit, 7... Memory reproducing circuit, 8...
Binarization circuit, 71... Reversible counter, 72...
D/A converter, 73... comparator, 74... memory device.

Claims (1)

[Claims] 1. In a signal processing device that compares an analog video generated for each scan with a reference signal voltage and converts it into a multi-value signal, the peak value of the incoming analog video signal is held and the peak hold voltage is adjusted accordingly. a reversible counter whose output is converted into an analog voltage with reference to the peak hold voltage by a digital-to-analog converter; and an all-white analog video signal in which the analog voltage does not include image information. means for causing the reversible counter to count until it becomes equal to an initial value of , and storing an output of the reversible counter as an initial value when the analog voltage becomes equal to an initial value of an all-white analog video signal that does not include image information. an initial value storage means for comparing the incoming all-white analog video signal with the analog signal output from the digital-to-analog converter when the value of the reversible counter is the initial value, means for generating an up/down count control signal for up/down counting control of a reversible counter; and a distortion value for storing the up/down count control signal as a distortion value indicating a direction of deviation from an initial value of an all-white analog video signal. storage means; in response to input of an analog video signal containing image information to be multivalued, the initial value is read out from the initial value storage means, loaded into the reversible counter, and read out from the distortion value storage means; means for controlling the reversible counter to count up or down according to the distortion value, and generating an analog signal voltage that is a reference for multi-leveling the analog video signal containing the image information; 1. A signal processing device comprising: comparing means for comparing the analog video signal containing the image information with the reference signal voltage obtained by the image information, and converting the analog video signal containing the image information into a multivalued signal.