JPS6333496U - - Google Patents
Info
- Publication number
- JPS6333496U JPS6333496U JP1986127456U JP12745686U JPS6333496U JP S6333496 U JPS6333496 U JP S6333496U JP 1986127456 U JP1986127456 U JP 1986127456U JP 12745686 U JP12745686 U JP 12745686U JP S6333496 U JPS6333496 U JP S6333496U
- Authority
- JP
- Japan
- Prior art keywords
- time
- circuit
- speaker
- outputs
- certain period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 238000003786 synthesis reaction Methods 0.000 claims description 2
- 230000005236 sound signal Effects 0.000 claims 2
- 230000007423 decrease Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Electric Clocks (AREA)
- Electromechanical Clocks (AREA)
Description
図面は、この考案の電子機器の実施例を示し、
第1図は第1実施例の結線図、第2図a〜dは第
1実施例の動作説明用タイミングチヤート、第3
図は第1実施例の動作説明図、第4図は第2実施
例の一部の結線図、第5図は第2実施例の動作説
明図、第6図は第3実施例の結線図、第7図a〜
dは第3実施例の動作説明用タイミングチヤート
である。
1,19……時計回路、11,34……メイン
アンプ、15,36……音声合成回路、18,3
9……音量制御回路。
The drawings show an embodiment of the electronic device of this invention,
FIG. 1 is a wiring diagram of the first embodiment, FIGS. 2 a to d are timing charts for explaining the operation of the first embodiment, and FIG.
The figure is an explanatory diagram of the operation of the first embodiment, Figure 4 is a partial wiring diagram of the second embodiment, Figure 5 is an explanatory diagram of the operation of the second embodiment, and Figure 6 is a wiring diagram of the third embodiment. , Figure 7 a~
d is a timing chart for explaining the operation of the third embodiment. 1, 19... Clock circuit, 11, 34... Main amplifier, 15, 36... Voice synthesis circuit, 18, 3
9...Volume control circuit.
Claims (1)
記設定時刻の前記一定時間前から前記設定時刻ま
での間、時刻データを送出する時計回路と、前記
時刻データを取り込んで音声合成し時刻音声信号
を出力する音声合成回路と、前記時刻音声信号を
スピーカより出力する出力回路と、前記スピーカ
からの出力音量を徐々に大きくあるいは小さく制
御する音量制御回路とを備えた電子機器。 A clock circuit that measures time and transmits time data for a certain period of time from a set time or from a certain period of time before the set time to the set time, and a clock circuit that takes in the time data, synthesizes audio, and outputs a time audio signal. An electronic device comprising a voice synthesis circuit, an output circuit that outputs the time audio signal from a speaker, and a volume control circuit that gradually increases or decreases the volume output from the speaker.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986127456U JPS6333496U (en) | 1986-08-20 | 1986-08-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986127456U JPS6333496U (en) | 1986-08-20 | 1986-08-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6333496U true JPS6333496U (en) | 1988-03-03 |
Family
ID=31022226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986127456U Pending JPS6333496U (en) | 1986-08-20 | 1986-08-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6333496U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5469478A (en) * | 1977-11-14 | 1979-06-04 | Citizen Watch Co Ltd | Electronic watch with alarm |
JPS5544493B2 (en) * | 1972-09-13 | 1980-11-12 | ||
JPS5834087B2 (en) * | 1975-07-30 | 1983-07-25 | ヤンマー農機株式会社 | combine |
-
1986
- 1986-08-20 JP JP1986127456U patent/JPS6333496U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5544493B2 (en) * | 1972-09-13 | 1980-11-12 | ||
JPS5834087B2 (en) * | 1975-07-30 | 1983-07-25 | ヤンマー農機株式会社 | combine |
JPS5469478A (en) * | 1977-11-14 | 1979-06-04 | Citizen Watch Co Ltd | Electronic watch with alarm |
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