JPS633272A - Capacitor measuring instrument - Google Patents

Capacitor measuring instrument

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Publication number
JPS633272A
JPS633272A JP14909286A JP14909286A JPS633272A JP S633272 A JPS633272 A JP S633272A JP 14909286 A JP14909286 A JP 14909286A JP 14909286 A JP14909286 A JP 14909286A JP S633272 A JPS633272 A JP S633272A
Authority
JP
Japan
Prior art keywords
voltage
circuit
capacitor
rectified
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14909286A
Other languages
Japanese (ja)
Inventor
Aisuke Shimizu
清水 愛典
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Individual
Original Assignee
Individual
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Publication date
Application filed by Individual filed Critical Individual
Priority to JP14909286A priority Critical patent/JPS633272A/en
Publication of JPS633272A publication Critical patent/JPS633272A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To speed up the inspection by composing a direct reading for dielectric loss ratio and manufacturing deviation of electrostatic capacity of a capacitor. CONSTITUTION:The voltage between junctions (a) and (b), (h) and (g) are inputted respectively to a synchronous rectifier circuit 10 via amplifier circuits 6 and 7 to be rectified synchronously and inputted to a numerator of a division circuit 15. Further the voltage between junctions (b) and (g) is rectified 13 via an amplifier circuit 8 and inputted to a denominator of the circuit 15. The output of the circuit 15 is thereby indicated in a meter 17 as the dielectric loss ration. The output of the circuit 6 is then inputted to a synchronous rectifier circuit 11, and the output of the circuit 7 is phase shifted 12 by pi/2 radian and inputted to the circuit 11 to be rectified synchronously and inputted to a numerator of a division circuit 16. Further the voltage between junctions (a) and (g) is rectified 14 via an amplifier circuit 9 and inputted to a denominator of the circuit 16. The output of the circuit 16 is thereby indicated in a meter 18 as the deviation ratio to a capacitor of rated electrostatic capacity, i.e., manufacturing deviation. The inspection of the capacitor is accordingly speeded up.

Description

【発明の詳細な説明】 (A)産業上の利用分野 この発明は、コンデンサやケーブルの静電容量と誘電体
損失に関する測定を、特に、多量生産ラインで行う測定
器に関するものである0 (B)従来の技術 従来のコンデンサやケーブルの静電容量と、誘電体損失
に関する測定は、第2図に示す回路で行われていた。
Detailed Description of the Invention (A) Industrial Application Field The present invention relates to a measuring instrument for measuring capacitance and dielectric loss of capacitors and cables, particularly on mass production lines. ) PRIOR TECHNOLOGY Conventionally, the capacitance and dielectric loss of capacitors and cables have been measured using a circuit shown in FIG.

従来の技術である第2図の回路について以下に説明する
The conventional circuit shown in FIG. 2 will be described below.

電画lの一端から標準コンデ/す2を接続し、さらに、
これに直列に標準抵抗器3を接続して、電源の他の一端
に接りているOさらに、もうひとつの回路は、電源の一
端から供試コンデンサlI (または供試ケーブル、r
ib、以下の説明は供試コンデンサを代表として述へる
。)を接続L7、さらに、これに直列に既知抵抗器5を
接続して、電源の他の一端に接っている。
Connect the standard converter/su2 from one end of the electric picture l, and
A standard resistor 3 is connected in series with this, and it is connected to the other end of the power supply.Furthermore, another circuit connects one end of the power supply to the test capacitor lI (or the test cable, r
ib. The following explanation will be made using the test capacitor as a representative. ) is connected to L7, and a known resistor 5 is connected in series to the other end of the power supply.

以下の説明を容易にするため、接続点を符号で、次のよ
うに示す。
To facilitate the following explanation, connection points are indicated by symbols as follows.

(1)標準コンデンサと供試コンデンサと電源の一端と
の接続点を)l (2)標準抵抗器と既知抵抗器と電源の他の一端との接
続点をg (3)標準コンデンサと標準抵抗器の接続点をd (4)供試コンデ/すと既知抵抗器の接続点をb とする。
(1) The connection point between the standard capacitor, the capacitor under test, and one end of the power supply (g) (2) The connection point between the standard resistor, the known resistor, and the other end of the power supply (3) The standard capacitor and the standard resistance (4) Let the connection point of the resistor under test be d, and the connection point of the known resistor be b.

さらに、この回路には測定のため、接続点・1から、ス
イッチ16を介して増幅回路17の一端が接続されてい
る。スイッチは増幅回路に接続されている接点がコモン
で、一つの接点は・−に接続され、他の一つの接点はg
に接続されている。また、増幅回路の他の一端はbに接
続されている0さらに、増幅回路の出力には測定のため
のメータ18が接続されている。
Further, one end of an amplifier circuit 17 is connected to this circuit from connection point 1 via a switch 16 for measurement. The contacts of the switch connected to the amplifier circuit are common, one contact is connected to -, and the other contact is connected to g.
It is connected to the. The other end of the amplifier circuit is connected to b.Furthermore, a meter 18 for measurement is connected to the output of the amplifier circuit.

このような、回路溝成で従来、コンデンサ等の静電容量
や誘電体損失に関する測定を行っていた0 次に、従来の測定の原理について、電気理論的に説明す
る。その前に、回路の代数については、 V:電源の実効電圧〔Vコ げ:交流電源の角速度[rad/33 げ=2穴「  ミニ円周率 「:交流電源の周波数[Hz ] C3:標準コノテ゛ンサの静電容量[F]R8:標準抵
抗器の抵抗値[−Q、] C:供試コンデンサの静電容ffi[F1a:供試コン
デンサの電力損失に共するコノダクタンス[Uコ R:既知抵抗器の抵抗値〔立コ である・ 囮 今、第2Nの回路において、スイッチを接続点d側に切
替えて、接続点a、lJ間の電圧の式を求めると、次の
ようになる◇ この(1)式において J:複素数 j=、f:了 vQ:接続点a b間の電圧[■コ である0この(1)式を回路設計上、代数を次のように
選ぶ。
Conventionally, capacitance and dielectric loss of capacitors and the like have been measured using such a circuit groove structure.Next, the principle of conventional measurement will be explained from an electrical theory. Before that, regarding the algebra of the circuit, V: Effective voltage of power supply [V Koge: Angular velocity of AC power supply [rad/33] Ge = 2 holes "Mini Pi": Frequency of AC power supply [Hz] C3: Standard Capacitance of the capacitor [F] R8: Resistance value of the standard resistor [-Q,] C: Capacitance ffi of the test capacitor [F1a: Conductance associated with power loss of the test capacitor [UcoR: Known] Resistance value of the resistor (standing) Now, in the 2N circuit, if we switch the switch to the connection point d side and find the formula for the voltage between the connection points a and lJ, we get the following ◇ In this equation (1), J: complex number j=, f: finished vQ: voltage between connection points a and b [■ 0 which is 0. In terms of circuit design, the algebra for this equation (1) is selected as follows.

R8くく 1 / 嘘c、    −−一−−−−−−
−(2)R<(l/、)、c  −−−−−−一−−−
−(3)L、目1δ:コンデンサの誘電体損失比であり
、−般的に0001オーグの小さ な(直であろ0 とすると、(1)式は問題にならない項を無視して、 V□  =V[O−R+ j  ω(C−R−C3・R
5)コとなる◎(5)式より()内をOにするためC8
のダイアルを回して、メータの読みを最小にしたときの
v□  をV □ mとするとv□m=V −G−R−
一−−−−−一−(6)となる◎また C−R,= as−Rs  −一−−−−−−−−(7
)となっている。この(7)式から、供試コンデンサの
静電容量は C=−・O5−−−−−一−−−−(8)より計算で求
められる◇ 次にコンデンサの誘電体損失比の測定はスイッチを接続
点g側に切替えて、メータで読む。その値は、 vr =v−w−c−a −−−−−−−−−−(9)
となる。Vr  は既知抵抗器の両端の電圧である。さ
て、先にメータの読み最少の値である(6)式と、前記
(9)式の値の比を求めると、 V r   V−u)−C−R1ad−(:となり、(
lO)式は正に誘電体損失比を示している◎すなわち、
魯omとV「の読みの比で、計算で求められる。
R8 kuku 1 / lie c, --1------
−(2) R<(l/, ), c −−−−−−1−−−
- (3) L, 1 δ: is the dielectric loss ratio of the capacitor, and - is generally a small value of 0001 og (direct or 0), then formula (1) ignores terms that do not matter, and calculates V□ =V[O-R+ j ω(C-R-C3・R
5) becomes ◎From formula (5), change the value in parentheses to O, so C8
If v□ when the meter reading is minimized by turning the dial is V □ m, then v□m=V −G−R−
1------1-(6) ◎Also, C-R,= as-Rs-1--------(7
). From this formula (7), the capacitance of the test capacitor can be calculated from C=-・O5−−−−−−−−−−(8) ◇ Next, the measurement of the dielectric loss ratio of the capacitor is Switch the switch to the connection point g side and read it with the meter. Its value is: vr = v-w-c-a −−−−−−−−−−(9)
becomes. Vr is the voltage across the known resistor. Now, if we first find the ratio between equation (6), which is the minimum value of the meter reading, and the value of equation (9) above, we get V r V-u)-C-R1ad-(:, and (
The equation (lO) exactly indicates the dielectric loss ratio◎In other words,
It is the ratio of the readings of Lu om and V, which can be calculated.

(C)発明が解決し7ようとする問題点従来の測定器で
は、人手によって、スイッチを切替え、そして、標準コ
ンデンサのダイアルをメータに注意して回し、微妙な調
整が必要であった◇ また、供試コンデンサの静電容量や誘電体損失比を一求
めるため、単純ではあるが、計算をする必要があり、多
量に流れる製品の全数検査は困難であった。
(C) Problems that the invention aims to solve 7 With conventional measuring instruments, delicate adjustments were required by manually switching switches and carefully turning the dial of a standard capacitor on the meter. Although simple, calculations were required to determine the capacitance and dielectric loss ratio of the capacitor under test, making it difficult to conduct a complete inspection of products that flow in large quantities.

(D)問題を解決するための手段 前記の問題を解決するため、本発明は次のようにする0 (1)あるロットのコンデンサの定格外tM、容量に相
当する標準コンデンサの値を前記(7)式から、O8に
ついて計算し、あらかじめ設定しておく。
(D) Means for Solving the Problem In order to solve the above-mentioned problem, the present invention performs the following steps. 7) Calculate O8 from the formula and set it in advance.

(2)前述のごとく、あらかじめ設定した値に対し7、
実際齋ζは、静電容量はそのロフトに関して、少なくと
も±5%程度内で、任異にバラツクため、従来の方式に
よる測定方法だと、静電容量も誘電体損失比も求められ
ない◇ (3)従って、本発明は接続点a、b間の電圧、VOに
ついて、電源電圧の位相に合せて同期整流し、(9)式
に相当する値を求めて、既知抵抗器の両端の電圧Iζ相
当する値で除算して、誘電体損失比を測定する。
(2) As mentioned above, 7 for the preset value,
In fact, the capacitance varies widely within ±5% with respect to its loft, so using the conventional measurement method, neither the capacitance nor the dielectric loss ratio can be determined◇ ( 3) Therefore, the present invention synchronously rectifies the voltage between the connection points a and b, VO, in accordance with the phase of the power supply voltage, obtains a value corresponding to equation (9), and calculates the voltage Iζ across the known resistor. Measure the dielectric loss ratio by dividing by the corresponding value.

(4)また、本発明は前述のv□ について、電源電圧
より ′り72〔r a Ll]移相した電圧の位相に
合せて同期整流した値を、標■抵抗器の両端の電圧に相
当する値で除算して、定格静電容量に対する偏差を測定
できるようにしている◇ これらは、電子回路的に処理されで、数値が直読できる
ようにし、人手や、計算の国電をなくしている。
(4) In addition, the present invention provides the above-mentioned v The deviation from the rated capacitance can be measured by dividing by the value of

第1回は本発明の測定器の回路構成であるがこの構成の
ために、原理について、電気理論的に説明する〇 前記(5)式について 41−0・R−−−−−−−−−(11)1+ = w
(C−R−C5−Rs) ++ −(12)とおくと ”70=V(a÷、i  b  )  −−−−−(1
3)と示すことが出来る◇ この(13)式を、刻々5化する交流回路の瞬時値で示
すと ’1/”O二J”−V (、し5inuJ4+b−Co
s tJ−L )−−−−−(1・1) となる。たtごし、電源電圧の瞬時値はν= JY t
 V 壷S i nω、L   −−−−−−−(+5
)とする0この式のLは時間[S]である。
The first part is about the circuit configuration of the measuring instrument of the present invention. For this configuration, the principle will be explained from an electrical theory. Regarding the above formula (5), 41-0・R---------------------- −(11)1+ = w
(C-R-C5-Rs) ++ -(12) "70=V(a÷, i b ) ------(1
3) can be shown as ◇ Expressing this equation (13) as an instantaneous value of an AC circuit that changes to 5 every moment, '1/"O2J"-V (, 5inuJ4+b-Co
s tJ-L )---(1・1). The instantaneous value of the power supply voltage is ν= JY t
V pot S i nω, L −−−−−−−(+5
) and 0.L in this equation is time [S].

(1・1)式を変形すると VO=  、f”’: −v lJJ7下+  II”
  ・ S in  (cd・t  +  6  )と
なる0たtごし cos6 = +1 / 、r −−−−−(17)S
in e = b 7 n −−−−−(13)である
0 (16)式のω−tはo−2完[:  radコの間の
1直Iこ置いて良く 5ρ=ω、も    −  −−−−−−−−(19)
とすると VO=、J下°、■−1r;7:ニb’−Sin (9
) +5 )と示せる。
Transforming equation (1.1), VO= , f"': -v lJJ7 lower + II"
・S in (cd・t + 6) 0t cos6 = +1 / , r −−−−−(17) S
in e = b 7 n ----(13) 0 ω-t of equation (16) is o-2 complete [: 5ρ = ω, also − -----------(19)
Then, VO=, J lower °, ■-1r; 7: Nib'-Sin (9
) +5 ) can be shown.

このひ0を電源電圧に同期して整流する。This voltage is rectified in synchronization with the power supply voltage.

まず、電の電圧に同期(7てヂ=0〜仝[rLL d 
]まで、同期整流した平均値電圧力、は十〇)・(lデ π となる。また、テ=筬〜2fi[rad] まで、同期
整流すると(21)式と同じで負の値になるが、整流す
るのであるから絶対値となるため、全く、(21)式と
同じ式になる。
First, synchronize with the voltage of the electric current (7teji=0~仝[rLL d
], the average voltage voltage after synchronous rectification is 10)・(l de π. Also, when synchronous rectification is performed from te=redo to 2fi [rad], it becomes a negative value as in equation (21). Since it is rectified, it becomes an absolute value, so the equation is exactly the same as equation (21).

次に、電源電圧よす”/ 2[r Ll d:l進んt
ご電圧に同期して、ヂ=”/2〜3イ/2まで同期整流
した平均値電圧vO2は 十〇)df となる0また、 =:37j/2〜大/2[ra(1]
まで同期整流すると、絶対値となるため(22)式と同
じ式になる◇ では、次に(21)式に(17)式を、そして、(22
)式に(18)式を代入し、さらに、(11)式、(I
2)式を代入して、整理すると、 一−−−−(24) となる0 一方、既知抵抗器の両端の電圧は供試コンデンサを流れ
る電流だから、電#i電圧Vよりも、 穴I2進んでい
る。従って、この電圧の1闘時値は、 VR= J了fca)−C−RS i n  (f 4
 )= Ji、vua−c−R−Co59’  +−−
−(25)となる0まな、単に整流した平均値は、とな
る。
Next, the power supply voltage is "/ 2 [r Ll d:l advance t
The average voltage vO2 synchronously rectified from 〇/2 to 3 /2 in synchronization with the voltage is 10) df.
When synchronously rectified up to
), and then substituting equation (18) into equation (11) and (I
2) By substituting the formula and rearranging it, we get 1 ----(24) 0 On the other hand, since the voltage across the known resistor is the current flowing through the test capacitor, the voltage V is higher than the voltage V in the hole I2. It's progressing. Therefore, the one-time value of this voltage is:
) = Ji, vua-c-R-Co59' +--
-(25), the average value simply rectified is as follows.

また、−方、標準抵抗器の両端電圧も標準コンデンサを
流れる電流だから、電源電圧Vよりも ′〜2進んでい
る・従・で、この電圧の瞬時値は VR8= Ji v−w、cs ・R8Sin (y 
+ −)= 5 V−C4)、C8−R8−C08CP
−(27)となる。また整流した平均値は、 となる。
On the negative side, the voltage across the standard resistor is also the current flowing through the standard capacitor, so it leads/follows the power supply voltage V by ~2, and the instantaneous value of this voltage is VR8=Ji v-w, cs ・R8Sin (y
+ -) = 5 V-C4), C8-R8-C08CP
−(27). The rectified average value is as follows.

さて、コンデンサの誘電体損失比は(23)式を(26
)式で除すと OIG □ = −−−−−−−−−(29ン vRL4)・C となり、(10)式と同様に誘電体損失比となる◇ また、コンデンサの静電容量は定格値CCのコンデンサ
で、標準コンデンサを調整してた後は、固定しておく、
この場合、定格値のコンデンサと同一ロットの任異のコ
ンデンサを接続するとき、(24)式のCが(福Xl:
IC,)C= CC+ ムC−−一 −−−−130)
とすることになり、(24)式は0にならない、(30
)式を(24)式に代入すると・Rs   −−−−−
−−−−−−(31)$冬ため、CC−R=C5−R8
となっており、v02は次のようになる・ この(32)式を(28)式で除すと q 02  ΔC−R ’l/’RSI  Cs、Rs   −−−−−”””
も となる。更に、C8は勢の時に調整し7たから、 C3−R8=CG−R−−−(34) であり、(33)式を(3−1)式に代入すると ’L/’Rs     Cc−Rcc なり、コンデンサの製造偏差比が求められる0以上の、
本項の始めに記述した測定方法が証明された。
Now, the dielectric loss ratio of the capacitor is expressed as (23) by (26)
) formula, OIG □ = −−−−−−−−−(29nvRL4)・C, which is the dielectric loss ratio as in formula (10) ◇ Also, the capacitance of the capacitor is rated After adjusting the standard capacitor with a capacitor of value CC, keep it fixed.
In this case, when connecting a capacitor with the rated value and a different capacitor from the same lot, C in equation (24) is (Fuku Xl:
IC,)C=CC+MuC--1---130)
Therefore, equation (24) does not become 0, and (30
) into equation (24), ・Rs ------
--------(31) $ for winter, CC-R=C5-R8
Therefore, v02 is as follows. Dividing this equation (32) by equation (28), q 02 ΔC-R 'l/'RSI Cs, Rs -------"""
Becomes the basis. Furthermore, since C8 was adjusted 7 at the time of momentum, C3-R8=CG-R---(34), and substituting equation (33) into equation (3-1), 'L/'Rs Cc-Rcc , the manufacturing deviation ratio of the capacitor is found to be 0 or more,
The measurement method described at the beginning of this section has been verified.

(F2)問題を解決するための測定器の回路前記(D)
によって問題を解決するための理論的証明に基き、本発
明の測定器の回路を第1図に示す0第2図と同一部分の
回路構成郵以外について、説明を進める。
(F2) Measuring instrument circuit to solve the problem (D) above
Based on the theoretical proof for solving the problem, the circuit of the measuring instrument of the present invention will be explained except for the circuit configuration shown in FIG. 1 and the same part as in FIG. 2.

誘電体損失比の測定は接続点a、b間の電圧をA増幅回
路6を通し、また、接続点11.0間の電圧をB増幅回
路7を通す0 そして、A、Bそれぞれの増幅回路の出カー!−へ同期
整流回路10の入力とする0なお、BbB幅回路から入
力された信号はA同期整流回路でスミ形波に整形され、
A増幅回路から入力された信号を、この鳩形波のタイミ
ングで同期整流し、前記(23)式に比例した出力を出
す・これをA除算回路15の分子側入力とする0 さらに、接続点し、g間の電圧はC増幅回路8を通し、
A整流回路13で整流されて、前記(26)式に比例し
た出力を出す。CれをA除算回路の分母側入力とする0 (ゆえに、A除算回路の出力は前記(29)式に比例し
た出力を出し、Aメータ17によって誘電体損失比を示
す。
To measure the dielectric loss ratio, the voltage between the connection points a and b is passed through the A amplifier circuit 6, and the voltage between the connection points 11.0 and 11.0 is passed through the B amplifier circuit 7. Out car! - input to the synchronous rectifier circuit 10 0 Note that the signal input from the BbB width circuit is shaped into a square wave by the A synchronous rectifier circuit,
The signal input from the A amplifier circuit is synchronously rectified at the timing of this pigeon wave, and an output proportional to the above equation (23) is produced. This is used as the numerator side input of the A divider circuit 15. Furthermore, the connection point and the voltage between g is passed through the C amplifier circuit 8,
It is rectified by the A rectifier circuit 13 and outputs an output proportional to the above equation (26). C is the denominator side input of the A division circuit. Therefore, the output of the A division circuit is proportional to the above equation (29), and the A meter 17 indicates the dielectric loss ratio.

定格静電容量の製造コンデンサ偏差比の測定は前述のA
増幅回路の出力をB同期整流回路11の入力とする0ま
な、B増幅回路の出力を移相回路12で〜2[rad]
進め(遅らせても良い)B同期整流回路の入力とする0
なお、移相回路から入力された信号はB同期整流回路で
久盲形波に整形され、A増幅回路から入力された信号を
、”/ 2Cr a d]移相されたスヒ形波のタイミ
ングで同期整流し、前記(32)式に比例した出力を出
す・これをB除算回路16の分子側入力とする。
The measurement of the manufacturing capacitor deviation ratio of the rated capacitance is carried out using the above-mentioned A.
The output of the amplifier circuit is input to the B synchronous rectifier circuit 11, and the output of the B amplifier circuit is input to the phase shift circuit 12.
Advance (may be delayed) 0 input to B synchronous rectifier circuit
Note that the signal input from the phase shift circuit is shaped into a long blind wave by the B synchronous rectifier circuit, and the signal input from the A amplifier circuit is shaped into a long blind wave at the timing of the phase shifted square wave. Synchronous rectification is performed to produce an output proportional to the above equation (32). This is used as the numerator side input of the B division circuit 16.

さらに、接続点”%g間の電圧はD増幅回路9を通し、
B整流回路で整流されて、前記(28)式に比例した出
力を出す。これをB除算回路の分母側入力とする・ ゆえに、B除算回路の出力は前記(35)式に比例した
出力を出【7、Bメータ18によって定格静電容量のコ
ンデンサとの偏差比、いわゆる製造偏差比を示す◇ (F)発明の効果 (1)コンデンサの誘電体損失比と静電容量の製造偏差
が直読でき、検食のスピードアップが出来る。
Furthermore, the voltage between the connection point "%g" passes through the D amplifier circuit 9,
It is rectified by the B rectifier circuit and outputs an output proportional to the above equation (28). This is the denominator side input of the B divider circuit. Therefore, the output of the B divider circuit is an output proportional to the above equation (35). Showing the manufacturing deviation ratio ◇ (F) Effects of the invention (1) The dielectric loss ratio of the capacitor and the manufacturing deviation of the capacitance can be directly read, speeding up inspection.

(2)tnJ記(29)式や(35)式のように電源電
圧の変動の影響を受(ブない。すなわち、電源電圧Vを
約分されてしまう。
(2) It is not affected by fluctuations in the power supply voltage as in equations (29) and (35) of tnJ. In other words, the power supply voltage V is reduced.

(3)このことは、コンデンサ等、電圧特性を有し、電
圧によって、コロナ損失モ含めて、誘電体損失比は測定
できる。
(3) This means that capacitors and the like have voltage characteristics, and the dielectric loss ratio, including corona loss, can be measured depending on the voltage.

(4)電圧の影響を受けにくいことから、高電圧コンデ
ンサ等、の測定にも適用できることになる0 (5)前記(2)式、(3)式のRs やRをできるt
ごけ小さな値で設計することにより、測定器の損失が少
なくなり、経済的であり、測定器自体の温度安定度も向
上する。
(4) Since it is not easily affected by voltage, it can also be applied to the measurement of high-voltage capacitors, etc. (5) It is possible to calculate Rs and R in equations (2) and (3) above.
By designing with a very small value, the loss of the measuring instrument is reduced, it is economical, and the temperature stability of the measuring instrument itself is improved.

以上の効果を有する0 (G)他の実施例 前記(15)式に電源電圧をもとに同期整流を(7たが
、(2)式の条件のもとではRsの両端の電圧は(27
)式のようになる。この 訃を、既に ″I/2移pl
 した電圧と(7で、第1図のB同期整流回路の入力に
適用する。
0 (G) Other embodiments with the above effects Synchronous rectification was performed based on the power supply voltage in equation (15) (7), but under the conditions of equation (2), the voltage across Rs is ( 27
) is as follows. This deceased has already been transferred to ``I/2''
voltage (7) applied to the input of the B synchronous rectifier circuit in FIG.

また、この R8を電源電圧の位相にするため、これを
 穴/2移相して、A同期整流回路の入力に適用する。
Also, in order to make this R8 the phase of the power supply voltage, it is phase shifted by 2 holes and applied to the input of the A synchronous rectifier circuit.

この方式も、本発明の実施例である。This method is also an embodiment of the present invention.

また、第1図の実施例の回路はアナログ演算回路素子(
アナログIC)によって、処理(7た例を示すが、前記
数学的に詳細に記述(〕な通り、A、B、Dの増幅回路
の出力をB増幅回路の特定のタイミング(電圧が零とク
ロスするタイミングやピークのタイミング)で、し サンプリングホールドき、A/D変換回路(アナログ、
デジタル変換回路)を介して、マイクロコンピュータに
より、デジタル的に処理することも可能である。また、
第1図の回路の同期整流や整流回路以降からの出力は直
流化されており、より、A/D変換回路が必用しやすく
、これ以降をマイクロコンピュータで処理することも可
能であり、本発明の数学的表現の範囲に属する実施例と
なる。
In addition, the circuit of the embodiment shown in FIG.
As described in mathematical detail above, the outputs of the A, B, and D amplifier circuits are processed by processing (analog IC) at a specific timing (when the voltage crosses zero). sampling and holding, and A/D conversion circuit (analog, peak timing).
It is also possible to process digitally by a microcomputer via a digital conversion circuit. Also,
The output from the synchronous rectifier and rectifier circuit in the circuit shown in FIG. This is an example that falls within the scope of mathematical expression.

また、第1図の標準コンデンサー(C!S)を固定コン
デンサとし、標準抵抗器2(R8)を可父抵抗器として
も、前記、数学的表現の範囲に属する実施例となる。
Further, the standard capacitor (C!S) in FIG. 1 may be a fixed capacitor, and the standard resistor 2 (R8) may be a fixed resistor, resulting in an embodiment that falls within the scope of the above-mentioned mathematical expression.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例の測定回路図 1は交流電源、2は標準コンデンサ 3は標準抵抗器、4は供試コンデンサ 5は既知抵抗器 6.7.8.9はA、B、C,D増幅回路10.11、
はA%B同期整流回路 12は移相回路 13.14はA、B整流回路 15.16はA、B除算回路 17.18はAS Bメータ なお、枠内の ンは増幅回路 ■は同期整流回路 tは移相回路 斗は整流回路 ÷は除算回路  Hはメータ を示す0 第2図は従来の測定回路図 16は切替スイッチ 17は増幅回路 18はメータ(電圧計) 第1圀 輩2■
FIG. 1 is a measurement circuit diagram of an embodiment of the present invention. 1 is an AC power supply, 2 is a standard capacitor 3 is a standard resistor, 4 is a test capacitor 5 is a known resistor, 6.7.8.9 are A, B, C, D amplifier circuit 10.11,
is A%B synchronous rectifier circuit 12 is phase shift circuit 13.14 is A, B rectifier circuit 15.16 is A, B division circuit 17.18 is AS B meter. Circuit t is a phase shift circuit. Do is a rectifier circuit ÷ is a divider circuit. H is a meter. 0 Figure 2 is a conventional measurement circuit diagram.

Claims (1)

【特許請求の範囲】 第1図において、コンデンサの定格静電容量(または特
定の容量)に標準コンデンサ(または標準抵抗器)を可
変して、接続点a、b間の電圧が最低近辺に合せた後、
前記コンデンサと同一のロットの供試コンデンサを接続
する。そのときの、接続点a、b間電圧の電源電圧と同
じ位相で同期整流した電圧を、接続点b、g間の整流電
圧で除算して、誘電体損失比を測定する。 さらに、電源電圧に対しπ/2[had]移相した電圧
と同じ位相で接続点a,b間電圧について同期整流した
電圧を接続点a,g間の整流電圧で除算して、静電容量
偏差比を測定する。もしくは、前記、電源電圧に対しπ
/2[had]移相した電圧に接続点a、g間の電圧を
、また、このa、g間の電圧を逆にπ/2[had]移
相した電圧を電源電圧と同じ位相の電圧として、同期整
流する。このいずれかを適用してなるコンデンサ測定器
[Claims] In Fig. 1, a standard capacitor (or standard resistor) is varied to the rated capacitance (or specific capacitance) of the capacitor, and the voltage between connection points a and b is adjusted to around the minimum. After
Connect a test capacitor from the same lot as the above capacitor. At that time, the dielectric loss ratio is measured by dividing the voltage that is synchronously rectified in the same phase as the power supply voltage between the connection points a and b by the rectified voltage between the connection points b and g. Furthermore, the voltage obtained by synchronously rectifying the voltage between the connection points a and b with the same phase as the voltage phase-shifted by π/2 [had] with respect to the power supply voltage is divided by the rectified voltage between the connection points a and g, and the capacitance is Measure the deviation ratio. Or, as mentioned above, π with respect to the power supply voltage
The voltage between the connection points a and g is set to the voltage whose phase is shifted by /2 [had], and the voltage whose phase is shifted by π/2 [had] from the voltage between a and g is the voltage that has the same phase as the power supply voltage. synchronous rectification. A capacitor measuring device that applies one of these
JP14909286A 1986-06-24 1986-06-24 Capacitor measuring instrument Pending JPS633272A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14909286A JPS633272A (en) 1986-06-24 1986-06-24 Capacitor measuring instrument

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14909286A JPS633272A (en) 1986-06-24 1986-06-24 Capacitor measuring instrument

Publications (1)

Publication Number Publication Date
JPS633272A true JPS633272A (en) 1988-01-08

Family

ID=15467522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14909286A Pending JPS633272A (en) 1986-06-24 1986-06-24 Capacitor measuring instrument

Country Status (1)

Country Link
JP (1) JPS633272A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5381100A (en) * 1992-10-16 1995-01-10 Advantest Corporation Pulse signal measuring instrument

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5381100A (en) * 1992-10-16 1995-01-10 Advantest Corporation Pulse signal measuring instrument

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