JPS6331472A - High-frequency high-voltage dc power source - Google Patents

High-frequency high-voltage dc power source

Info

Publication number
JPS6331472A
JPS6331472A JP17454286A JP17454286A JPS6331472A JP S6331472 A JPS6331472 A JP S6331472A JP 17454286 A JP17454286 A JP 17454286A JP 17454286 A JP17454286 A JP 17454286A JP S6331472 A JPS6331472 A JP S6331472A
Authority
JP
Japan
Prior art keywords
frequency
voltage
inverter
circuit
transformer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17454286A
Other languages
Japanese (ja)
Inventor
Masahito Morikawa
森川 雅人
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP17454286A priority Critical patent/JPS6331472A/en
Publication of JPS6331472A publication Critical patent/JPS6331472A/en
Pending legal-status Critical Current

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  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To perform a reduction in size and a high frequency switching of a high-frequency high-voltage DC power source by turning on and off a switching element of an inverter by a zero-cross signal. CONSTITUTION:A controller CONT of an inverter 2 has an inverter-current detecting current-transformer CT1, a bridge rectifier DB1, connected to CT1, a comparator IC1, a differentiator CD.Rd, a J-K flip-flop IC5, a gate driving IC, a voltage to frequency converter V/F etc. Transistors Q1-Q4 of a circuit 2 are turned on and off synchronously with the fundamental frequency of switching obtained by converting a detected DC output signal by the converter V/F. The detected signal from the transformer CT1 is compared with a reference voltage Er by the comparator IC1, and a trigger signal is generated upon zero- crossing of the inverter current. This is repeated at every half period to perform a high-speed switching.

Description

【発明の詳細な説明】 本発明は高周波直流高電圧電源回路に関するものである
。従来の高周波直流高電圧電源回路は第1図にその回路
構成例が示されている。第1図は、交流入力を整流する
整流回路1と直流を高周波交流に変換するインバータ回
路部2と昇圧トランス3と高電圧整流回路部4と直流フ
ィルター回路5と制御回路部6と負荷7からなる高周波
直流高電圧電源回路であり、インバータ回路部2は第4
図の(1)フルブリッジ構成、(2)ハーフブリッジ構
成あるいは(3)プッシュプル構成が考えられる。又、
インバータ回路部2は第2図に示すようなプリレギ、レ
ーク部8とインバータスイッチ部9による構成もある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a high frequency DC high voltage power supply circuit. An example of the circuit configuration of a conventional high frequency DC high voltage power supply circuit is shown in FIG. Figure 1 shows a rectifier circuit 1 that rectifies AC input, an inverter circuit section 2 that converts DC into high-frequency AC, a step-up transformer 3, a high voltage rectifier circuit section 4, a DC filter circuit 5, a control circuit section 6, and a load 7. The inverter circuit section 2 is a high frequency DC high voltage power supply circuit.
Possible configurations include (1) full bridge configuration, (2) half bridge configuration, and (3) push-pull configuration shown in the figure. or,
The inverter circuit section 2 may also have a configuration including a pre-leg, rake section 8 and an inverter switch section 9 as shown in FIG.

ブリレギ、レーダ部8の例として第3図の降圧型コンバ
ータが考えられ、インバータスイッチ部9は第4図(1
)〜(3)の構成と同じである。SW、、S〜V、〜S
W、はトランジスタ、サイリスタ、MO8FgTなどの
半導体スイッチであり、C11、C12、CI、C2は
コンデンサー、Dはダイオードである。負荷の電圧ある
いは電流を検出して制御回路部6からインバータ回路部
2にP W M制御信号を送って所望の出力を得ていた
。従来回路では第1図の昇圧トランス3が、第5図(a
)に示すような昇圧トランスであり、その昇圧比nが高
くなると、昇圧トランスの等価回路は第5図(b)で表
わされ、その電圧ステップ応答は第6図に示すように負
荷が軽ければ振動的となる。従ってその電流波形も振動
して固有振動数がインバータ回路部のスイッチング周波
数に近いか、あるいは低いとインバータ回路部を通常の
PWM制御することは困難であるためスイッチング周波
数を十分高(することはできず、直流電源装置の小型化
にも障害であった。
As an example of the radar section 8, the step-down converter shown in FIG.
) to (3). SW,,S~V,~S
W is a semiconductor switch such as a transistor, thyristor, or MO8FgT, C11, C12, CI, and C2 are capacitors, and D is a diode. A desired output was obtained by detecting the voltage or current of the load and sending a PWM control signal from the control circuit section 6 to the inverter circuit section 2. In the conventional circuit, the step-up transformer 3 shown in FIG. 1 is replaced by the step-up transformer 3 shown in FIG.
), and as the step-up ratio n increases, the equivalent circuit of the step-up transformer is shown in Figure 5 (b), and its voltage step response is as shown in Figure 6, when the load is light. It becomes vibratory. Therefore, if the current waveform also oscillates and the natural frequency is close to or lower than the switching frequency of the inverter circuit, it is difficult to perform normal PWM control of the inverter circuit. Moreover, it was also an obstacle to miniaturization of DC power supplies.

これを解決して高周波スイッチングを可能にするのが本
発明の目的である。第7図、第8図は本発明の一実施例
回路図及びその各部動作啼形3皮 図で従来例と同一符号は同等部分を示す。図中C0NT
は本発明の要部を構成する制御回路部でインバータ回路
電流を検出する変流器CT。
It is an object of the present invention to solve this problem and enable high frequency switching. FIGS. 7 and 8 are circuit diagrams of one embodiment of the present invention and three diagrams showing the operation of each part thereof, and the same reference numerals as in the conventional example indicate equivalent parts. C0NT in the figure
1 is a current transformer CT that detects an inverter circuit current in a control circuit section that constitutes a main part of the present invention.

ブリッジ整流回路DBI、比較器Ice、微分回路を形
成するコンデンサCD及び抵抗FLD、インバータIC
,、J−にフリップフロップIC,、ゲートドライブ用
(IC)IC,、IC4及び電圧周波数変換回路V/F
等により形成されている。なお、出力電流を一定とする
定電mmiを考えると、インバータ回路部2が第4図の
(1)〜(3)で構成される場合は周波数食調方式で出
力電流を制御する。又、プリレギュレータ方式(第2図
)であれば、プリレギュレータとして降圧型コンバータ
(第3図)を採用した場合はその出力電圧を制御して所
窒の定電流出力を得る。この回路動作はインバータ回路
部2(フルブリッジ構成)を周波政変m :a++ 到
により定電流出力を得ようとする場合、直流出力電流(
第8図(a))はシャント抵抗RHにより検出され電圧
周波#変換回路V/Fにより周波数変換されて、第8図
(blのように出力tiに比例したスイッチング基準発
振波形を得る。(b)の基準発振同波数に同期してトラ
ンジスタQl、Q2あるいはQ3、Q4が開閉する。今
、QlとQ2が閉路になると、インバータ回路の電流(
第8図(C))は昇圧トランスT1の昇圧比が高く、非
制動条件下であり、スイッチング周波数が高いと振動状
の応答となる。振動状の[Uはゼロクロス点で流れる方
向が変わり、ダイオードD2−変流器CTl−昇圧トラ
ンスT1の1次コイ−ダイオードD1のルートで電源側
に帰る。CT1はインバータ回路部電流(第8図(C)
)のモニター用で、検出出力はブリッジ整流回路DB1
により全波整流され第8図+d)の信号を得る。
Bridge rectifier circuit DBI, comparator Ice, capacitor CD and resistor FLD forming a differentiation circuit, inverter IC
,, J-, flip-flop IC, gate drive (IC) IC, IC4 and voltage frequency conversion circuit V/F
It is formed by etc. Note that, considering a constant current mmi in which the output current is constant, when the inverter circuit unit 2 is configured as shown in (1) to (3) in FIG. 4, the output current is controlled by a frequency adjustment method. Further, in the case of the pre-regulator system (FIG. 2), if a step-down converter (FIG. 3) is employed as the pre-regulator, the output voltage is controlled to obtain the desired constant current output. This circuit operation changes the frequency of the inverter circuit section 2 (full bridge configuration) to a constant current output when the DC output current (
Figure 8 (a)) is detected by the shunt resistor RH and frequency converted by the voltage/frequency conversion circuit V/F to obtain a switching reference oscillation waveform proportional to the output ti as shown in Figure 8 (bl). (b ) The transistors Ql and Q2 or Q3 and Q4 open and close in synchronization with the reference oscillation same wave number of the inverter circuit (
In FIG. 8(C)), the step-up ratio of the step-up transformer T1 is high and under non-braking conditions, and when the switching frequency is high, an oscillatory response occurs. The direction of flow of the oscillating [U changes at the zero cross point, and returns to the power supply side via the route of diode D2 - current transformer CTl - primary coil of step-up transformer T1 - diode D1. CT1 is the inverter circuit current (Fig. 8 (C)
) for monitoring, and the detection output is from the bridge rectifier circuit DB1.
The signal is full-wave rectified by , and the signal shown in FIG. 8+d) is obtained.

さらに比較15Ic1により基槃電圧Erと比較され第
8図(e)の出力を得る。CdとRdの微分回路により
第8図(e)が基*X、圧E「より低くなるとき、従っ
て第8図(C)のインバータ回路電流がゼロクロスする
際に第8図(f)のトリが一信号が発生される。J−に
フリップフロ、ブIC5のJ端子は第8図(g)に示す
通りlowレベルにあり、K端子は第8図(h)の通り
highレベルにある。第8図(blの基準発振波形に
同量したプリセット信号(第8図(i))によりIC5
のQ端子は半1削期毎にリセットされhighレベルに
ある。第8図(J)(klは第8図(b)の基準発振波
形に同期した、それぞれQl、Q2およびQ3、Q4の
ドライブ信号である。第8図(f)のトリガー信号がI
C5のCKi子に入ると、IC5のQ端子は直ちにro
veレベルに移り、ゲー1−ICのIC3、IC4の出
力は共にlowレベルとなり、トランジスタQ1.Q2
およびQ3、Q4は開路となる。このようにして、半周
期毎に同様の動作を繰返して、高周波のスイッチングを
実現する。本発明により昇圧比の高い昇圧トランスを使
用した直流高電圧!、源回路の変換周波数をあげること
ができることから、応答スピードがあがり、又小型化が
はかれる。
Furthermore, it is compared with the reference voltage Er by comparison 15Ic1 to obtain the output shown in FIG. 8(e). Due to the differential circuit of Cd and Rd, when the voltage in Fig. 8(e) becomes lower than the base * One signal is generated.Flip-flow is applied to J-, and the J terminal of the IC5 is at a low level as shown in FIG. 8(g), and the K terminal is at a high level as shown in FIG. 8(h). IC5 by the preset signal (Fig. 8 (i)) with the same amount as the reference oscillation waveform of
The Q terminal of is reset every half cycle and is at high level. Fig. 8(J) (kl is the drive signal of Ql, Q2 and Q3, Q4, respectively, synchronized with the reference oscillation waveform of Fig. 8(b).The trigger signal of Fig. 8(f) is I
When the CKi terminal of C5 is entered, the Q terminal of IC5 immediately becomes ro.
ve level, the outputs of IC3 and IC4 of the gate 1-ICs both become low level, and the transistors Q1. Q2
And Q3 and Q4 become open circuits. In this way, similar operations are repeated every half cycle to achieve high frequency switching. High DC voltage using a step-up transformer with a high step-up ratio according to the present invention! Since the conversion frequency of the source circuit can be increased, the response speed can be increased and the size can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至@5図は従来回路図、第6図はその特性説明
図、塩7図、第8図は本発明の一実施例回路図及びその
各部動作波形図である。図において1は整流回路、2は
インバータ回路部3、TIは昇圧トランス、4は高圧¥
流回路、6、C0NTは制御回路部である。 特許出願人 新電元工業株式会社 第1目 第30 ギ÷9
1 to 5 are conventional circuit diagrams, FIG. 6 is a characteristic diagram thereof, and FIG. 7 and FIG. 8 are circuit diagrams of an embodiment of the present invention and operation waveform diagrams of each part thereof. In the figure, 1 is a rectifier circuit, 2 is an inverter circuit section 3, TI is a step-up transformer, and 4 is a high voltage
Flow circuit 6, C0NT is a control circuit section. Patent applicant Shindengen Kogyo Co., Ltd. Item 1 No. 30 Gi ÷ 9

Claims (1)

【特許請求の範囲】[Claims] 交流入力を直流に整流する整流回路とその整流出力を高
周波の交流に変換するインバータ回路部と昇圧トランス
と高圧整流回路及び前記昇圧トランスの1次側で前記イ
ンバータ回路部を制御する制御部を備えた直流高電圧電
源回路において、前記制御部はインバータ回路電流のゼ
ロクロスを検出する信号により前記インバータ回路部の
スイッチ素子を閉路とするように制御せしめることを特
徴とする高周波直流高電圧電源回路。
A rectifier circuit that rectifies AC input into DC, an inverter circuit that converts the rectified output into high-frequency AC, a step-up transformer, a high-voltage rectifier circuit, and a control section that controls the inverter circuit on the primary side of the step-up transformer. A high-frequency DC high-voltage power supply circuit, characterized in that the control unit controls a switch element of the inverter circuit unit to close based on a signal that detects a zero crossing of an inverter circuit current.
JP17454286A 1986-07-24 1986-07-24 High-frequency high-voltage dc power source Pending JPS6331472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17454286A JPS6331472A (en) 1986-07-24 1986-07-24 High-frequency high-voltage dc power source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17454286A JPS6331472A (en) 1986-07-24 1986-07-24 High-frequency high-voltage dc power source

Publications (1)

Publication Number Publication Date
JPS6331472A true JPS6331472A (en) 1988-02-10

Family

ID=15980364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17454286A Pending JPS6331472A (en) 1986-07-24 1986-07-24 High-frequency high-voltage dc power source

Country Status (1)

Country Link
JP (1) JPS6331472A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014099610A (en) * 2012-11-14 2014-05-29 Power Integrations Inc Integrated circuit package and switch mode power converter
US9831188B2 (en) 2012-11-14 2017-11-28 Power Integrations, Inc. Noise cancellation for a magnetically coupled communication link utilizing a lead frame
US10079543B2 (en) 2012-11-14 2018-09-18 Power Intergrations, Inc. Magnetically coupled galvanically isolated communication using lead frame

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56168240A (en) * 1980-05-29 1981-12-24 Matsushita Electric Ind Co Ltd Constant-voltage regulated power supply
JPS6112473A (en) * 1984-06-15 1986-01-20 スローン ヴアルヴ カムパニー Front-section air swing-away

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56168240A (en) * 1980-05-29 1981-12-24 Matsushita Electric Ind Co Ltd Constant-voltage regulated power supply
JPS6112473A (en) * 1984-06-15 1986-01-20 スローン ヴアルヴ カムパニー Front-section air swing-away

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014099610A (en) * 2012-11-14 2014-05-29 Power Integrations Inc Integrated circuit package and switch mode power converter
US9831188B2 (en) 2012-11-14 2017-11-28 Power Integrations, Inc. Noise cancellation for a magnetically coupled communication link utilizing a lead frame
US10079543B2 (en) 2012-11-14 2018-09-18 Power Intergrations, Inc. Magnetically coupled galvanically isolated communication using lead frame
US10224292B2 (en) 2012-11-14 2019-03-05 Power Integrations, Inc. Noise cancellation for a magnetically coupled communication link utilizing a lead frame
US10361632B2 (en) 2012-11-14 2019-07-23 Power Integrations, Inc. Magnetically coupled galvanically isolated communication using lead frame

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