JPS63314669A - マルチプロセッサシステムにおけるクロック同期方式 - Google Patents

マルチプロセッサシステムにおけるクロック同期方式

Info

Publication number
JPS63314669A
JPS63314669A JP62151826A JP15182687A JPS63314669A JP S63314669 A JPS63314669 A JP S63314669A JP 62151826 A JP62151826 A JP 62151826A JP 15182687 A JP15182687 A JP 15182687A JP S63314669 A JPS63314669 A JP S63314669A
Authority
JP
Japan
Prior art keywords
processor
time
clock
processors
control block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62151826A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0528863B2 (enExample
Inventor
Shoichiro Nakai
正一郎 中井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62151826A priority Critical patent/JPS63314669A/ja
Publication of JPS63314669A publication Critical patent/JPS63314669A/ja
Publication of JPH0528863B2 publication Critical patent/JPH0528863B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
JP62151826A 1987-06-17 1987-06-17 マルチプロセッサシステムにおけるクロック同期方式 Granted JPS63314669A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62151826A JPS63314669A (ja) 1987-06-17 1987-06-17 マルチプロセッサシステムにおけるクロック同期方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62151826A JPS63314669A (ja) 1987-06-17 1987-06-17 マルチプロセッサシステムにおけるクロック同期方式

Publications (2)

Publication Number Publication Date
JPS63314669A true JPS63314669A (ja) 1988-12-22
JPH0528863B2 JPH0528863B2 (enExample) 1993-04-27

Family

ID=15527159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62151826A Granted JPS63314669A (ja) 1987-06-17 1987-06-17 マルチプロセッサシステムにおけるクロック同期方式

Country Status (1)

Country Link
JP (1) JPS63314669A (enExample)

Also Published As

Publication number Publication date
JPH0528863B2 (enExample) 1993-04-27

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