JPS63313934A - Digital radio receiver - Google Patents

Digital radio receiver

Info

Publication number
JPS63313934A
JPS63313934A JP14904887A JP14904887A JPS63313934A JP S63313934 A JPS63313934 A JP S63313934A JP 14904887 A JP14904887 A JP 14904887A JP 14904887 A JP14904887 A JP 14904887A JP S63313934 A JPS63313934 A JP S63313934A
Authority
JP
Japan
Prior art keywords
signal
antenna
base band
phase ambiguity
radio receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14904887A
Other languages
Japanese (ja)
Inventor
Hidehiro Takahashi
英博 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP14904887A priority Critical patent/JPS63313934A/en
Publication of JPS63313934A publication Critical patent/JPS63313934A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable to receive a digital signal, equal to that by using the antenna of high gain by detecting each of plural small antenna reception signals once, and deciding the digital signal after adding and synthesizing the obtained base band signals. CONSTITUTION:A first series amplifies and frequency-converts the signal received by the antenna 1a, by a high frequency part 2a, and makes it into the base band signal by a carrier synchronization circuit 3a. Phase ambiguity is removed by a phase ambiguity removing part 4a by a unique word detection, etc. A second series obtains the base band signal without any phase ambiguity similarly by 1b-5b. The two base band signals obtained by an above-mentioned way are added by an adding synthesizer 10, and furthermore, the decision of the digital signal is performed by a decider 11.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) この発明はディジタル信号を受信する無線通信機に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) This invention relates to a wireless communication device that receives digital signals.

(従来の技術) 従来の無線通信は適用システム毎に回線設計を行ない、
適した大きさのアンテナを選択し設置して通信を行なっ
て来た。特に、衛星通信のように受信電力束密度の限ら
れた場合に多元速度(帯域)を想定したシステムを構築
する場合には、例えシステム発足当初には高速(広帯域
)信号の受信を行なわなくとも将来の拡張のために大形
のアンテナを設置しなければならない、このため価格の
増大がひき起こされる。
(Conventional technology) In conventional wireless communication, lines are designed for each applicable system.
We have selected and installed an antenna of an appropriate size to perform communications. In particular, when constructing a system that assumes multiple speeds (bands) in cases where the reception power flux density is limited, such as in satellite communications, even if the system does not receive high-speed (wideband) signals at the beginning of its inception. A larger antenna must be installed for future expansion, which causes an increase in cost.

また、小さなアンテナを組合わせて高利得のアンテナと
する方法もあるが、従来の方法によれば各々の小アンテ
ナ出力信号の位相を最適に調整する必要がある。特に温
度特性等による短周期の変化に対しては自動的に位相を
調整する自動追従回路を要し価格の増大をまぬかれない
There is also a method of combining small antennas to create a high-gain antenna, but according to the conventional method, it is necessary to optimally adjust the phase of each small antenna output signal. In particular, an automatic follow-up circuit that automatically adjusts the phase is required for short-term changes due to temperature characteristics, etc., which inevitably increases the cost.

(発明が解決しようとする問題点) 本発明は位相自動追従回路を特段に要せずして、小さな
アンテナを組合わせて高利得のアンテナサブシステムを
構成する無線受信機を提供することを目的とする。
(Problems to be Solved by the Invention) An object of the present invention is to provide a radio receiver that configures a high-gain antenna subsystem by combining small antennas without particularly requiring an automatic phase tracking circuit. shall be.

〔発明の構成〕[Structure of the invention]

(問題点を解決するための手段) 本発明は複数の小アンテナ受信信号を各々−たん検波し
、得られたベースバンド信号を加算合成した後にディジ
タル信号の判定を行なう事により、高利得のアンテナを
用いたと同等のディジタル信号の受信を行なうものであ
る。
(Means for Solving the Problems) The present invention detects signals received by a plurality of small antennas individually, adds and synthesizes the obtained baseband signals, and then determines the digital signal. This method performs the same digital signal reception as using .

特に位相変調方式を用いたシステムにあっては検波回路
中に位相あいまい塵除去機能を備え、位相あいまい度の
無いベースバンド信号を加算合成した後にディジタル信
号の判定を行なう。
Particularly, in a system using a phase modulation method, a phase ambiguity dust removal function is provided in the detection circuit, and a digital signal is determined after adding and combining baseband signals with no phase ambiguity.

また、検波回路中に誤り訂正機能を備え、その出力とし
て符号(g頼度をあわせて出力し、加算合成後にディジ
タル値判定を行なうものである。
Further, an error correction function is provided in the detection circuit, and a code (g reliability) is outputted as an output, and a digital value judgment is performed after addition and synthesis.

(作用) 複数のアンテナに受信された信号は高周波信号であり、
これらは各々の位相を保ったまま増幅、周波数変換され
るにの信号を合成するに当り位相に起因する困難のある
事は前述した1本発明の構成によれば、位相の異なる複
数の高周波又は中間周波信号は検波回路によって複数の
ベースバンド信号となった後に加算合成する。
(Operation) The signals received by multiple antennas are high frequency signals,
Although these signals are amplified and frequency converted while maintaining their respective phases, there are difficulties due to the phase when synthesizing the signals.According to the configuration of the present invention, multiple high frequency or The intermediate frequency signal is converted into a plurality of baseband signals by a detection circuit, and then added and synthesized.

雑音の主成分は各々の高周波増幅器で発生する熱雑音で
あり各々の間に相関はないが2信号成分は同一であり相
関は極めて強い。
The main component of the noise is thermal noise generated in each high frequency amplifier, and there is no correlation between them, but the two signal components are the same and the correlation is extremely strong.

特にBPSK、QPSK等の位相変調方式にあっては位
相あいまい度さえ除去されていれば、雑音成分は電力加
算、信号成分はベクトル加算となり、得られる信号のS
/N比は高周波信号あるいは中間周波信号で最適位相合
成を行なって得た信号のS/N比と等しくなる。
In particular, in phase modulation methods such as BPSK and QPSK, if phase ambiguity is removed, noise components are added by power and signal components are added by vectors, resulting in S of the resulting signal.
The /N ratio is equal to the S/N ratio of a signal obtained by performing optimal phase synthesis on a high frequency signal or an intermediate frequency signal.

これによって位相自動追従型合成回路のような複雑な回
路を要さずに複数アンテナの受信信号の最適合成を行な
う事ができる。
This makes it possible to optimally combine received signals from multiple antennas without requiring a complex circuit such as an automatic phase tracking type combining circuit.

ベースバンド信号の位相差はほとんど考慮する必要はな
いが、アンテナの間隔と伝送ビットレートとのかね合い
では問題となる事もある。例えばビットレートが10M
bps程度の高速のときはアンテナ位置を電波到来方向
に関して1〜2mの制度で定めるか、ケーブル等で調整
する要がある。但し高周波、中間周波で合成する事に比
べれば極めてゆるい精度で十分である。
Although there is almost no need to consider the phase difference between baseband signals, it may become a problem when it comes to balancing antenna spacing and transmission bit rate. For example, the bit rate is 10M
At high speeds of the order of bps, it is necessary to set the antenna position within 1 to 2 m relative to the radio wave arrival direction, or to adjust it using a cable or the like. However, compared to combining high frequencies and intermediate frequencies, an extremely loose precision is sufficient.

(実施例) 以下に図面を用いて本発明の実施例を示す。(Example) Examples of the present invention will be shown below using the drawings.

第1図は位相変調方式、アンテナ数2の場合について本
発明を実施した例である。
FIG. 1 shows an example in which the present invention is implemented using a phase modulation method and two antennas.

第1の系列は、アンテナ(1a)で受信した信号を高周
波部(2a)で増幅、周波数変換し、キャリア同期回路
(3a)にてベースバンド信号とする。位相あいまい性
はユニークワード検出等により、位相あいまい性除去部
(4a)で除去するが、この時、振幅情報は保ったまま
とする。ユニークワード検出等に必要な再生クロックは
クロック再生回路(5a)によって得る。
In the first series, a signal received by an antenna (1a) is amplified and frequency-converted by a high frequency section (2a), and converted into a baseband signal by a carrier synchronization circuit (3a). The phase ambiguity is removed by a phase ambiguity removing unit (4a) by unique word detection or the like, but at this time, the amplitude information is maintained. A recovered clock necessary for unique word detection etc. is obtained by a clock recovery circuit (5a).

第2の系列は上と同様にして(1b)〜(5b)により
、位相あいまい性のないベースバンド信号を得る。
For the second series, a baseband signal without phase ambiguity is obtained using (1b) to (5b) in the same manner as above.

以上のようにして得られた2つのベースバンド信号は加
算合成器(10)によって加算され、さらに判定器(1
1)によってディジタル信号の判定を行なわれる6判定
に必要なりロックはクロック再生回路(12)によって
得る。
The two baseband signals obtained in the above manner are added by an addition combiner (10), and further by a decider (10).
The lock required for the 6-decision in which the digital signal is determined by 1) is obtained by the clock recovery circuit (12).

第2図に本発明の第2の実施例を示す。FIG. 2 shows a second embodiment of the invention.

これは周波数シフトキーイング(FSX)変調方式、ア
ンテナ数2の場合について本発明を実施した例である。
This is an example in which the present invention is implemented using a frequency shift keying (FSX) modulation method and the number of antennas is two.

位相あいまい性が無いため、検波器として周波数弁別器
(6a、 6b)を用いるのみでベースバンド信号を得
る。
Since there is no phase ambiguity, a baseband signal can be obtained only by using frequency discriminators (6a, 6b) as detectors.

以下、加算合成、ディジタル判定は第1の実施例と同様
である。
Hereinafter, addition and synthesis and digital determination are the same as in the first embodiment.

以上、アンテナ数は2の場合について説明を加えて来た
がアンテナ数が3,4・・・の場合についても同様であ
り、これまでa、bの添字をつけた構成要素についてc
、d・・・と拡張し1合成加算器で3.4・・・系統の
信号を合成する事により本発明を実施する事ができる。
Above, we have explained the case where the number of antennas is 2, but the same applies to the case where the number of antennas is 3, 4, etc. Up to now, we have explained the case where the number of antennas is 3, 4, etc.
, d, and so on, and the signals of 3, 4, and 4 systems can be combined using one combining adder, thereby implementing the present invention.

また、第1図の実施例に於いてクロック再生回路は(5
a) 、 (5b) 、 (12)と3個用いているが
、3個のうち任意の場所に1個のクロック再生回路を置
いて、全ての必要なりロックを再生する事もできる。ま
た、上記の実施例に対しさらに誤り訂正機能をも加えて
本発明を実施する事ができる。
Furthermore, in the embodiment shown in FIG. 1, the clock regeneration circuit is (5
Although three clock regeneration circuits are used, a), (5b), and (12), one clock regeneration circuit can be placed anywhere among the three to regenerate all necessary locks. Further, the present invention can be implemented by further adding an error correction function to the above embodiment.

検波器出力、即ち加算合成器(10)の各入力であった
信号を誤り訂正回路に入力し、誤り訂正回路は、誤り訂
正後の符号を上位ビットに、その符号の信頼度を示す情
報を下位ビットとする信号を出力する。この誤り訂正回
路出力信号を加算合成器(10)に入力、合成信号の符
号を判定して伝送された符号情報を得る。このとき、上
記合成信号の符号判定にあたり、さらに誤り訂正を行な
う事が可能なのはもちろんである。
The output of the detector, that is, the signals that were each input to the adder synthesizer (10), is input to the error correction circuit, and the error correction circuit uses the error-corrected code as the upper bit and information indicating the reliability of the code. Outputs a signal as the lower bit. This error correction circuit output signal is input to an addition combiner (10), and the code of the combined signal is determined to obtain transmitted code information. At this time, it is of course possible to further perform error correction when determining the sign of the composite signal.

〔発明の効果〕〔Effect of the invention〕

本発明を実施する事により、特別の自動制御位相追従型
合成回路を用いる事なしに、複数アンテナによる受信信
号の最適合成を行なう事ができる。
By implementing the present invention, it is possible to optimally combine received signals from a plurality of antennas without using a special automatic control phase tracking type combining circuit.

検波回路は複数個使用する事になるが、検波回路は通信
機にとって必須のものであるからLSI化等の技術によ
って低価格化、小形化、低消費電力化が進む事は明白で
ある。このように、量産化された回路と、同様に量産化
された小形アンテナを本発明に従って組合わせる事によ
り大形のアンテナを用いたシステムと同様の性能が得ら
れる事は価格の低下に極めて有効である。人形のアンテ
ナは特注あるいは受注生産となり価格が高いがらである
Although a plurality of detection circuits will be used, since detection circuits are essential for communication equipment, it is clear that technologies such as LSI will lead to lower prices, smaller sizes, and lower power consumption. In this way, by combining a mass-produced circuit and a similarly mass-produced small antenna according to the present invention, it is possible to obtain the same performance as a system using a large antenna, which is extremely effective in reducing costs. It is. Doll antennas are custom-made or made to order, and are expensive.

また、高周波、中間周波段階で複数の信号を合成する方
法に比べ、本発明によれば、位相を最適に調整する手間
、あるいは自動調整する装置を不用とする事ができる。
Furthermore, compared to a method of synthesizing a plurality of signals at high frequency and intermediate frequency stages, the present invention eliminates the need for optimal phase adjustment or an automatic adjustment device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示す図、第2図は他の実施例
を示す図である。 la、 lb・・・アンテナ  2a、 2b・・・高
周波部3a、3b・・・キャリア同期部 4a、4b・・・位相あいまい性除去部5a、 5b、
 12・・・クロック同期部10・・・加算合成器  
 11・・・ディジタル判定器代理人 弁理士 則 近
 憲 佑 同  松山光之
FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing another embodiment. la, lb...antenna 2a, 2b...high frequency section 3a, 3b...carrier synchronization section 4a, 4b...phase ambiguity removal section 5a, 5b,
12... Clock synchronization unit 10... Addition synthesizer
11...Digital judgment device agent Patent attorney Nori Chika Ken Yudo Mitsuyuki Matsuyama

Claims (2)

【特許請求の範囲】[Claims] (1)複数のアンテナと、夫と対応する複数の検波回路
とを備え、前記検波回路出力を加算合成した後にディジ
タル値判定を行なって出力する事を特徴とするディジタ
ル無線受信機。
(1) A digital radio receiver comprising a plurality of antennas and a plurality of detection circuits corresponding to the antennas, and which performs digital value determination and outputs after adding and combining the outputs of the detection circuits.
(2)変調方式は位相変調であり、検波回路は位相あい
まい性除去機能を有する事を特徴とする特許請求の範囲
第1項記載のディジタル無線受信機(3)検波回路は誤
り訂正機能を有し、誤り訂正後の符号の信頼度を示す情
報をあわせて出力する事を特徴とする特許請求の範囲第
1項記載のディジタル無線受信機。
(2) The digital radio receiver according to claim 1, wherein the modulation method is phase modulation, and the detection circuit has a phase ambiguity removal function. (3) The detection circuit has an error correction function. 2. The digital radio receiver according to claim 1, wherein the digital radio receiver also outputs information indicating the reliability of the code after error correction.
JP14904887A 1987-06-17 1987-06-17 Digital radio receiver Pending JPS63313934A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14904887A JPS63313934A (en) 1987-06-17 1987-06-17 Digital radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14904887A JPS63313934A (en) 1987-06-17 1987-06-17 Digital radio receiver

Publications (1)

Publication Number Publication Date
JPS63313934A true JPS63313934A (en) 1988-12-22

Family

ID=15466508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14904887A Pending JPS63313934A (en) 1987-06-17 1987-06-17 Digital radio receiver

Country Status (1)

Country Link
JP (1) JPS63313934A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0327626A (en) * 1989-06-26 1991-02-06 Nippon Telegr & Teleph Corp <Ntt> Synthesis diversity reception circuit after reception level adaptive detection
JPH07154377A (en) * 1993-11-30 1995-06-16 Nec Corp Diversity receiver
GB2438545A (en) * 2004-02-25 2007-11-28 Matsushita Electric Co Ltd Wireless communication apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0327626A (en) * 1989-06-26 1991-02-06 Nippon Telegr & Teleph Corp <Ntt> Synthesis diversity reception circuit after reception level adaptive detection
JPH07154377A (en) * 1993-11-30 1995-06-16 Nec Corp Diversity receiver
GB2438545A (en) * 2004-02-25 2007-11-28 Matsushita Electric Co Ltd Wireless communication apparatus
GB2438545B (en) * 2004-02-25 2008-10-08 Matsushita Electric Ind Co Ltd Wireless communication medium processing apparatus and wireless communication medium processing system

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