JPS63313357A - Vfo control circuit - Google Patents

Abstract

PURPOSE:To prevent malfunction due to a data signal having a discontinuous frequency by throwing a changeover circuit to a position outputting a clock pulse having a prescribed frequency selectively when a one-shot pulse is generated. CONSTITUTION:A clock signal CK synchronously with an MFM data signal D reproduced by a VFO circuit 1 is given to a disk controller 2, which uses the signal CK to separate the signal D into a clock and a data. A changeover circuit 3 is provided to the input side of the circuit 1 and a reproduced signal PBS and a clock pulse CP having a prescribed frequency are inputted to the circuit 3. The circuit 3 selects and outputs the signal PBS when the output signal of a NAND gate 4 is at 'H' and the pulse CP when the said signal at 'L'. A gate signal RG read from the controller 2 is given to one input of the gate 4 and an output signal WP of the on-shot circuit 5 receiving an index signal IDX is given to the other input. Thus, malfunction of readout is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention provides a VFOIIi system that separates a reproduced signal reproduced from a hard disk drive into a clock signal and a data signal.
This relates to the III11 circuit.

[Conventional technology]

Generally, in hard disk drives, data is recorded on a recording medium using a modified frequency modulation (MFM) method. That is, when recording the clock signal CK and data signal for bit synchronization as shown in FIG. 3(a), if the current bit is "0" and The clock signal GK is recorded only when the previous bit is "0", and only the data signal is recorded when either the current or previous bit is "1", in order to improve the recording density. There is. Therefore, when reproducing the signal recorded in this way and using it for data processing, in order to separate the reproduced signal and the clock signal,
An FO circuit (variable frequency oscillation circuit) is used.

A VFO circuit separates a reproduced signal into a data signal and a clock signal by performing an operation opposite to that during recording.

On the other hand, in a hard disk drive, prior to recording data, a process is performed to initialize the recording medium by filling it with a data signal that changes at a constant frequency.

In this initialization process, the write gate signal WG is activated ("selected") in synchronization with the rise of the index signal IDX, which is output once per revolution of the recording medium, as shown in FIG.
), this state is maintained until the next index signal IDX is generated, and the data signal of a predetermined frequency is input/output during this time, thereby ending the process.

[Problem that the invention seeks to solve]

However, since the 3-input gate signal WG is returned to inactive due to the generation of the second index signal IDX, data signals are duplicated at the beginning of the same track due to the sending of this outgoing gate signal WG. is written. For this reason, the frequency of the data signal written at the beginning of the track becomes discontinuous, and when this is played back, a reproduced signal with a frequency other than the predetermined frequency appears at the beginning of the track, which may cause the VFO circuit to malfunction. There was a problem.

An object of the present invention is to prevent malfunctions caused by data signals of discontinuous frequencies.
1] To provide a circuit.

[Means for solving problems]

The present invention provides a one-shot circuit that outputs a one-shot pulse of a predetermined pulse width based on an index signal output for each rotation of a recording medium in a hard disk device, and inputs a playback signal from the hard disk device and a clock pulse of a constant frequency. and a switching circuit that selects a clock pulse of a constant frequency during the generation time of the one-shot pulse and inputs it to a VFO circuit that separates the clock signal and the data signal.

[Effect]

During the one-shot pulse generation period, the switching circuit is switched to the side that selectively outputs the clock pulse having the same constant frequency as the data signal frequency at the time of initialization. Therefore, since a constant frequency clock is input to the VFO circuit at the beginning of the track, there will be no malfunction in the reproduction operation.

〔Example〕

FIG. 1 is a circuit diagram showing one embodiment of the present invention, in which the VFO
A clock signal GK synchronized with the MFM data signal reproduced by the circuit 1 is input to the disk controller 2. The disk controller 2 can separate the MFM data signal into a clock and data based on the input clock signal Ji3GK.

On the other hand, a switching circuit 3 is provided on the input side of the VFO circuit 1. Then, this switching circuit 3 receives a reproduction @ number PBS from the reproduction head and a clock pulse CP of a constant frequency.
is entered. When the output signal of the Nant gate 4 is "H", this switching circuit 3 outputs a reproduction signal PBS'a-
It is configured to selectively output the clock pulse CP and, conversely, to selectively output the clock pulse CP when the signal is "ON". The disk controller 2 is connected to one gate input of the Nantes gate 4.
A readout gate signal RG (“Yes” at the time of reading) is input from one gate, and a one-shot pulse (“
An output signal WP of a one-shot circuit 5 that generates a signal (L" level) is input.

In the above configuration, the clock pulse CP is set to the same frequency as the data signal used during initialization processing.

Further, the one-shot pulse WP output from the one-shot circuit 5 is set to have a pulse width slightly longer than the period during which the frequency is not consistent at the beginning of the track.

Therefore, the read gate ff1eRG is activated (“switched”) in order to complete the initialization 518 minutes and reproduce the data.
2, the one-shot circuit 5 outputs a one-shot pulse WP as shown in FIG. 2(b) in synchronization with the rise of the index signal IDX. Then, the output signal of the Nant gate 4 becomes "L", and the switching circuit 3 switches to the side that selects and outputs the clock pulse CP. However, when the one-shot pulse WP returns to “H”,
The switching circuit 3 switches to the side that selectively outputs the reproduced signal J"3PBS. Therefore, at the beginning of the track where the frequency is discontinuous in the initialization process, as shown in FIG. 2(C), the VFO A clock pulse CP of a constant frequency is inputted to the circuit 3, thereby preventing the reproduction operation from malfunctioning at the beginning of the track.

〔Effect of the invention〕

As explained above, according to the present invention, even if a data signal whose frequency is discontinuous during initialization processing is reproduced,
During this time, a clock pulse of a constant frequency is input to the VFO circuit instead of the reproduced data signal, so that it is possible to reliably prevent the read operation from malfunctioning.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of this light; Fig. 2 is a time chart for explaining the operation of the embodiment; Fig. 3 is a time chart for explaining the data signal recording method; is a time chart for explaining operations during initialization processing. 1...VFO record, 2...Disk controller,
3...Switching circuit, 4...Nant gate, 5...
One shot circuit. Figure 1 Figure 2 100+101

Claims (1)

[Claims] In a VFO circuit that separates a reproduced signal reproduced from a hard disk drive into a clock signal and a data signal, a predetermined pulse width is generated in synchronization with an index signal outputted every rotation of a recording medium in the hard disk drive. A one-shot circuit that outputs a one-shot pulse of 1, a reproduction signal from a hard disk drive, and a clock pulse of a constant frequency are input, and the generation time width of the one-shot pulse is determined by selecting a clock pulse of a constant frequency and using the clock pulse as the clock signal. A VFO control circuit comprising a switching circuit that inputs an input to a VFO circuit that separates a data signal from the data signal.