JPS6330081A - Coding method for picture signal - Google Patents

Abstract

PURPOSE:To reduce more error propagation with less reset signal by using a difference with a picture signal at a different point of time so as to code an input picture signal and arranging a reset picture element signal not taking a difference at the middle in a consecutive unit predictive coding series at a proper interval. CONSTITUTION:A signal subjected to difference pulse code modulation (D-PCM) among signals inputted to an input terminal 26 is decoded by a representive value setting device 28, an adder 30, a delay device 32 and a selector 60. Then the decoded signal is delayed by the same time (4T) as that of a delay device 56 and fed to a selector 64. In case of a postvalue predictive D-PCM, the signal is reversed in order by a FILO memory 66 and the result is fed to a selector 64. A reset picture element signal is delayed by a delay device (delay time 4T) 68 and a delay device (delay time TI)70, restored at the midpoint of a D-PCM data series and fed to the selector 64. The selector 64 selects a picture element signal according to the signal of a control circuit 72 and gives an output to a D/A converter 34. Thus, the reset picture element signal is reduced to 1/2 while the error propagation is suppressed less thereby suppressing the increase in the transmission rate.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of encoding an image signal by differential pulse code modulation (D-PCM).

[Conventional technology]

As a typical RI-PCM method, there is a previous value predictive coding method that takes a difference from the immediately preceding sample value, and FIG. 15 shows a block diagram of its transmission system. The image signal input to the input terminal 10 is converted into X1 bit (for example, 8
bit), and the subtracter 14 converts it into a digital signal of 1
The decoded signal before the sample period (IT) is subtracted. The nonlinear quantizer 16 compresses the difference value obtained by the subtracter 14 to X2 bits (for example, 4 bits), and sends the result to the output terminal 1.
Output to 8.

The output of the nonlinear quantizer 16 is also
It is also sent to the representative value setter 20, which has the opposite effect to the adder 2.
2 adds the decoded signal before IT to the representative value output.

The output of the adder 22 is delayed by IT by the delay device 24 and sent to the subtracter 14 as a predicted value (or subtracted value) of the next pixel.

FIG. 16 shows a block diagram of a receiving system corresponding to FIG. 15. The signal output from the output terminal 18 in FIG. 15 is input to the input terminal 26 via a transmission path. The input signal is converted into a representative value (or decoded) by a representative value setter 28 similar to the representative value setter 20, and an adder 30 adds the pre-IT decoded signal to the representative value output. The output of adder 30 is delayed by IT by delay device 32 and used for decoding the next pixel.

D/A converter 34 converts the output of adder 30 into an analog signal and supplies it to output terminal 36.

In such an encoding method, since the current signal is sequentially encoded and decoded using the decoded signal before IT, there is a drawback that if an error occurs in the transmission path, the error propagates one after another.

As a countermeasure, conventionally, a method has been proposed to minimize the effect of errors by transmitting the original value without taking the difference for each fixed number of pixels as a pixel signal (this is called a reset pixel or reset pixel signal). It was done. A block diagram of the transmission system of this method is shown in FIG. In the figure, the same members as in FIG. 15 are given the same reference numerals. The switching signal generation circuit 38 sends a pulse of a constant width to the selector 40 at certain period intervals. The selector 40 follows the control pulse of the switching signal generation circuit 38, and when receiving the pulse selects the output of the A/D converter 12, and at other times selects and outputs the output of the nonlinear quantizer 16. Terminal 18 is supplied. Further, the selector 42 is for supplying the same signal to the delay device 24 when the selector 40 selects the output of the A/D converter 12. Therefore, each pixel signal becomes as shown in FIG. ○ indicates a reset pixel signal, △ indicates D-P
A pixel signal encoded by CM is shown. This results in
Error propagation can be suppressed to a maximum of 4 pixels.

[Problem that the invention seeks to solve]

However, when this method is used, the reset pixel signal is not compressed, so if the number of reset pixel signals is increased in an attempt to reduce error propagation, the transmission rate will increase.

Therefore, the present invention provides a new encoding method that reduces error propagation with fewer resets.1) The image signal encoding method according to the present invention uses differences between image signals at different times. An encoding method that differentially encodes an input image signal and inserts a reset pixel signal that does not take a difference at appropriate intervals, the reset pixel signal being placed at the center of a continuous unit prediction encoded sequence. Features.

[Effect]

With this configuration, even if the number of error propagation pixels is the same as in the conventional case, it is possible to reduce the reset pixel signal by about half, and therefore, the transmission rate can be kept low.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is an explanatory diagram of the first method of the present invention.

The base of the arrow indicates the pixel to be used for prediction, and the tip of the arrow indicates the pixel to be differentially encoded. As shown in FIG. 1, the right side of the reset pixel signal is the previous value prediction DPCM, and the left side is the diameter value prediction D-PCM. As a result, the coding sequence is divided into two parts, the previous value prediction and the diameter value prediction, so that the error propagation becomes 1/2 between the reset pixels.

FIG. 2 shows a block diagram of a transmission system implementing this method. The same members as in FIG. 17 are given the same reference numerals. Below, only the parts that are different from FIG. 17 will be explained. F I L O
(First In La5t 0ut) The memory 50 operates in accordance with the control signal from the control circuit 52 for a certain period (first
In the example shown in the figure, the output of the A/D converter 12 (for 5 pixels) is taken in (PUSH), the order is reversed, and the output is supplied to the seven detector 54 (POP). Delay device 56 with a delay time of 4T.
Reference numeral 58 is provided for adjusting the time (by pixel) during which the FILO memory 50 changes the order of pixel signals. The selector 54 selects one of the two input signals d and e and applies it to the adder 14 in accordance with a control signal from the control circuit 52. The control circuit 52 includes a FILO memory 50
At the same time, a selection signal synchronized therewith is supplied to the selector 40. In addition, the selector 42
A predicted pixel switching signal is supplied to. Figure 3 shows the control circuit 5.
2 shows a timing diagram of 2. In FIG. 3, the "H" side indicates the operating state. In selector 40.42.54, "
The output of each signal line is selected by "H".
g becomes an inverted signal of f.

FIG. 4 shows a block diagram of the receiving system. The same members as in FIG. 16 are given the same reference numerals. Of the signals input to the input terminal 26, the D-PCM signal is sent to the representative value setter 28, the adder 30, the delay device 32, and the selector 60 (selector 4).
2).

The decoded signal is delayed by T) in the delay device 62 at the same time as the delay device 56, and is applied to the selector 64. Furthermore, in the case of the transplant prediction D-PCM, the order is reversed in the FILO memory 66 and then applied to the selector 64.

The reset pixel signal is delayed by a delay device (delay time 4T) 68 and a delay device (delay time IT) 70, returned to the center position of the D-PCM data series, and applied to the selector 64. The selector 64 selects a pixel signal according to the control signal from the control circuit 72 and outputs it to the D/A converter 34. The control circuit 72 controls the selector 60 at the same timing as a, b, and c in FIG. 7, and the selector 64 at the same timing as a, b, and c in FIG.
Each signal is switched at a timing when f is delayed by the same amount of time as the delay device 62 (in this example, 4 pixels). D/
The A converter 34 converts the signal output from the selector 64 into an analog signal and supplies it to the output terminal 36.

With such a configuration, it is possible to reduce the reset pixel signal to 1/2 while suppressing error propagation, and it is possible to suppress an increase in the transmission rate.

Next, a second method of the present invention will be explained. FIG. 5 is an explanatory diagram thereof. Since the image signal has a fairly strong vertical correlation, almost no deterioration occurs even if the pixel signal of one line before is used for prediction. Therefore, as shown in FIG. 5, we propose that the reset pixel signal be viewed on the screen and shifted by one line, and the reset pixel signal of the upper line be used for the lower line as well. That is, the reset pixel signal indicated by A in FIG. 5 is used as the predicted pixel signal for both the mouth and C pixels.

FIG. 6 is a block diagram of a transmission system implementing this method. The same members as in FIG. 17 are given the same reference numerals. below,
Portions different from those in FIG. 17 will be explained. delay device 80
is the reset pixel signal IH (1 line period) - IT
(one sample period) and is supplied to the selector 82.

In accordance with the control signal from the control circuit 84, the selector 82
Either the reset pixel signal or the D-PCM pixel signal is selected and output. The timing of the control circuit 84 is shown in FIG.

FIG. 8 shows a block diagram of a receiving system corresponding to FIG. 6.

The same members as in FIG. 4 are given the same reference numerals.

Among the input signals of the input terminal 26, the D-PCM signal is converted into a representative value by the representative value setter 28, and the adder 30,
The signal is decoded into the original signal by the loop of selector 88 and delay device 32. On the other hand, the reset pixel signal is sent to the selector 88.
．． 90 and delay device 92 . The delay device 92 delays the reset pixel signal by (LH-IT) and supplies it to the selector 88 as a predicted value for the lower line. The selector 88 selects one of the reset pixel signal, the upper line reset pixel signal, and the previous value decoded signal according to a control signal from the control circuit 94. The selector 90 also has a control circuit 94
Depending on the control signal from the controller, either the reset pixel signal or the decoded pixel signal is selected and output to the D/A converter 34. The timing of control circuit 94 is the same as shown in FIG. The D/A converter 34 converts the output of the selector 90 into an analog signal and supplies it to the output terminal 36.

When the reset pixel signals are arranged as shown in Figure 5, the number of D-PCM pixels connected to the same reset pixel signal is 4 pixels on the same line as the reset pixel signal, and 5 pixels on the lower line.
It becomes a pixel and becomes unbalanced. In order to match these numbers, an arrangement as shown in FIG. 9 may be used. In that case, the delay amount of the delay device 80 in FIG. 6 and the delay device 92 in FIG. 8 is set as (IH-2T), and the timing a' + b' + c' of the control circuit 84. Do like a, b, c.

Next, a third method of the present invention will be explained. FIG. 10 is an explanatory diagram thereof. While the second method described above uses the reset pixel signal of the upper line, the third method uses the average value of the reset pixel signals of the lines above and below the current line as the predicted signal of the current line. As a result, compared to the second method, it is possible to further reduce the influence of errors in the reset pixel signal itself and interference with edge business caused by D-PCM prediction errors.

Fig. 1) shows a block diagram of a transmission system implementing the third method of the present invention. The same members as in FIG. 6 are given the same reference numerals. Hereinafter, parts that are different from FIG. 6 will be mainly explained. The pixel signal converted into a digital signal by the A/D converter 12 is converted into an IH
(IH+
IT) and then supplied to the subtracter 14. delay device 1
00 output) is also supplied to the adder 106 via the IH delay device 104. The adder 106 adds the output of the A/D converter 12 and the reset pixel signal delayed by 2H by the delay devices 100 and 104. 1/2
The coefficient circuit 108 multiplies the addition result by 1/2 and supplies the average value of the reset pixel signals of the upper and lower lines to the selector 82. The subsequent steps are the same as in the case of FIG.

FIG. 12 is a block diagram of a receiving system implementing the third method of the present invention. The same members as in FIG. 8 are given the same reference numerals. The reset pixel signal at the input terminal 26 passes through the IH delay device 1) 0 and the IT delay device 1) 2 to the selector 88.9.
0. The reset pixel signal is also delayed by 2H by the IH delay device 1) 0.1) 4, and then averaged between the upper and lower sides by the adder 1) 6 and the 1/2 coefficient circuit 1) 8, and then sent to the selector 88. supplied to

On the other hand, the D-PCM signal is converted into a representative value by a representative value setter 28, and added to the predicted signal by an adder 30 to become a decoded signal. In accordance with the control signal from the control circuit 94, the selector 88 selects three of the average values of the reset pixel signal of the current line, the decoded pixel signal, and the reset pixel signals of the upper and lower lines.
One of the two is selected and applied to the delay device 32 as a prediction signal for the next signal. The delay device 32 delays the prediction signal from the selector 88 by IT and supplies it to the adder 30 . The selector 90 selects either the reset pixel signal or the signal decoded from the DPCM according to a control signal from the control circuit 94 and supplies the selected signal to the D/A converter 34 .

The D/A converter 34 converts the digital signal into an analog signal and supplies it to the output terminal 36.

Furthermore, by combining the first, second, and third methods of the present invention and using reset pixel signals as shown in FIGS. 13 and 14, the reset pixel signals can be further reduced and transmitted. Rate increases can be suppressed.

〔Effect of the invention〕

As can be easily understood from the above description, according to the present invention, the number of reset pixels used to prevent error propagation can be significantly reduced, and an increase in the transmission rate due to insertion of reset pixels can be suppressed. Video phone and high quality VTR
In such cases, the transmission rate is an important factor, so the present invention, which can prevent an increase in the transmission rate, is extremely useful.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the first method of the present invention, FIG. 2 is a block diagram of a transmission system that implements the method, FIG. 3 is a diagram showing the operation timing of FIG. 2, and FIG. FIG. 3 is a block diagram of a receiving system corresponding to FIG. 2; FIG. 5 is an explanatory diagram of the second method of the present invention, FIG. 6 is a block diagram of a transmission system for implementing the method, and FIG. 7 is a diagram showing the operation timing of FIG. FIG. 8 is a block diagram of a receiving system corresponding to FIG. 6. FIG. 9 is an explanatory diagram of an improvement of the second method of the present invention. FIG. 10 is an explanatory diagram of the third method of the present invention, FIG. 1) is a block diagram of a transmission system for implementing the third method, and FIG.
) is a block diagram of a receiving system corresponding to FIG. FIGS. 13 and 14 are explanatory diagrams of a method that combines the first, second, and third methods of the present invention. Fig. 15 is a block diagram of the transmission system of the conventional method, Fig. 16 is a block diagram of its reception system, Fig. 17 is a block diagram of the transmission system of the conventional improved method, and Fig. 18 is a block diagram of the transmission system of the conventional method. FIG. 2 is an explanatory diagram of a conventional method used in this device. 10-...Input terminal 12-A/D converter 14
-・Subtractor 16-Linear quantizer 18-・Output terminal 2
0 - Representative value setter 22 - Adder 24 - Delay unit 26 - Input terminal 28 - Representative value setter 30 -
・Adder 32--Delay device 34...D/A converter
36-output terminal 38-.- switching signal generation circuit 40,
42,5t-Selector 5O-FILO memory 52-
Control circuit 56.5El-Delay device 60.64...-Selector 62--Delay device 66--FILO memory 6
8.70--Delay device 72-Control circuit 80-Delay device 82--Selector 84-Control circuit 86, 88
, 90--Selector 92--Delay device 94--Control circuit 100.102--Delay device 106--Adder 1
08-・1/2 coefficient circuit 1) 0.1) 2, 1) 4 = delay device 1) 6-adder 1) 8-・1/2 coefficient circuit

Claims (3)

[Claims] (1) An encoding method in which an input image signal is differentially encoded using the difference between image signals at different times, and a reset pixel signal that does not take the difference is inserted at appropriate intervals, and the reset pixel signal is continuously A method of encoding an image signal, characterized in that the prediction is placed at the center of a unit prediction encoded sequence. (2) According to claim (1), the position of the reset pixel signal is shifted line by line, and the reset pixel signal of either line above or below the current line is used for differential encoding of the current line. A method of encoding an image signal as described. (3) The position of the reset pixel signal is shifted line by line, and the average value of the reset pixel signals of the line above and below the current line is used for differential encoding of the current line. The image signal encoding method described in .