JPS6330010U - - Google Patents

Info

Publication number
JPS6330010U
JPS6330010U JP12099386U JP12099386U JPS6330010U JP S6330010 U JPS6330010 U JP S6330010U JP 12099386 U JP12099386 U JP 12099386U JP 12099386 U JP12099386 U JP 12099386U JP S6330010 U JPS6330010 U JP S6330010U
Authority
JP
Japan
Prior art keywords
circuit
attenuator
mute
muting
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12099386U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12099386U priority Critical patent/JPS6330010U/ja
Publication of JPS6330010U publication Critical patent/JPS6330010U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Attenuators (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による信号減衰装置の原理ブロ
ツク図、第2図は本考案の一実施例を示す回路図
、第3図および第4図は第2図に示される装置の
各部の信号波形図、である。 (符号の説明)、1……アツテネータ回路、2
……スイツチ、3……ミユーテイング回路、4…
…駆動回路、V……入力信号、V……出力信
号、……制御信号。
Fig. 1 is a principle block diagram of a signal attenuation device according to the present invention, Fig. 2 is a circuit diagram showing an embodiment of the present invention, and Figs. 3 and 4 are signal waveforms of various parts of the device shown in Fig. 2. Figure. (Explanation of symbols), 1...Attenuator circuit, 2
...Switch, 3... Muting circuit, 4...
...drive circuit, V1 ...input signal, V3 ...output signal, ...control signal.

Claims (1)

【実用新案登録請求の範囲】 外部からのスイツチ操作に基づき入力信号を減
衰させるアツテネータと、 該アツテネータ回路を通して得られる信号のミ
ユーテイングを行い得るミユーテイング回路と、 外部からの制御信号に応答して該ミユーテイン
グ回路およびアツテネータ回路を同時に駆動する
回路と、 を備えてなる信号減衰装置。
[Claims for Utility Model Registration] An attenuator that attenuates an input signal based on an external switch operation; a muting circuit that can mute a signal obtained through the attenuator circuit; and a muting circuit that can mute a signal obtained through the attenuator circuit; A signal attenuation device comprising: a circuit that simultaneously drives a circuit and an attenuator circuit;
JP12099386U 1986-08-08 1986-08-08 Pending JPS6330010U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12099386U JPS6330010U (en) 1986-08-08 1986-08-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12099386U JPS6330010U (en) 1986-08-08 1986-08-08

Publications (1)

Publication Number Publication Date
JPS6330010U true JPS6330010U (en) 1988-02-27

Family

ID=31009840

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12099386U Pending JPS6330010U (en) 1986-08-08 1986-08-08

Country Status (1)

Country Link
JP (1) JPS6330010U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0241508U (en) * 1988-09-09 1990-03-22

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0241508U (en) * 1988-09-09 1990-03-22

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