JPS6329264U - - Google Patents
Info
- Publication number
- JPS6329264U JPS6329264U JP11940186U JP11940186U JPS6329264U JP S6329264 U JPS6329264 U JP S6329264U JP 11940186 U JP11940186 U JP 11940186U JP 11940186 U JP11940186 U JP 11940186U JP S6329264 U JPS6329264 U JP S6329264U
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- level control
- frequency
- magnetic recording
- recording device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第１図は本考案に係る磁気記録装置の回路構成
図、第２図は本考案をテープレコーダの音声記録
回路に適用した例を示す回路構成図、第３図は第
２図の音声記録回路を形成しているＩＣの内部構
成図、第４図は従来の磁気記録装置の回路構成図
である。
４……イコライザ、６……ダイオード、７……
トランジスタ、１０……ＡＬＣ回路、１１……コ
ンデンサ。
FIG. 1 is a circuit configuration diagram of a magnetic recording device according to the present invention, FIG. 2 is a circuit configuration diagram showing an example in which the present invention is applied to an audio recording circuit of a tape recorder, and FIG. 3 is an audio recording circuit of FIG. 2. FIG. 4 is a circuit diagram of a conventional magnetic recording device. 4... Equalizer, 6... Diode, 7...
Transistor, 10...ALC circuit, 11...capacitor.
Claims (1)
、高域補償された出力信号に基づいて前記記録信
号を所定の入力レベルに設定する自動レベル制御
回路とを含む磁気記録装置において、前記自動レ
ベル制御回路の入力側に高域減衰手段を設けたこ
とを特徴とする磁気記録装置。 In the magnetic recording device, the automatic level control circuit includes a high-frequency compensation circuit that compensates for high-frequency components of a recording signal, and an automatic level control circuit that sets the recording signal to a predetermined input level based on the high-frequency compensated output signal. A magnetic recording device characterized in that a high frequency attenuation means is provided on the input side of a level control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11940186U JPS6329264U (en) | 1986-08-05 | 1986-08-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11940186U JPS6329264U (en) | 1986-08-05 | 1986-08-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6329264U true JPS6329264U (en) | 1988-02-26 |
Family
ID=31006740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11940186U Pending JPS6329264U (en) | 1986-08-05 | 1986-08-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6329264U (en) |
-
1986
- 1986-08-05 JP JP11940186U patent/JPS6329264U/ja active Pending
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