JPS6329203U - - Google Patents

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Publication number
JPS6329203U
JPS6329203U JP12100686U JP12100686U JPS6329203U JP S6329203 U JPS6329203 U JP S6329203U JP 12100686 U JP12100686 U JP 12100686U JP 12100686 U JP12100686 U JP 12100686U JP S6329203 U JPS6329203 U JP S6329203U
Authority
JP
Japan
Prior art keywords
write
circuit
transistor
card reader
magnetic card
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12100686U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12100686U priority Critical patent/JPS6329203U/ja
Publication of JPS6329203U publication Critical patent/JPS6329203U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の磁気カードリーダに使用され
ている書き込み駆動回路、書き込み制御回路およ
び保護回路のブロツク図、第２図は従来の磁気カ
ードリーダに使用されている書き込み駆動回路お
よび書き込み制御回路のブロツク図である。 なお、１：書き込み制御回路、２：書き込み駆
動回路、３：出力端子、４：トランジスタ、５：
電源、６：制御端子、７：ツエナーダイオード、
８：保護回路。 Figure 1 is a block diagram of the write drive circuit, write control circuit and protection circuit used in the magnetic card reader of the present invention, and Figure 2 is the write drive circuit and write control circuit used in the conventional magnetic card reader. FIG. Note that 1: write control circuit, 2: write drive circuit, 3: output terminal, 4: transistor, 5:
Power supply, 6: Control terminal, 7: Zener diode,
8: Protection circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 書き込み制御回路１によつて制御される書き込
み駆動回路２より出力端子３に書き込み信号が磁
気ヘツドに出力される磁気カードリーダにおいて
、前記書き込み駆動回路２の接地回路に、トラン
ジスタ４と前記書き込み制御回路１用の電源５と
前記トランジスタ４の制御端子６との間ツエナー
ダイオード７を設けた保護回路８を設けてなる磁
気カードリーダ。 In a magnetic card reader in which a write signal is outputted to an output terminal 3 from a write drive circuit 2 controlled by a write control circuit 1 to a magnetic head, a transistor 4 and the write control circuit are connected to the ground circuit of the write drive circuit 2. A magnetic card reader is provided with a protection circuit 8 having a Zener diode 7 between a power supply 5 for the transistor 1 and a control terminal 6 of the transistor 4.
JP12100686U 1986-08-08 1986-08-08 Pending JPS6329203U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12100686U JPS6329203U (en) 1986-08-08 1986-08-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12100686U JPS6329203U (en) 1986-08-08 1986-08-08

Publications (1)

Publication Number Publication Date
JPS6329203U true JPS6329203U (en) 1988-02-26

Family

ID=31009865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12100686U Pending JPS6329203U (en) 1986-08-08 1986-08-08

Country Status (1)

Country Link
JP (1) JPS6329203U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5532267A (en) * 1978-08-28 1980-03-06 Toshiba Corp Writing unit with countermeasure to power break

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5532267A (en) * 1978-08-28 1980-03-06 Toshiba Corp Writing unit with countermeasure to power break

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