JPS63281456A - Semiconductor integrated circuit device and manufacture thereof - Google Patents

Semiconductor integrated circuit device and manufacture thereof

Info

Publication number
JPS63281456A
JPS63281456A JP11608987A JP11608987A JPS63281456A JP S63281456 A JPS63281456 A JP S63281456A JP 11608987 A JP11608987 A JP 11608987A JP 11608987 A JP11608987 A JP 11608987A JP S63281456 A JPS63281456 A JP S63281456A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
films
film
electrode
formed
gt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11608987A
Inventor
Akira Fukami
Atsushi Hiraishi
Mitsuru Hirao
Takahide Ikeda
Masayuki Obayashi
Masanori Odaka
Katsumi Ogiue
Osamu Saito
Nobuo Tanba
Tokuo Watanabe
Koichiro Yamada
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology

Abstract

PURPOSE:To simplify the manufacturing process of a semiconductor integrated circuit device by composing a base leading-out electrode for a bipolar transistor and a gate electrode for a MOSFET of the same conductor film formed by the same manufacturing process. CONSTITUTION:A base leading-out electrode 8 for a bipolar transistor Q1 extending on a field insulating film 7 is connected to a p<+> type external base region 11 formed into an n-well 5a by the diffusion of a p-type impurity from a p<+> type polycrystalline silicon film 9. A side wall 12 (a spacer) consisting of an insulator such as SiO2 is shaped onto the side face of the electrode 8 and an insulating film 13 such as an SiO2 film onto the side wall 12. On the other hand, insulating films 18 such as the SiO2 film are formed onto the surfaces of an n-well 5b and a p-well 6b in a section surrounded by the field insulating film 7, gate electrodes 19, 20 composed of films such as n<+> type polycrystalline silicon films 9 in Q2, Q3 as MOSFETs on the insulating films 18 and high melting-point metallic silicide films 10 on the films 9 are shaped at the same time as said electrode 8, and side walls 12 and insulating films 13 are formed.
JP11608987A 1987-05-13 1987-05-13 Semiconductor integrated circuit device and manufacture thereof Pending JPS63281456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11608987A JPS63281456A (en) 1987-05-13 1987-05-13 Semiconductor integrated circuit device and manufacture thereof

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP11608987A JPS63281456A (en) 1987-05-13 1987-05-13 Semiconductor integrated circuit device and manufacture thereof
KR880005129A KR0120196B1 (en) 1987-05-13 1988-05-03 Semiconductor integrated circuit device and fabrication method
US07526696 US5057894A (en) 1987-05-13 1990-05-23 Semiconductor integrated circuit device
US07964824 US5354699A (en) 1987-05-13 1992-10-22 Method of manufacturing semiconductor integrated circuit device
KR930004401A KR970003898B1 (en) 1987-05-13 1993-03-22 Method of manufacturing a semiconductor integrated circuit device
US08272312 US5512497A (en) 1987-05-13 1994-07-08 Method of manufacturing a semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS63281456A true true JPS63281456A (en) 1988-11-17

Family

ID=14678437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11608987A Pending JPS63281456A (en) 1987-05-13 1987-05-13 Semiconductor integrated circuit device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS63281456A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03145759A (en) * 1989-10-19 1991-06-20 Internatl Business Mach Corp <Ibm> Method for manufacturing semiconductor device
US5100815A (en) * 1989-12-27 1992-03-31 Oki Electric Industry Co., Ltd. Fabrication method for bimos semiconductor devices with improved speed and reliability
JPH07176639A (en) * 1993-12-17 1995-07-14 Nec Corp Semiconductor integrated circuit device and fabrication thereof
EP0746032A2 (en) 1995-05-29 1996-12-04 Matsushita Electronics Corporation Semiconductor integrated circuit comprising bipolar transistors and MOS transistors and associated fabrication method
US6001676A (en) * 1995-05-29 1999-12-14 Matsushita Electronics Corporation Semiconductor integrated circuit apparatus and associated fabrication
US6156595A (en) * 1997-10-08 2000-12-05 Sawada; Shigeki Method of fabricating a Bi-CMOS IC device including a self-alignment bipolar transistor capable of high speed operation
US6281060B1 (en) 1998-09-03 2001-08-28 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device containing a BiCMOS circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61251165A (en) * 1985-04-30 1986-11-08 Fujitsu Ltd Manufacture of bi-mis integrated circuit
JPS6265358A (en) * 1985-09-13 1987-03-24 Siemens Ag Integrated circuit and manufacturing thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61251165A (en) * 1985-04-30 1986-11-08 Fujitsu Ltd Manufacture of bi-mis integrated circuit
JPS6265358A (en) * 1985-09-13 1987-03-24 Siemens Ag Integrated circuit and manufacturing thereof

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03145759A (en) * 1989-10-19 1991-06-20 Internatl Business Mach Corp <Ibm> Method for manufacturing semiconductor device
US5100815A (en) * 1989-12-27 1992-03-31 Oki Electric Industry Co., Ltd. Fabrication method for bimos semiconductor devices with improved speed and reliability
JPH07176639A (en) * 1993-12-17 1995-07-14 Nec Corp Semiconductor integrated circuit device and fabrication thereof
EP0746032A2 (en) 1995-05-29 1996-12-04 Matsushita Electronics Corporation Semiconductor integrated circuit comprising bipolar transistors and MOS transistors and associated fabrication method
EP0746032A3 (en) * 1995-05-29 1998-09-02 Matsushita Electronics Corporation Semiconductor integrated circuit comprising bipolar transistors and MOS transistors and associated fabrication method
US6001676A (en) * 1995-05-29 1999-12-14 Matsushita Electronics Corporation Semiconductor integrated circuit apparatus and associated fabrication
US6156595A (en) * 1997-10-08 2000-12-05 Sawada; Shigeki Method of fabricating a Bi-CMOS IC device including a self-alignment bipolar transistor capable of high speed operation
US6281060B1 (en) 1998-09-03 2001-08-28 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device containing a BiCMOS circuit
US6426533B2 (en) 1998-09-03 2002-07-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and manufacturing method thereof

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