JPS63269692A - Convergence correcting device - Google Patents

Convergence correcting device

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Publication number
JPS63269692A
JPS63269692A JP10525787A JP10525787A JPS63269692A JP S63269692 A JPS63269692 A JP S63269692A JP 10525787 A JP10525787 A JP 10525787A JP 10525787 A JP10525787 A JP 10525787A JP S63269692 A JPS63269692 A JP S63269692A
Authority
JP
Japan
Prior art keywords
scanning time
correction
convergence
circuit
higher degree
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10525787A
Other languages
Japanese (ja)
Inventor
Takayuki Sugimoto
孝之 杉本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10525787A priority Critical patent/JPS63269692A/en
Publication of JPS63269692A publication Critical patent/JPS63269692A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To perform highly accurate convergence correction with a simple constitution, by calculating a two-dimensional functional equation of higher degree in the form of the product of an one-dimensional function of higher degree whose variable is horizontal scanning time and another one-dimensional function of higher degree whose variable is vertical scanning time. CONSTITUTION:Each coefficient of an one-dimensional function of higher degree whose variable is horizontal scanning time and another onedimensional function of higher degree whose variable is vertical scanning time is found from the mis-convergence quantity at each setting point and the two one-dimensional functions of higher degree whose variables are horizontal and vertical scanning times are calculated by using each coefficient thus found. Then the two functions are multiplied by each other at a multiplier circuit 17 and a two-dimensional function expressing the waveform of a convergence correcting current is obtained. Then the convergence correcting current of the waveform is made to flow to a correcting coil 21. Therefore, highly accurate convergence correction can be performed with a simple constitution and even video signals of different horizontal scanning line numbers can be coped with.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明はカラーテレビ受像機や投写形カラーテレビ受
像機等のコンバーゼンス補正装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a convergence correction device for color television receivers, projection type color television receivers, and the like.

[従来の技術] 第3図はデルタ形電子銃を有したCRTのコンバーゼン
ス補正用のコンバーゼンスヨークで、(22)はコア、
(21)はコイルであり、R,G、Bの電子ビームに対
してそれぞれ一対づつ設けられている。コンバーゼンス
を補正するためには、第4図に示す様な、水平・垂直期
間にパラボラ状の変化をした磁界を重畳した磁界を加え
る必要がある。従来、この様な磁界を作る方法として、
水平パルスおよび垂直パルスをそれぞれ積分回路で波形
成形した後、重畳するいわゆるアナログ方式のコンバー
ゼンス補正装置と、ディジタル方式のコンバーゼンス補
正装置があった。
[Prior Art] Figure 3 shows a convergence yoke for convergence correction of a CRT having a delta-type electron gun, (22) is a core,
Coils (21) are provided in pairs for each of R, G, and B electron beams. In order to correct the convergence, it is necessary to apply a magnetic field that superimposes a parabolically changing magnetic field in the horizontal and vertical periods, as shown in FIG. Conventionally, as a method of creating such a magnetic field,
There are so-called analog convergence correction devices in which horizontal pulses and vertical pulses are shaped into waveforms by an integrating circuit and then superimposed, and digital convergence correction devices.

第5図は例えば特開昭61−10386号公報に示され
た従来のコンバーゼンス装置であり、(31)はテスト
パターン発生回路、(32)はコントロールパネル、(
33)は書込みアドレス発生回路、(34)は書込みデ
ータ発生回路、(35)は読出しアドレス発生回路、(
36)はマルチプレクサ、(3,7)は書込み/読出し
制御回路、(38)はフィールドメモリ、(38)は水
平外挿回路、(40)はラインメモリ、(41)は垂直
外挿回路、(42)は垂直内挿演算回路、(43)はD
/A変換回路、(44)はローパスフィルタ(L P 
F) 、 (20)は出力回路、(21)は第3図に示
した補正コイルである。
FIG. 5 shows a conventional convergence device shown in, for example, Japanese Patent Laid-Open No. 61-10386, in which (31) is a test pattern generation circuit, (32) is a control panel, (31) is a test pattern generation circuit, (32) is a control panel, (
33) is a write address generation circuit, (34) is a write data generation circuit, (35) is a read address generation circuit, (
(36) is a multiplexer, (3,7) is a write/read control circuit, (38) is a field memory, (38) is a horizontal extrapolation circuit, (40) is a line memory, (41) is a vertical extrapolation circuit, ( 42) is a vertical interpolation calculation circuit, (43) is D
/A conversion circuit, (44) is a low-pass filter (LP
F), (20) is an output circuit, and (21) is a correction coil shown in FIG.

このディジタル方式のコンバーゼンス補正装置は、例え
ば第6図に示す様に、カラー陰極線管の表示面(50)
上に設定した5X5=25点の設定点P1〜P25にお
けるミスコンバーゼンス量を、第5図のコントロールパ
ネル(32)のキーボードにて、各々調整し、それ等の
補正データをフィールドメモリ(38)に記憶させ、表
示面(50)上の走査に応じてフィールドメモリ(38
)から補正データを読出し、設定点P1〜F25以外の
部分の補正量は、縦方向(垂直方向)は垂直内挿演算回
路(42)で相隣る縦方向の補正データから走査線ごと
に補正値を計算して補間し、横方向(水平方向)はD/
A変換回路(43)でアナログ波形に変換した後、L 
P F (44)で補間することで第4図に示す磁界と
同じ波形の補正電流を補正コイル(21)に流すことに
よって、補正磁界を得ていた。
This digital convergence correction device, for example, as shown in FIG.
Adjust the amount of misconvergence at the 5X5=25 set points P1 to P25 set above using the keyboard of the control panel (32) in Fig. 5, and store the correction data in the field memory (38). The field memory (38) is stored in response to scanning on the display surface (50).
), and the correction amount for the parts other than the set points P1 to F25 is corrected for each scanning line from the correction data in the vertical direction in the vertical direction (vertical direction) using the vertical interpolation calculation circuit (42). Calculate and interpolate the value, and the horizontal direction is D/
After converting to an analog waveform in the A conversion circuit (43), the L
A correction magnetic field was obtained by interpolating with P F (44) and passing a correction current having the same waveform as the magnetic field shown in FIG. 4 through the correction coil (21).

[発明が解決しようとする問題点] 従来のコンバーゼンス補正装置は、前述のように、アナ
ログ方式では、比較的簡単な回路で補正できるが、補正
精度が低い問題点があり、ディジタル方式では補正精度
は高いが、回路構成が複雑なうえ、縦方向の調整点間は
相隣る縦方向の補正データから走査線毎に補正値を計算
して補間している為、水平走査線数が異なる映像信号を
受信した時は、補正できないという問題点があった。
[Problems to be Solved by the Invention] As mentioned above, in the conventional convergence correction device, the analog system can perform correction using a relatively simple circuit, but there is a problem in that the correction accuracy is low, and the digital system has the problem that the correction accuracy is low. However, the circuit configuration is complicated, and between vertical adjustment points, correction values are calculated and interpolated for each scanning line from adjacent vertical correction data, so images with different numbers of horizontal scanning lines are There was a problem in that it could not be corrected when the signal was received.

この発明は上記のような問題点を解消するためにされた
もので、比較的簡単な構成で補正精度も高く、水平走査
線数が異なる映像信号にも、対応できるコンバーゼンス
補正装置を得ることを目的としている。
This invention was made to solve the above-mentioned problems, and aims to provide a convergence correction device that has a relatively simple configuration, has high correction accuracy, and can handle video signals with different numbers of horizontal scanning lines. The purpose is

[問題点を解決するための手段] この発明に係るコンバーゼンス補正装置は、ミスコンバ
ーゼンスを補正するために補正コイルに通電する補正電
流波形を表わす水平走査時間および垂直走査時間を変数
とする二元高次関数を、水平走査時間を変数とする一元
高次関数と、垂直走査時間を変数とする一元高次関数と
の積の形で演算して求める構成としたことを特徴とする
[Means for Solving the Problems] The convergence correction device according to the present invention uses a binary height that uses a horizontal scanning time and a vertical scanning time as variables to represent a correction current waveform that is applied to a correction coil in order to correct misconvergence. The present invention is characterized in that the next function is obtained by calculating the product of a one-dimensional higher-order function with the horizontal scanning time as a variable and a one-dimensional higher-order function with the vertical scanning time as a variable.

[作用] この発明においては、各設定点におけるミスコンバーゼ
ンス量から水平走査時間を変数とする一元高次関数およ
び垂直走査時間を変数とする一元高次関数の各係数を求
め、これらの各係数を用いて水平、垂直走査時間を変数
とする2つの一元高次関数を算出し、ついてこれら2つ
の一元高次関数を乗算してコンバーゼンス補正電流波形
を表わす二元高次関数を得、補正コイルにこの波形のコ
ンバーゼンス補正電流を通電する。
[Operation] In this invention, each coefficient of a one-dimensional high-order function with the horizontal scanning time as a variable and a one-dimensional high-order function with the vertical scanning time as a variable is determined from the amount of misconvergence at each set point, and each of these coefficients is calculated. Then, these two one-dimensional high-order functions are multiplied to obtain a two-dimensional high-order function representing the convergence correction current waveform, which is then applied to the correction coil. A convergence correction current of this waveform is applied.

[発明の実施例] 以下、この発明の一実施例を図について説明する。第1
図は、第2図に示すように設定した設定点P+−’P9
のコンバーゼンス補正量a1〜a9から、下記(1)式
に示す二元2次関数式で表わされる近似補正波形を求め
る場合のコンバーゼンス補正装置である。
[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 1st
The figure shows the set point P+-'P9 set as shown in Figure 2.
This is a convergence correction device for obtaining an approximate correction waveform expressed by a two-dimensional quadratic function equation shown in equation (1) below from the convergence correction amounts a1 to a9.

f(th、tv)=(α1+α2th+α3th2)(
β1+β2tマ+β3tv”)    ・・・(1)た
だし、th:各設定点P1〜P9を電子ビームが通る水
平走査時間 tv:各設定点P1〜P9を電子ビームが通る垂直走査
時間 二元2次関数波形の全ての波形を表わすためには、下記
(2)式が必要であるが、一般的なコンバーゼンスを補
正するには、上記(1)式で表わされる補正波形で十分
である。
f(th, tv)=(α1+α2th+α3th2)(
β1+β2tma+β3tv”) ... (1) Where, th: Horizontal scanning time during which the electron beam passes through each set point P1 to P9 tv: Vertical scanning time during which the electron beam passes through each set point P1 to P9 Two-dimensional quadratic function In order to represent all waveforms, the following equation (2) is required, but to correct general convergence, the correction waveform represented by the above equation (1) is sufficient.

f(th、tv)=(k++に2・th+に3・th2
)+(k4+に5・th+に6 ・th2 )tv+(
k7+ke・th+kg4b2)・tv2     ・
・−(2)(2)式の係数に1〜に9は後述する演算に
よって求めることができ、(1)式の係数α1〜α3お
よびβ1〜β3は係数に1〜に9から、次のようにして
求めることができる。
f (th, tv) = (k++ to 2・th+ to 3・th2
)+(k4+5・th+6・th2)tv+(
k7+ke・th+kg4b2)・tv2・
・-(2) The coefficients 1 to 9 in equation (2) can be obtained by the calculations described later, and the coefficients α1 to α3 and β1 to β3 in equation (1) can be calculated from the coefficients 1 to 9, as follows. You can find it like this.

(1)式を変形し、(3)式とする。Equation (1) is transformed into equation (3).

f(th、tv)=(al α1+β1 α2・th+
 β1 α3・Th2)+(β2 α1+β2 α2・
th+ β2 α3−Th2)・tv +(β3 α1+β3 α2・th+ β3 α3・T
h2)°tv2                  
・・・(3)(2)式が(1)式の形に因数分解できる
為には、(2)式と(3)式の各項が等しくなければな
らない。また設定点P 1(th=0.tマー0)点の
ミスコンバーゼンス量a1は一般に零でない。即ちkl
 =a1 =α1β1≠0であり、α1 =1.β1=
に1 として、α2.α3.β2.β3を求めると、f
(th、tv)=(1+に2/に+−th+に3/に+
・Th2 )(kl +に4−tv+に7・Tv2 )
    ・・・(4)また、αI 二kl、β1=1と
して、α2 。
f(th, tv)=(al α1+β1 α2・th+
β1 α3・Th2)+(β2 α1+β2 α2・
th+ β2 α3-Th2)・tv +(β3 α1+β3 α2・th+ β3 α3・T
h2) °tv2
(3) In order for equation (2) to be factorized into equation (1), each term in equation (2) and equation (3) must be equal. Further, the misconvergence amount a1 at the set point P1 (th=0.tmer0) is generally not zero. That is, kl
=a1 =α1β1≠0, and α1 =1. β1=
1, α2. α3. β2. When determining β3, f
(th, tv) = (1+ to 2/+-th+ to 3/+
・Th2) (4 to kl+-7・Tv2 to tv+)
...(4) Also, assuming αI 2kl and β1=1, α2.

べ3.β2 、β3を求めると f(th、tv)=(kl +に2 th+に3・Th
2 )(1+に4/に+ tマ十に? /kl・tv2
)   ・・・(5)となる。即ち、(4)式、(5)
式は、(2)式の近似式となる。
b3. To find β2 and β3, f(th, tv) = (kl + 2 th+ 3・Th
2) (1+ to 4/to + t maju to? /kl・tv2
)...(5). That is, equation (4), (5)
The equation is an approximation of equation (2).

(4)式と(5)式とは、同じ式であるので以下(4)
式で表わす場合について説明する。
Since equations (4) and (5) are the same equation, the following equation (4)
The case where it is expressed by a formula will be explained.

図において、(1)は各設定点P1〜P9のコンバーゼ
ンス補正量a1〜a9から、(2)式の係数kl −に
9 を演算にて求め、更にに2/に、。
In the figure, (1) calculates 9 to the coefficient kl - of equation (2) from the convergence correction amounts a1 to a9 of each set point P1 to P9, and then calculates 9 to 2/.

k:+/に+ を演算する演算回路で、この演算回路(
1)はコンバーゼンス補正装置内に含めても、外部の演
算回路を利用してもよい。(2)は数値lおよび前記算
出した係数の内、k2/に1 。
k: An arithmetic circuit that calculates + for +/; this arithmetic circuit (
1) may be included in the convergence correction device or may utilize an external arithmetic circuit. (2) is 1 for k2/ out of the numerical value l and the coefficient calculated above.

k3/に+  + kx  + β4 * klを記憶
するデイジタルメそり、(3)はディジタルメモリ(2
)の出力をアナログ値に変換するD/A変換器、(4)
k3/ is a digital memory that stores + + kx + β4 * kl, (3) is a digital memory (2
D/A converter that converts the output of ) into an analog value, (4)
.

(5)  、 (8)  、 (7)は差動増幅回路で
、前記係数を水平、垂直の鋸歯状波およびパラボラ波に
乗算する為のものである。(10)は水平鋸歯状波発生
回路、(11)は垂直鋸歯状波発生回路、(12) 、
 (13)は加算回路、(15) 、 (lfl) 、
 (17)は乗算回路、(20)は出力回路で、水平、
垂直鋸歯状波発生回路(10) 。
(5), (8), and (7) are differential amplifier circuits for multiplying the horizontal and vertical sawtooth waves and parabolic waves by the coefficients. (10) is a horizontal sawtooth wave generation circuit, (11) is a vertical sawtooth wave generation circuit, (12),
(13) is an adder circuit, (15) , (lfl),
(17) is a multiplication circuit, (20) is an output circuit, horizontal,
Vertical sawtooth wave generation circuit (10).

(11)、加算回路(12) 、 (13)および乗算
回路(15) 。
(11), addition circuits (12), (13), and multiplication circuits (15).

(1e) 、 (17)で関数発生回路(60)を構成
しており、この関数発生回路(80)は1例えばデルタ
形CRTの場合は、R,G、B、BL81回路、合計4
回路が必要である。
(1e) and (17) constitute a function generation circuit (60), and this function generation circuit (80) has 1 circuit, for example, in the case of a delta type CRT, 81 R, G, B, and BL circuits, a total of 4 circuits.
circuit is required.

上記構成中、メモリ(2)はディジタルメモリに限られ
るものではなく、例えば各係数に相当する電圧を与える
可変抵抗器でもよい。
In the above configuration, the memory (2) is not limited to a digital memory, but may be a variable resistor that provides a voltage corresponding to each coefficient, for example.

つぎに、この実施例の動作を説明する。Next, the operation of this embodiment will be explained.

第2図において、補正量がalである設定点P1をCR
Tの電子ビームが通る時間をth=0、tv=o 、補
正量がβ5である設定点P5を通る時間をth= Th
/2 、 tv= Tv/2、補正量がβ9である設定
点P9を通る時間をth= TT 、 tv= Tvと
すると、(2)式より、 f (0、O) =a1 f (Th/ 2 、 O) = azf (Th、 
0) = β3 f (0、Tv/ 2) = a4 f (Th/ 2 、 Tv/ 2) = asf (
Th、 ’rv/ 2) = a6f (0、Tv) 
=a7 f (Th/ 2 、 Tv) = aaf  (Th
、Tv)= ag の9つの式が成立する。演算回路(1)は、これらの式
より、下式により係数に1〜に4 、およびに7を演算
し、さらに、k 2 / k t  * k 3 / 
k t を算出する。
In FIG. 2, CR
The time taken by the electron beam of T to pass through is th=0, tv=o, and the time taken to pass through set point P5 where the correction amount is β5 is th=Th.
/2, tv=Tv/2, and the time to pass through the set point P9 where the correction amount is β9 is th=TT, tv=Tv. From equation (2), f (0, O) = a1 f (Th/ 2, O) = azf (Th,
0) = β3 f (0, Tv/2) = a4 f (Th/2, Tv/2) = asf (
Th, 'rv/2) = a6f (0, Tv)
= a7 f (Th/2, Tv) = aaf (Th
, Tv)=ag hold true. Based on these equations, the calculation circuit (1) calculates coefficients 1 to 4 and 7 using the following equations, and further calculates k 2 / k t * k 3 /
Calculate k t .

k1=a1 −2aB +ag ) ディジタルメモリ(2)は数値1および演算回路(1)
が算出した係数に2/に+  + k3/に+  + 
kl  +に4.に7をディジタルデータとして記憶す
る。
k1=a1 -2aB +ag) Digital memory (2) contains numerical value 1 and arithmetic circuit (1)
To the coefficient calculated by 2/ + + k3/ + +
4 to kl +. 7 is stored as digital data.

これ等のデータは、CRT等の表示装置の電源が入ると
同時に読出され、動作時は常に同じデータが読出されて
いる。これ等のデータはD/A変換器(3)でアナログ
電圧に変換される。他方、水平パルスHを入力とする水
平鋸歯状波発生回路(10)より得たthの1次関数波
形と、係数に2/kl とを差動増幅器(4)に入力し
に2/に1・thを得る。また、水平鋸歯状波発生回路
(10)の出力を乗算回路(15)に入力し、thの2
次曲線波形(パラボラ波形) th2 を得る。この2
次曲銀波形th2 と、係数に3/に+  とを差動増
幅回路(6)に入力しに3/に1・th2の出力を得る
。さらに数値lと差動増幅器(4)の出力に2/に1・
thと、差動増幅器(5)の出力に:+/に+・th2
 とを加算回路(12)によって加算することによって
、出力(1+ k2/に+−th+に31k1・th2
)を得る。また、同様に、垂直パルスVを入力とする垂
直鋸歯状波発生回路(11)の出力tvと、係数に4と
を差動増幅回路(5)に入力してに4・tvを得、乗算
回路(16)より得た2次曲銀波形tv2 と係数に7
とを差動増幅回路(7)に入力してに7・tv2を得、
係数klと、k4・tvと、k7・tv2  とを加算
回路(13)にて加算して(IH+に+ tv+に7t
v2 )を得る。また、出力(1+に2/に1・tk”
k3 /krth2 )と、出力(k+ +に4tv+
1k7tv2)とを乗算回路(17)にて乗算すること
によって、前記(4)式に示す (1+に2/に1・th+に3/krth2) X(k
1+’に+・tvCk7tv2)の二元2次関数波形f
 (th、tv)を得る。
These data are read out as soon as the display device, such as a CRT, is powered on, and the same data is always read out during operation. These data are converted into analog voltages by a D/A converter (3). On the other hand, the linear function waveform of th obtained from the horizontal sawtooth wave generation circuit (10) inputting the horizontal pulse H and the coefficient 2/kl are input to the differential amplifier (4), and 2/kl is input to the differential amplifier (4).・Obtain th. In addition, the output of the horizontal sawtooth wave generation circuit (10) is input to the multiplication circuit (15), and
Obtain the following curved waveform (parabolic waveform) th2. This 2
The next silver waveform th2 and the coefficient 3/+ are input to the differential amplifier circuit (6) to obtain an output of 3/1·th2. Furthermore, the numerical value l and the output of the differential amplifier (4) are 2/1.
th and the output of the differential amplifier (5): +/to +・th2
By adding these in the adder circuit (12), the output (1+k2/+-th+ is 31k1・th2).
). Similarly, the output tv of the vertical sawtooth wave generation circuit (11), which inputs the vertical pulse V, and the coefficient 4 are input to the differential amplifier circuit (5) to obtain 4·tv, and multiplication is performed. The quadratic silver waveform tv2 obtained from circuit (16) and the coefficient 7
is input to the differential amplifier circuit (7) to obtain 7・tv2,
The coefficient kl, k4・tv, and k7・tv2 are added in the adder circuit (13) (7t for IH+ + tv+)
v2) is obtained. In addition, the output (1+ to 2/1・tk"
k3 /krth2) and output (4tv+ to k+
1k7tv2) in the multiplier circuit (17), (1+ to 2/th+3/krth2) X(k
1+' to +・tvCk7tv2) two-dimensional quadratic function waveform f
(th, tv) is obtained.

出力回路(20)は、補正コイル(21)にこの二元2
次関数で表わされるコンバーゼンス補正電流波形を流す
ための回路である。
The output circuit (20) outputs this binary signal to the correction coil (21).
This is a circuit for flowing a convergence correction current waveform expressed by the following function.

なお、上記実施例では第2図に示した9ケ所の設定点P
1〜P9の補正量から(4)式の二元2次関数式で表わ
される近似補正波形を求める場合について説明したが、
更に多数点での補正量から、例えば水平方向にm点、垂
直方向にn点、合計量Xn点の補正量から、下記(6)
式の係数kll〜kmnを求め、 f(th、tv)=(k41+に2 lth+に31t
h2 +・” +に+Hthll−1)+(k12 +
に22 th+に32 th2+−+km2 thll
−’ ) ・tv+(k+3+に23th+に33th
2+・・・+km3thl−1)・tv2+(k+n+
に2n−th+に3nth2+ −+kmnth’l−
1)−jyn−1・・・(6) (8)式の近似式が下記(7)式で表わされる様にf(
th、tv)=(cx l+a 2 th+α3 th
2+ −a mth’−1)(β 1+β2tマ+β3
 tv2+ ・・・ 十βntvni)・・・(7) 係数α1〜αm、β1〜βnを、係数kll〜kmnで
表すことによって、前記実施例より精度の高い補正を行
うことが可能である。
In addition, in the above embodiment, the nine set points P shown in FIG.
The case where the approximate correction waveform expressed by the two-dimensional quadratic function equation of equation (4) is obtained from the correction amounts of 1 to P9 has been explained.
Furthermore, from the amount of correction at multiple points, for example, the amount of correction at m points in the horizontal direction and n points in the vertical direction, the total amount of Xn points, the following (6)
Find the coefficients kll~kmn of the equation, f (th, tv) = (2 for k41+ 31t for lth+
h2 +・” + + Hthll-1) + (k12 +
to 22 th+ to 32 th2+-+km2 thll
-' ) ・tv+(k+3+ to 23th+ to 33th
2+...+km3thl-1)・tv2+(k+n+
to 2n-th+ to 3nth2+ −+kmnth'l−
1)-jyn-1...(6) As the approximate expression of equation (8) is expressed by equation (7) below, f(
th, tv) = (cx l+a 2 th+α3 th
2+ -a mth'-1) (β 1+β2tma+β3
tv2+...10βntvni)...(7) By expressing the coefficients α1 to αm and β1 to βn as coefficients kll to kmn, it is possible to perform correction with higher precision than in the embodiments described above.

なお、上記(8)  、 (7)式を比較すればわかる
ように、設定点がmXnの場合でも、この発明によれば
、それぞれ(m + n )個のメモリ、およびD/A
変換回路、(m+n−2)個の差動増幅回路、1ケの乗
算回路しか必要としないので、構成が簡単になる。(但
し、th−th”−+  1 tマ〜tvn−1の水平
・垂直の高次の基本波形を発生される回路に関しては、
全く同じである。)また第1図の実施例では(4)式 %式%) の場合について説明したが、(4)式はまた次の形にも
変形できる。すなわち f(th、tv)=  (k++に2th+に3th2
)(k++に4tv+:に7tv2)となり、メモリお
よびD/A変挽変格回路れぞれ5個でよく、17に1の
係数は、出力回路(20)の利得にて調整することによ
って、第1図の実施例と同じ補正波形が得られる。
As can be seen by comparing equations (8) and (7) above, even when the set point is mXn, according to the present invention, each of (m + n) memories and D/A
Since only a conversion circuit, (m+n-2) differential amplifier circuits, and one multiplication circuit are required, the configuration is simplified. (However, regarding the circuit that generates the horizontal and vertical high-order fundamental waveforms of th-th"-+1 tma to tvn-1,
It's exactly the same. ) Also, in the embodiment shown in FIG. 1, the case of formula (4) is explained, but formula (4) can also be transformed into the following form. That is, f(th, tv) = (k++ to 2th+ to 3th2
) (4tv+ for k++: 7tv2 for), and 5 memories and D/A transformation circuits are required each. The coefficient of 1 in 17 can be adjusted by adjusting the gain of the output circuit (20). The same corrected waveform as in the embodiment shown in FIG. 1 can be obtained.

[発明の効果] 以上のように、この発明は、ミスコンバーゼンスを補正
するために補正コイルに通電する水平走査時間と垂直走
査時間とを変数とする二元高次関数で表わされる電流波
形を、水平走査時間を変数とする一元高次関数と、垂直
走査時間を変数とする一元高次関数との積の形で算出す
るように構成したので、構成が簡単で、比較的精度の高
い補正ができるコンバーゼンス補正装置が得られる効果
がある。
[Effects of the Invention] As described above, the present invention has a current waveform expressed by a two-dimensional high-order function whose variables are the horizontal scanning time and the vertical scanning time for energizing the correction coil in order to correct misconvergence. Since the configuration is configured to calculate in the form of the product of a one-dimensional high-order function with the horizontal scanning time as a variable and a one-dimensional high-dimensional function with the vertical scanning time as a variable, the configuration is simple and relatively accurate correction can be performed. This has the effect of providing a convergence correction device that can be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例によるコンバーゼンス補正
装置の構成を示すブロック回路図、第2図はこの実施例
においてカラー陰極線管の表示面上に設定した設定点の
配置を示す図、第3図はコンバーゼンスヨークの正面図
、第4図はコンバーゼンスヨークで発生させる補正磁界
の波形図、第5図は従来のディジタル方式のコンバーゼ
ンス補正装置の構成を示すブロック回路図、第6図はこ
の従来における調整点の配置例を示す正面図である。 (1)・・・演算回路、(2)・・・ディジタルメモリ
、(3)・・・D/A変換回路、(4)  、 (5)
  、 (6)  。 (7)・・・差動増幅回路、(10)・・・水平鋸歯状
波発生回路、(11)・・・垂直鋸歯状波発生回路、(
12) 、 (13)・・・加算回路、(15) 、 
(1B) 、 (17)・・・乗算回路、(20)・・
・出力回路、(60)・・・関数発生回路。 なお、各図中、同一符号は同一または相当部分を示す。
FIG. 1 is a block circuit diagram showing the configuration of a convergence correction device according to an embodiment of the present invention, FIG. 2 is a diagram showing the arrangement of setting points set on the display surface of a color cathode ray tube in this embodiment, and FIG. Figure 4 is a front view of the convergence yoke, Figure 4 is a waveform diagram of the correction magnetic field generated by the convergence yoke, Figure 5 is a block circuit diagram showing the configuration of a conventional digital convergence correction device, and Figure 6 is the conventional digital convergence correction device. FIG. 3 is a front view showing an example of arrangement of adjustment points. (1)...Arithmetic circuit, (2)...Digital memory, (3)...D/A conversion circuit, (4), (5)
, (6). (7)...Differential amplifier circuit, (10)...Horizontal sawtooth wave generation circuit, (11)...Vertical sawtooth wave generation circuit, (
12), (13)...addition circuit, (15),
(1B), (17)...multiplication circuit, (20)...
- Output circuit, (60)...Function generation circuit. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] (1)カラー陰極線管の表示面に設定した複数の設定点
におけるミスコンバーゼンスを補正するのに必要な補正
電流波形を電子ビームが上記各設定点を通る水平走査時
間および垂直走査時間を変数とする二元高次関数の近似
式の各項の係数を当該各設定点のミスコンバーゼンス量
から演算して算出し、当該近似式の波形をもつ補正電流
を補正コイルに通電してミスコンバーゼンスを補正する
コンバーゼンス補正装置において、上記二元高次関数式
を水平走査時間を変数とする一元高次関数と垂直走査時
間を変数とする一元高次関数との積の形で算出する手段
を備えたことを特徴とするコンバーゼンス補正装置。
(1) The correction current waveform necessary to correct misconvergence at multiple set points set on the display surface of a color cathode ray tube is determined by the horizontal scanning time and vertical scanning time during which the electron beam passes through each of the above set points as variables. Calculate the coefficient of each term of the approximation formula of the two-dimensional high-order function from the amount of misconvergence at each set point, and correct the misconvergence by applying a correction current having a waveform of the approximation formula to the correction coil. The convergence correction device includes means for calculating the two-dimensional high-order function equation in the form of a product of a one-dimensional high-order function with the horizontal scanning time as a variable and a one-dimensional high-order function with the vertical scanning time as a variable. Features a convergence correction device.
JP10525787A 1987-04-27 1987-04-27 Convergence correcting device Pending JPS63269692A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10525787A JPS63269692A (en) 1987-04-27 1987-04-27 Convergence correcting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10525787A JPS63269692A (en) 1987-04-27 1987-04-27 Convergence correcting device

Publications (1)

Publication Number Publication Date
JPS63269692A true JPS63269692A (en) 1988-11-07

Family

ID=14402598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10525787A Pending JPS63269692A (en) 1987-04-27 1987-04-27 Convergence correcting device

Country Status (1)

Country Link
JP (1) JPS63269692A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002165228A (en) * 2000-11-28 2002-06-07 Nec Microcomputer Technology Ltd Convergence-waveform correction apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002165228A (en) * 2000-11-28 2002-06-07 Nec Microcomputer Technology Ltd Convergence-waveform correction apparatus

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