JPS6326144U - - Google Patents
Info
- Publication number
- JPS6326144U JPS6326144U JP11781686U JP11781686U JPS6326144U JP S6326144 U JPS6326144 U JP S6326144U JP 11781686 U JP11781686 U JP 11781686U JP 11781686 U JP11781686 U JP 11781686U JP S6326144 U JPS6326144 U JP S6326144U
- Authority
- JP
- Japan
- Prior art keywords
- band
- switching element
- tuner
- receiving
- input filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Filters And Equalizers (AREA)
- Noise Elimination (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
第１図は本考案の一実施例が適用される回路ブ
ロツク図、第２図は本考案の一実施例になる入力
フイルタ回路を含む第１図の回路ブロツク図の具
体的回路図、第３図は本考案になる入力フイルタ
の特性図、第４図は従来例の入力フイルタの回路
図、第５図は第４図のフイルタ回路の特性図を夫
々示す。
３１…入力フイルタ回路、Ｃ３９〜Ｃ４３，Ｃ４
５〜Ｃ５０…コンデンサ、Ｌ３０〜Ｌ３４…コイ
ル、Ｄ１８…スイツチング用ダイオード。
FIG. 1 is a circuit block diagram to which an embodiment of the present invention is applied, FIG. 2 is a specific circuit diagram of the circuit block diagram of FIG. 1 including an input filter circuit, which is an embodiment of the present invention. 4 shows a characteristic diagram of the input filter according to the present invention, FIG. 4 shows a circuit diagram of a conventional input filter, and FIG. 5 shows a characteristic diagram of the filter circuit of FIG. 4. 31...Input filter circuit, C39 to C43 , C4
5 to C50 ...Capacitor, L30 to L34 ...Coil, D18 ...Switching diode.
Claims (1)
受信するチユーナの入力フイルタ回路において、
ローパスフイルタのコールド側に接続された切換
素子と、該切換素子に並列接続されたトラツプ回
路とからなり、該第１の帯域受信時には該切換素
子を閉成状態とし、該第２の帯域受信時には該切
換素子を開成状態とする様にした事を特徴とする
チユーナの入力フイルタ回路。[Claims for Utility Model Registration] In an input filter circuit of a tuner that receives a first band and a second band having a higher frequency than the first band,
It consists of a switching element connected to the cold side of the low-pass filter and a trap circuit connected in parallel to the switching element, and the switching element is closed when receiving the first band, and when receiving the second band. An input filter circuit for a tuner, characterized in that the switching element is in an open state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11781686U JPS6326144U (en) | 1986-07-31 | 1986-07-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11781686U JPS6326144U (en) | 1986-07-31 | 1986-07-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6326144U true JPS6326144U (en) | 1988-02-20 |
Family
ID=31003686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11781686U Pending JPS6326144U (en) | 1986-07-31 | 1986-07-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6326144U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03103082U (en) * | 1990-02-09 | 1991-10-25 |
-
1986
- 1986-07-31 JP JP11781686U patent/JPS6326144U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03103082U (en) * | 1990-02-09 | 1991-10-25 |
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