JPS63250209A - Octave multiple filter - Google Patents

Abstract

PURPOSE:To designate a characteristic at a logarithmic interval over a wide band area by providing a control part to control the amplitude constant of respective amplitude control circuits and a phase control circuit and a delay time in accordance with the output signals of respective digital filters. CONSTITUTION:The digital filters HP1-HP5 group of high-pass characteristics to act with the sampling time interval as a clock is serially connected respectively and respective output signals are added and removed through an amplitude control circuit and a phase control circuit. Out of respective filters HP1-HP5, the delay time per one step of the unit delay element of a maximum number filter is set to the sampling time interval or above, each time one filter number is subtracted, the delay time per one unit delay element step comes to be AB(A>1, B>0) times and in accordance with the output signals of the respective filters HP1-HP5, the delay times of the amplitudes of respective amplitude control circuits COE1-COE5 and the phases of phase control circuits DEL 1-DEL5 are controlled. Thus, at a logarithmically uniform interval over a wide band area in a frequency area, the characteristic can be designated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an octave multiplex filter that is formed by combining a group of digital filters with a plurality of bypass characteristics.

[Summary of the Invention] The filter outputs of each of the series-connected digital filters having bypass characteristics are added and taken out via an amplitude phase control circuit and a phase control circuit, and each of the above-mentioned amplitude controls The octave multiple filter is configured so that the delay time of the circuit amplitude and phase control circuit is adaptively controlled according to each input, and characteristics can be specified at almost logarithmically uniform intervals over a wide band in one frequency domain. It looks like this.

[Prior art] Conventional digital filters operate at a predetermined clock frequency in order to process discrete sample values at equal time intervals, so characteristics in the frequency domain are specified at equal frequency intervals. I was worried.

For this reason, conventional filters that specify characteristics at logarithmic intervals over a wide band have only been realized by combining a plurality of analog filters.

[Problems to be solved by the invention: As mentioned above, the former digital filter uses a method of specifying characteristics at equal frequency intervals, so the resolution in the low range is too coarse, while the resolution in the high range is too fine than necessary. , it is extremely difficult to achieve broadband.

Generally, the characteristics of audio equipment are evaluated or specified in the frequency domain using logarithmic intervals. Therefore, when using conventional digital filters, such as FIR type (finite impulse response) filters, the characteristics are accurate in the low frequency range for the reasons mentioned above. could not be specified, and in the high range, the characteristics had to be specified with higher precision than necessary, which was extremely inefficient in terms of circuit implementation.

In particular, when attempting to realize something with complex frequency characteristics such as a graphic equalizer using a conventional FIR type filter, such restrictions can be avoided; in fact, a graphic equalizer using an FIR type filter has not yet been put to practical use. .

On the other hand, since the latter filter uses an addition or multiplication method of analog active filters, there is interference between the filters, and it is difficult to specify the phase and amplitude independently. In particular, it has been extremely difficult to specify the phase characteristics arbitrarily.

The purpose of the present invention is to solve the problems of the prior art, and in particular to provide an octave multiplex filter in which characteristics can be specified at logarithmically uniform intervals over a wide band in the frequency domain by using a digital filter with one type of bypass characteristic. is to provide.

[Means for Solving the Problems] In order to achieve the above object, the octave multiplex filter of the present invention is provided with a group of digital filters with bypass characteristics that operate with the sampling time interval of the input signal as a clock. , the digital filter groups are connected in series, and their respective output signals are added and taken out via an amplitude control circuit and a phase control circuit, and the numbers assigned to each filter in each filter group are Among them, the delay time per stage of the unit delay element of the digital filter with the largest number is set to be greater than or equal to the sampling time interval of the input signal, and each time the filter number decreases by one in each filter group, the delay time per stage of the unit delay element of the digital filter is Delay time per stage AB
(A>1.B>O), and is characterized by comprising a control section that controls the amplitude of each amplitude control circuit and the delay time of the phase control circuit according to the output signal of the digital filter of each bypass characteristic. [Function] In the octave multiplex filter of the present invention having the above-described configuration, the output signals of each digital filter with a bypass characteristic are connected in series and pass through each filter, thereby sequentially narrowing the band and increasing the output signal of each digital filter. The signals are given to an amplitude control circuit and a phase control circuit, and the amplitude coefficient and phase of each signal are adaptively controlled.

[Embodiments of the Invention] The present invention will be described below with reference to embodiments shown in the drawings.
FIG. 1 shows an embodiment of an octave multiple filter (5 octaves) according to the present invention. In the figure, IN is an input terminal and OUT is an output terminal.

A/D is an A-D converter, D/A is a D-A converter, LPF
is a normal analog type low-pass filter, HP1~
HP5 is a digital filter with bypass characteristics using, for example, an FIR type filter, SUB is a subtraction circuit,
ADD is an adder circuit, DELL-DEL5 are phase control circuits, coE1-c○E5 are amplitude coefficient units, and C0NT is an adaptive control circuit.

The adaptive control circuit C0NT is configured as shown in FIG. 2, for example. In the figure, DET is a band component detector, and MPU is a microprocessor.

The FIR type filter consists of a delay element SR, a coefficient multiplier ML, and an adder AD, as shown in FIG. The coefficients a-, .about.a6 of the coefficient multiplier ML are set so that

Figure 4 (a) shows the desired frequency characteristics (low-pass characteristics)
, and FIG. 3(b) shows a time-domain function obtained by inverse Fourier transform.

Digital filter groups HPI to HP5 having such a bypass characteristic are connected in series, and the output of each filter is subtracted from the center tap of the filter by a subtraction circuit SUB. In addition, each output of each filter is connected to a phase control circuit DE.
They are added and taken out by an adder circuit ADD via LL to DEL5 and amplitude coefficient units C0EI to C0E5, and are provided to an adaptive control circuit C0NT. The amplitude coefficient constants of ~C0E5 and the delay times of the phase control circuits DELL~DEL5 are adaptively controlled.

In each digital filter group, among the numbers assigned to each filter in the order of connection, the delay time rJJ n T per unit delay element stage of the digital filter HP5 with the largest number is set to be less than or equal to the sampling time interval T of the input signal. And each time the number of each filter decreases by one, the delay time per stage of unit delay element of the filter becomes AB (A>1.B>O) times.

Furthermore, the adaptive control circuit C0NT detects the band components of the outputs of the digital filters HPI to HP5 with bypass characteristics using the detector DET, so that the microprocessor MPU controls the amplitude control circuits C0E1 to C0E5 according to the components in each band. amplitude coefficient and phase control circuit D
The phases of ELL to DEL5 are calculated, and according to the calculation results, control signals are sent to each of the amplitude coefficient multipliers and phase control circuits to control each of them.

Note that the amplitude control circuit is composed of, for example, a delay element SR, a RAM, and a coefficient calculator MUL as shown in FIG.
Each amplitude coefficient table is set in the RAM, and the amplitude is changed by taking out a coefficient from this RAM in accordance with the control signal and multiplying it by each output of HPI to HP5 in a multiplier MUL. The phase control circuit is composed of a RAM, for example, as shown in FIG. 6, and changes the phase by changing the reading position of the RAM in accordance with the control signal. In this embodiment, as described above, each amplitude coefficient and phase are changed according to the outputs of HPI to HP5, and the outputs of each amplitude coefficient unit and phase control circuit are changed.
In the case of 1st generation shown in Fig. 1, the system is stable because it is complete feed-forward control.

Now, in the octave multiple filter configured as described above, the input signal applied to the input terminal IN is sent to the A-D converter A.
/D performs A-D conversion at a sampling frequency f, (sampling rate 1/f o 5ec), and is added to the digital filter HP5 having the highest number of bypass characteristics. This filter, for example UPI, has a delay time of 1/f02-4 seconds for each stage of delay elements that constitute it. Usually, a digital filter with this configuration is used with a clock frequency f02-')lz, and a sampling frequency of the input signal is also used as f,2-'I(z.However, in the digital filter described above, the clock frequency and the sampling frequency are different. Therefore, the desired processing cannot be performed as is.For this reason, first, as described above, the unit delay time is set to 1/f, 2-'see, and the FI
Determine the coefficients of the R-type filter, then set the clock frequency to f, Hz for an input signal with an actual sampling interval of 1/f, sec, and leave the coefficients unchanged for the delay time per stage of the unit delay element n T = 1/fo
2-'see. The digital filters of other stages are set in the same manner.

The characteristics of each digital filter HPI to HP5 are shown in Figure 7 (
As shown in a) to (h), the band is successively narrowed by subtracting the output of each filter from the value of the center tap of the filter by the subtraction circuit SUB. As a final output, the desired output as shown in FIG. 7(h) is obtained.

[Effects of the Invention] As is clear from the above explanation, according to the present invention, by using the above-described configuration, logarithmically uniform intervals can be achieved in the frequency domain (on the frequency axis) using one type of bypass filter. Since the characteristics can be specified by , the resolution can be improved because the band can be widened in the low frequency direction, and the amplitude and phase can be specified independently, and the interference between each digital filter can be arbitrarily reduced.

In particular, since the configuration is such that the phase and amplitude are adaptively controlled according to the input signal, the following effects can be obtained.

One is that by adaptively changing the amplitude characteristics, it is possible to easily construct a system equivalent to a noise reduction system for analog magnetic tape systems.

In addition, by adaptively changing the phase, it is possible to shape the waveform and compensate for the sudden change in the rise characteristic of an input signal.

By combining these effects in this way, by preparing various coefficient calculation programs, it is possible to support various systems such as noise reduction and enhancer, and even special effects and functions such as automatic sound field correction and surround sound field. can be made to last.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of the configuration of an adaptive control circuit, and FIG. 3 is a block diagram showing an example of the configuration of an FIR filter used in the above embodiment. 4 is a characteristic diagram of the filter, FIG. 5 is a diagram showing an example of the configuration of an amplitude coefficient unit, FIG. 6 is a diagram showing an example of the configuration of the phase control circuit, and FIG. 7 is a diagram showing an example of the configuration of the phase control circuit. FIG. 3 is an output characteristic diagram of each digital filter. HPI to HP5...Digital filter with bypass characteristics. C0E1 to C0E5... Amplitude coefficient unit, SUB... Subtraction circuit, ADD... Addition circuit, D E L 1. ~DEL5...phase control circuit, C0
NT...Adaptive control circuit.

Claims (3)

[Claims] (1) With respect to the sampling time interval of the input signal, a plurality of digital filter groups with bypass characteristics are provided that operate using the sampling time interval as a clock, and each of the digital filter groups is connected in series, and each output signal is It is added and taken out via the amplitude control circuit and phase control circuit, and among the numbers assigned to each filter in each filter group,
The delay time per unit delay element stage of the digital filter with the largest number is set to be greater than or equal to the sampling time interval of the input signal, and each time the filter number decreases by one in each filter group, the delay time per unit delay element stage of the filter increases. The delay time is multiplied by A^B (A>1, B>0), and the control unit controls the amplitude constant and delay time of each of the amplitude control circuits and phase control circuits according to the output signal of each digital filter. An octave multiplex filter characterized by: (2) The amplitude coefficient unit includes a coefficient multiplier and a RAM, and R
An amplitude coefficient table is stored in the AM, and the amplitude coefficient table taken out from the RAM is multiplied by the output of each digital filter in the multiplier in response to a control signal from the control section. An octave multiple filter according to claim 1. (3) The octave multiple filter according to claim 2, wherein the phase control circuit includes a RAM, and is configured to change the readout position of the RAM in accordance with the control signal.