JPS6324672Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a radio receiver, particularly a radio receiver equipped with a tuning display circuit, which uses a DC signal generated in the tuning display circuit when there is no signal or a weak input signal to output a detected signal. The purpose of this is to reduce the high-frequency components of the signal, reduce noise, and use the output of the tuning display circuit to operate the AGC circuit (automatic gain control circuit).

Furthermore, in FM stereo receivers equipped with a stereo display circuit, when conventional intermediate frequency stages with high gain are used, the stereo display light emitter lights up before the tuning display light emitter lights up, which is unnatural. However, in the present invention, the stereo display circuit does not display that FM stereo reception is in progress until the tuning display circuit indicates that the device is in tune, thereby solving the above unnaturalness. It is something to do.

An embodiment of the present invention will be described below with reference to the drawings.

In Figure 1, 1 is the FM front end section,
18, 19, and 20 are a high frequency amplification circuit, a mixing circuit, and a local oscillation circuit that constitute the FM front end section 1, 2 is an AM front end section, and 21 and 22 are
A high frequency amplification circuit and a converter circuit constitute the AM front end section 2, and 3 is an integrated circuit for IF and detection circuits including intermediate frequency amplification circuits and detection circuits for FM and AM, such as an integrated circuit.
HA12421 is available.

FIG. 2 is a block diagram showing the inside of the integrated circuit HA12421. In Figure 2, the pin is FM
Intermediate frequency signal input terminal, 4 and 5 are first and second stage intermediate frequency amplification circuits for FM, 6 is an FM detection circuit (quadrature detection circuit), 7 is an amplifier circuit provided after the FM detection circuit, pin is FM Detection output terminal, pin is AM intermediate frequency signal input terminal, 8,
9 is the first stage and second stage intermediate frequency amplification circuit for AM, 1
0 is an AM detection circuit, 11 is a peak detection circuit for obtaining a DC control signal from an FM intermediate frequency signal, 1
2 is a DC amplifier circuit, and 13 is a constant voltage circuit.

Returning to FIG. 1 again, 14 is an FM stereo demodulation circuit, (LED ₂ ) is a light emitting diode for stereo display that constitutes a stereo display circuit together with a drive circuit (not shown) in the demodulation circuit, and Q ₁ is a light emitting diode whose base is It is connected to the pin of the integrated circuit 3, that is, the output terminal of the DC amplifier circuit 12 where the DC control signal appears, the emitter is connected to the earth E via the resistor _R1 , and the collector is connected to the power supply line ₁₅ via the load resistor R2. The NPN transistor Q ₂ is a PNP transistor whose base is connected to the collector of the transistor Q ₁ and whose emitter is connected to the power supply line 15.
A resistor R ₃ and a light emitting diode LED ₁ are connected in series between the collector of the transistor Q ₂ and the earth E. and transistors Q ₁ , Q ₂ , resistors R ₁ ,
A tuning display circuit 16 is composed of R ₂ , R ₃ and the light emitting diode LED ₁ . Q ₃ is an NPN transistor whose base is connected to the collector of transistor Q ₂ , whose emitter is connected to earth E, and whose collector is connected to the power supply line 15 via resistor R ₄ ;
Q ₄ is an NPN transistor whose base is connected to the collector of transistor Q ₃ and its emitter is connected to earth E. C ₁ is connected between the pin of integrated circuit 3, that is, the FM detection output terminal, and the collector of transistor Q ₄ . transistors Q ₃ , Q ₄ ,
The resistor R ₄ and the capacitor C ₁ constitute a high frequency component reduction circuit 17 that reduces the high frequency components of the detection output signal.

Next, the operations of the tuning display circuit 16 and the high frequency component reduction circuit 17 in the circuit shown in FIG. 1 will be explained.

When receiving an FM stereo broadcast, the received signal input to the antenna ANT ₁ is amplified by the high frequency amplification circuit 18 of the FM front end section 1, converted to an intermediate frequency signal by the mixing circuit 19, and then transferred to the IF and detection circuit integrated circuit. Applied to pin of circuit 3. After being amplified and detected by each circuit in the integrated circuit 3, the FM
The detection output signal appears at the pin of the integrated circuit 3, and this FM detection output signal is output to the FM stereo demodulation circuit 14.
added to. Also, the FM intermediate frequency signal is detected by the peak detection circuit 11 in the integrated circuit 3 to obtain a DC control signal, and this DC control signal is transmitted to the DC amplifier circuit 1.
2 and output to the pin.

If the DC control signal appearing on the pin is at a predetermined level or higher, that is, if the received signal is at a predetermined level or higher, this DC control signal is applied to the base of the transistor _Q1 of the tuning display circuit 16, Transistor _Q1 turns on. When transistor Q ₁ turns on, power supply line 15 → resistor R ₂
→ Transistor Q ₁ → Resistor R ₁ → Power flows to earth E. Therefore, a voltage drop occurs due to the resistor _R2 , and the base potential of the transistor _Q2 becomes a negative potential with respect to the emitter potential, and the transistor _Q2 turns on, and the power supply line 15 → transistor _Q2 → resistor
A current flows from R ₃ to light emitting diode LED ₁ to earth E, and the tuning display light emitting diode LED ₁ lights up to indicate that it is in tune.

At this time, a voltage corresponding to the voltage drop across the resistor R ₃ and the light emitting diode LED ₁ is applied to the base of the transistor Q ₃ of the high frequency component reduction circuit 17. Therefore, transistor Q ₃ turns on, the voltage at the collector of transistor Q ₃ becomes low level, and transistor Q ₄ turns on.
It becomes OFF state. Therefore, since the FM detection output signal from the pin of the integrated circuit 3 does not flow to the capacitor _C1 side, the FM detection output signal is inputted to the FM stereo demodulation circuit 14 without high-frequency components being reduced, and the FM stereo The demodulation circuit 14 separates and demodulates left and right audio signals.

Next, when there is no signal or a weak input signal, the DC control signal does not appear at the pin of the integrated circuit 3 or is small, so the transistor Q ₁ of the tuning display circuit 16
It turns off. If transistor Q ₁ is OFF, then
Since no voltage drop occurs due to the resistor R ₂ , no base voltage is applied to the transistor Q ₂ and the transistor Q ₂ is also turned off. Therefore, the tuning display light emitting diode LED ₁ does not light up.

Also, at this time, since no voltage is applied to the base of transistor _Q3 , transistor _Q3 is also turned off. Therefore, a voltage is applied to the base of transistor Q ₄ through resistor R ₄ , and transistor Q ₄ is turned on.
becomes. Therefore, the high-frequency component of the FM detection output signal from the integrated circuit 3 is dropped to the ground E via the capacitor _C1 and the transistor _Q4 , noise components are removed, the S/N ratio is improved, and the signal becomes easier to hear.
Furthermore, even if the 19KHz stereo pilot signal is included in the FM detection output signal, this stereo pilot signal is also weakened by the reduction effect, so the FM stereo demodulation circuit 14 does not perform stereo demodulation, and it is not used for stereo display. light emitting diode
LED ₂ also does not light up. In this way, the stereo display light emitting diode LED ₂ does not light up until the tuning display light emitting diode LED ₁ lights up.

On the other hand, when receiving FM monaural broadcasting or AM broadcasting, if the received signal is at a predetermined level or higher, the tuning display light emitting diode LED ₁ lights up and the high frequency component reduction circuit 17 does not operate, so the detected output signal The high frequency components of are not affected by the reduction effect. When there is no signal or a weak input signal, the tuning display light emitting diode LED ₁ does not light up, and the high frequency components of the detection output signal are reduced, reducing noise.

Next, the configuration and operation of the AGC (automatic gain control) circuit 23 shown in FIG. 1 will be explained.

In the AM high frequency amplification circuit 21, _Q5 is a high frequency amplification transistor, _R5 is a bias resistor,
R ₆ is a current adjustment resistor for transistor Q ₅ , C ₂ is a coupling capacitor, C ₃ is a bypass capacitor, Q ₆ is a transistor that constitutes the AGC circuit 23, and the collector-emitter path is between resistor R ₆ and earth E. and its base is connected to the collector of transistor _Q3 . And tuning display circuit 1
By using the DC signal generated at 6, that is, the voltage drop generated at the resistor R ₃ and the light emitting diode LED _1, to turn on and off the transistors Q ₃ and Q ₆ ,
The high frequency gain is controlled by turning on and off the high frequency amplification transistor _Q5 to obtain the AGC effect.

That is, if the received signal is at a predetermined level or higher, transistor Q ₃ is turned on and transistor Q ₆ is turned off, so that high-frequency amplification transistor Q ₅ is also turned off. Therefore, at this time, the high frequency amplification transistor
_Q5 does not work, but high frequency amplification transistor
Broadcast radio waves are induced in a load coil (not shown) connected to the collector of Q ₅ and transmitted to the converter circuit 22 . On the other hand, when there is no signal or a weak input signal, the transistor Q ₃ is turned off and the transistor Q ₆ is turned on, so the high frequency amplification transistor Q ₅ is also turned on, and the high frequency amplification circuit 21 normally performs high frequency amplification operation. In this way, when receiving AM, the high frequency amplifier circuit 21
The gain at is automatically controlled to obtain the AGC effect.

Although not shown in the circuit of Figure 1, the FM
If the high-frequency amplifier circuit 18 for AM is configured in the same manner as the high-frequency amplifier circuit 21 for AM, the AGC operation can be easily performed.

As described above, according to the present invention, it is possible to reduce the high-frequency components of the detection output signal by using the output of the tuning display circuit, and to reduce noise.
The output of the tuning display circuit can be used to operate the AGC circuit. Therefore, the circuit configuration is simple, the number of parts is small, and the cost is low.
In addition, when the present invention is used in an FM stereo receiver, the stereo display circuit will not indicate that it is in FM stereo reception until the tuning display circuit indicates that it is tuned, and it will not display the FM stereo reception status like the conventional circuit. It is possible to eliminate the unnaturalness in which the stereo display light emitter lights up even though the synchronization display light emitter is not lit.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a radio receiver according to the present invention, and FIG. 2 is a block diagram showing the inside of an integrated circuit used in the circuit of FIG. 3... Integrated circuit for IF and detection circuit, 16...
Tuning display circuit, 17... High frequency component reduction circuit, 23
...AGC circuit.

Claims (1)

[Claims for Utility Model Registration] (1) In a radio receiver equipped with a tuning display circuit controlled by a DC control signal obtained by detecting an intermediate frequency signal, one end is connected to the detection output signal line. a high-frequency component reduction circuit that includes a capacitive element and is controlled by a DC signal generated by the tuning display circuit; and a high-frequency component reduction circuit that is arranged in a high-frequency amplifier circuit and controlled by a DC signal generated by the tuning display circuit. When there is no signal or a weak input signal, the high-frequency component reduction circuit reduces the high-frequency component of the detected output signal, and the
A radio receiver characterized in that an AGC circuit increases the gain of a high frequency amplification circuit. (2) The radio receiver has a stereo display circuit.
It is equipped with an FM stereo demodulation circuit, and when there is no signal or a weak input signal, the high frequency component of the detected output signal is reduced by the high frequency component reduction circuit, so that the stereo display circuit becomes inactive. A radio receiver according to claim 1, characterized in that the radio receiver is configured as follows.