JPS63246680A - Power factor meter - Google Patents

Abstract

PURPOSE:To obtain a highly accurate digital output with a simple correction of errors due to phase rotation within an apparatus, by adding a digital conversion signal as phase difference detection output to and subtracting it from a digital signal from a phase correction data setter. CONSTITUTION:A voltage component V and a current component I of an electric circuit 1 to be measured are detected with a voltage detector 2 and a current detector 6 and applied to a phase difference detector 5 and a phase polarity detector 13 through an attenuator 3, a current-voltage converter 7 and waveform shaping devices 4 and 8. On the other hand, a phase correction data setter 11 sends out a signal to cancel phase rotation at an analog circuit to a phase difference detector 5 from voltage and current input sections of the electric circuit 1 being measured. With an adder/subtracter 10, an intrinsic phase difference signal data is formed from the size of data and phase polarity in the advance and delay thereof of an A/D converter 9 and the phase correction data setter 11. A cosphi computing unit 12 calculates a power factor from the phase difference signal data to be fed to a display device 14 together with phase polarity information.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a power factor meter for measuring the power factor of three-phase AC power lines, etc. More specifically, the present invention relates to a power factor meter that measures the power factor of three-phase AC power lines, etc. This invention relates to a digital power factor meter equipped with a digital power factor meter.

[Conventional technology]

Conventionally, analog power factor meters have generally been used.1 For example, the voltage and current of the electrical circuit under test are detected, each waveform is converted into a square wave voltage, and the voltage is proportional to the phase difference at the time of rise. This voltage is applied to a meter having a non-linear scale of cosφ on the left and right sides with a median value of 1 to indicate the power factor cosφ.

In this case, at the rising point of the square wave voltage representing the voltage component, for example, when the square wave voltage representing the current component is at H level, it is a leading phase, and when it is at L level, it is a lagging phase, and the phase polarity of - or 10 is set accordingly. It emits a signal that causes the meter pointer to swing to the left (forward) or to the right (lag).

[Problem that the invention seeks to solve]

This conventional device has the advantage that the circuit is relatively simple, since the phase difference between the lead and lag of the current with respect to the voltage of the electrical circuit to be measured is converted into a power factor by the scale process of the meter.

However, in general, there is a relative phase rotation Δφ between the voltage and current in the device, so if the phase difference between the voltage and current in the measured circuit is, for example, φ, the power factor indication of the measured value on the meter is cos (φ±Δφ), which causes an error with respect to the power factor cosφ that should originally be specified. In this case, the meter should have a scale that takes into account the error, or the phase rotation angle Δφ can be corrected using a correction circuit, but since the phase rotation angle Δφ differs depending on the device, correction using a scale is extremely troublesome. . Further, correction using a correction circuit complicates the circuit, increases cost, and may also impair stability, which is not preferable in any case.

The present invention has been made in view of the above points, and its first purpose is to realize a highly accurate digital power factor meter that can relatively easily correct errors caused by phase rotation within the device. A second object of the present invention is to provide a power factor meter that can be incorporated into, for example, another digital measuring instrument and can perform measurements by sharing its microcomputer.

[Structure of the invention]

Referring to FIG. 1, an embodiment of the invention is shown.
This power factor meter detects, for example, the rise of a square wave voltage Vv representing the voltage component of the electrical circuit 1 to be measured and the rise of the square wave voltage Vi representing the current component, and generates a voltage related to the phase difference φ. a phase difference detector 5 forming a phase difference detector 5, an A/D converter 9 digitally converting its output, and a signal that cancels the phase rotation in the analog circuit from the voltage and current input section of the electrical circuit under test 1 to the phase difference detector 5. and a phase polarity detector that detects the level of the square wave voltage Vi representing the current component at the rising edge of the square wave voltage VV representing the voltage component and detects the lead or lag of its phase. The phase polarity signal from the phase polarity detector 13 is used to add the digital conversion signal from the A/D converter 9 and the digital signal from the phase correction data setting device 11, or add the digital signal from the phase correction data setting device 11, or An adder/subtractor 10 that subtracts the other signal from the signal, and the power factor cos of the electrical circuit under test 1 from the added value or subtracted value.
It is equipped with an eO8φ calculator 12 for calculating φ.

〔Operating principle〕

Now, if the phase difference between the voltage and current of the measured circuit 1 is φ, and the voltage proportional to this phase difference φ is V(φ), ■(φ)=
1・φ (1). However, 1 is a constant of proportionality.

Next, if the relative phase rotation angle in the analog circuit from the input section to the phase difference detector 5 is Δφ, and the voltage proportional to this phase rotation angle Δφ is ■(Δφ), then due to the delay and lead of the above Δφ, ± V(Δφ) = 2・Δφ ・・・・・・・・・・・・
(2). However, k2 is a proportionality constant.

Therefore, if the output of the phase difference detector 5 is V(φ'),
From equations (1) and (2), ■(φ')=V(φ)±V(Δφ)・・・・・・・・・
(3) becomes.

Here, if we set .phi.' to (.phi.')=, then equation (3) becomes: 3.phi.=1.phi.+2..DELTA..phi. (4). However, k3 is a proportionality constant.

In this case, the above voltages V(φ), ■(Δφ), ■(φ')
are obtained through the same circuit, so k1=2=3 can be set.

Therefore, from equation (4), φ'= φ ± Δφ (measured value) (true value) (error) From this, φ= φ'; Δφ... (5) (true value) (measured value) (correction value) is obtained.

In equation (5), -Δφ is a correction value that gives advance, +
Δφ is a correction value that provides a delay. This correction is calculated using the formula (5
) is divided into the following six ways depending on the content.

[l] If the measured value φ' is in leading phase (-φ') 1-1
φ=-φ' -Δφ (advance phase) (advance correction) =-(φ'+Δφ)...φ is set as "advance" 1
−2 φ = −φ′ ten Δ φ(I
phase) (delay correction) (i) If φ'>Δφ, φ=-(φ'-Δφ)...φ is set as 'advance' (ii
) If φ' is Δφ, then φ = Δφ - φ' and φ is set as 'lag' [11] If measured value φ' is in delayed phase (+φ'), n-t
φ=+φ' + Δφ...φ is set as 1 lag' (
(lag phase) (lag correction) 112 φ=+φ' - Δφ (lag phase) (lead correction) (i) If φ'>Δφ, set φ as 1 lag' (i
i) If φ′〈Δφ, φ=−(Δφ−φ′) and φ is set as “advance” [Implementation]
Example] Referring again to FIG. 1, the voltage input section of this power factor meter includes, for example, a voltage detector 2 that detects the voltage component V of the electrical circuit under test 1, and an attenuator that adjusts the detected output to an appropriate level. 3
and a waveform shaper 4 that shapes the adjusted voltage into a square wave voltage VV.
is added to the phase difference detector 5 and the phase polarity detector 13, for example.

Further, the current input section includes, for example, a current detector 6 that detects the current component l of the electrical circuit under test 1, a current/voltage converter 7 that converts the detected output into a voltage of an appropriate level, and a current/voltage converter 7 that converts the detected output into a voltage of an appropriate level. Similarly to the above, the voltage representing the current component is a square wave voltage V.
A waveform shaper 8 is provided for shaping the waveform of the waveform i, and the shaped square wave voltage Vi is applied to the phase difference detector 5 and the phase polarity detector 13, for example.

In this phase difference detector 5, for example, a square wave voltage Vv representing the voltage component and a square wave voltage Vi representing the current component are used.
A/D converter 9 detects each rising edge of
Send to.

The A/D converter 9 digitally converts this phase difference signal V(φ') and applies it to, for example, an adder/subtractor 10.

This digitally converted phase difference signal V(φ') has the following:
As stated in the explanation of the operating principle above, the original phase difference signal V(φ
) and the phase rotation angle ±Δ at the analog input section in the device.
An error component voltage ±V (Δφ) due to φ is included.

Therefore, in this embodiment, the above error component canceler ■(
For example, in order to cancel the signal voltage +V of the opposite polarity,
A phase correction data setter 11 is provided which supplies (Δφ) to the adder/subtractor 10 as correction data. in this case,
Since the error component voltage ±V(Δφ) generally differs depending on the device, its value is measured in advance for each device and the above-mentioned reverse polarity signal voltage; V(Δφ) is set. That is, the 1-phase correction data setter 11 has, for example, an n-bit digital switch that is operated manually, and the most significant bit 0 and 1 are for leading and lagging phase polarity information, and the other bits are for the above-mentioned reverse polarity. It is used to set correction data representing the magnitude of the signal voltage V (Δφ).

In the adder/subtractor 10, each data of the phase difference signal voltage V (φ') inputted from the A/D converter 9 and the signal voltage +V (Δφ) for canceling the error component given from the phase correction data setter 11 The above two voltage data are added or one voltage data is subtracted from the other voltage data depending on the magnitude of the lead and lag phase polarity, and the original phase difference signal data V(φ) of the circuit under test 1 is obtained. is starting to form. In this case, the phase polarity information of the advance and lag of the phase difference signal voltage V(φ') inputted from the A/D converter 9 is transmitted to the phase polarity detector 13, for example.
given from.

The cosφ calculator 12 uses the phase difference signal data V(φ) formed by the adder/subtractor 10, for example, to calculate the electrical circuit under test 1.
The phase difference φ is calculated, the power factor cosφ is calculated, and the output is sent to the display 14 with predetermined phase polarity information indicating the delay.

Note that FIG. 2 shows an example of a procedure when the above measurement operation is controlled by a microcomputer. In the figure, the numbers I-1 to If-2 are as follows.

In the explanation of the operating principle, the numbers are cited for the sections in which the correction methods are divided into six ways.

〔Effect of the invention〕

As described above in detail, the power factor meter according to the present invention includes an adder/subtractor to which digital conversion data of a phase difference signal related to the phase difference between voltage and current of the electrical circuit to be measured is added, and an analog input section of the device. a phase correction data setter that applies voltage signal data of opposite polarity to the adder/subtractor in order to cancel the error component voltage included in the phase difference signal by phase rotation; and a phase polarity detector that detects and sends that information to the adder/subtractor.

As a result, the adder/subtractor is configured to perform two steps based on the magnitudes of the phase difference signal data and phase correction data and their phase polarities.
By adding two pieces of data or subtracting one data from the other, voltage data proportional to the original phase difference of the measured circuit is formed, and the voltage data is added to the cosφ calculator along with lead and lag phase polarity information. ing.

Therefore, according to the present invention, data for correcting errors due to phase rotation within the device can be easily set. It is possible to provide a digital power factor meter that measures the power factor of a measurement circuit with high precision and at high speed.

In addition, this power factor meter can be incorporated into other digital measuring instruments.
For example, by sharing the microcomputer, it is possible to realize a relatively low-cost, multifunctional on-site measuring instrument equipped with a power factor meter.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the configuration of a power factor meter according to the present invention, and FIG. 2 is a flow diagram showing an example of a case where the measurement operation is controlled by a microcomputer. In the figure, 1 is the electrical circuit to be measured, 5 is the phase difference detector, and 9 is the A/D.
Converter, 10 is an adder/subtractor, 11 is a phase correction data setter, 12 is a cosφ calculator, 13 is a phase polarity detector,
■ is the voltage of the circuit under test, ■ is the current of the circuit under test, φ is the phase difference of the circuit under test, ■ (φ) is a signal proportional to the phase difference φ, and ■ (φ') is the phase difference including error components. Signal, ;V(φ)
is correction data for canceling error components. .

Claims (1)

[Claims] A voltage having a magnitude related to the phase difference between the voltage and current of the electrical circuit to be measured is formed, an error included in the voltage based on the phase rotation inside the device is corrected by an error correction means, and the voltage is sent to the measuring section. In the power factor meter that measures the lead/lag polarity of the phase difference and its power factor, the error correction means sends out an error canceling digital signal having a polarity opposite to the error due to phase rotation within the device. A phase correction data setter, a digital conversion signal of a voltage of a magnitude related to the phase difference, and the magnitude and polarity of the digital signal from the phase correction data setter, add the above two signals, or convert one signal to the other. A power factor meter comprising: an adder/subtractor that subtracts the signal from the above, forms a voltage signal having a magnitude proportional to the phase difference, and sends the voltage signal to the measuring section.