JPS63245216A - Battery reconditioning circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Object of the Invention] (Field of Industrial Application) This invention provides a battery that prevents deterioration of battery characteristics.
Relating to a reconditioning circuit.

(Prior Art) Generally, batteries that are repeatedly charged and discharged must be reconditioned (reconditioned) to prevent their characteristics from deteriorating.
It is necessary to carry out a discharge with a large depth of discharge using a low level current at an appropriate time, and the effect is generally greater as the depth of discharge is deeper.

Conventional glue conditioning circuits are shown in FIGS. 3 and 4. The circuit shown in FIG. 3 connects the battery 11 to the switch 12.
Accordingly, the reconditioning load RR is disconnected from the charging/discharging path 13, and the reconditioning load RR is connected to the battery 11 instead. In addition, the circuit shown in FIG. 4 maintains the minimum voltage of the battery by controlling the switching transistor Tr provided in the current path of the circuit conditioning circuit RR shown in FIG. It has a function.

However, the conventional battery reconditioning circuit as described above has the following problems. first,
In the circuit configuration shown in FIG. 3, reconditioning must be stopped manually.

In particular, in systems such as unmanned driving systems or satellite systems in which the period during which human control is possible is limited, it is extremely difficult to set an ideal conditioning depth of discharge for the battery. Furthermore, depending on the timing of stopping reconditioning, there is variation in the voltage across each cell of the battery during reconditioning, so there is a risk that the cells forming the battery will be charged to opposite polarities.

In addition, in the circuit configuration shown in Figure 4, the Zener voltage will not drop below the voltage determined by the Zener diode (Zener voltage), but depending on the Zener voltage setting, the circuit in Figure 3 may Similarly, there is a risk that the cells forming the battery will be charged with reverse polarity, and it is not easy to perform safe deep discharge reconditioning in this method as well.

(Problems to be Solved by the Invention) As described above, in the conventional battery reconditioning circuit, there is a risk of charging the battery constituent cells with reverse polarity, so it is difficult to carry out safe deep discharge reconditioning. I couldn't do that.

This invention was made to solve the above problem.
It is an object of the present invention to provide a battery reconditioning circuit requiring an automatic stop function, which enables deep discharge reconditioning without charging battery constituent cells with reverse polarity even during reconditioning.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, a battery reconditioning circuit according to the present invention includes a battery configured by connecting a plurality of battery cells in series, and a battery reconditioning circuit according to the present invention. a switch element that is connected to a battery and controls the battery to be in a discharged state or a non-discharged state; and a cell that selectively and sequentially derives the voltage across each of the plurality of battery cells when the battery is in a discharged state by this switch element. a voltage detecting means;
and a control means for controlling the switch elements.

(Function) The battery reconditioning circuit according to the configuration described in 1 U detects that one of the voltages across each of a plurality of battery cells becomes lower than the reference voltage, and uses a switch element to prevent the battery from discharging. state and automatically stops reconditioning to prevent reverse polarity charging of each cell.

(Embodiment) An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 shows its configuration, in which the battery 21 is
- It is constructed by connecting cells B1 to Bn in series, and a reconditioning load RR is selectively connected to both ends thereof by a set/reset relay 22. The set/reset relay 22 has a relay contact k l connected in series to the load RR, and a set coil K i
Set the relay contact to 1 by excitation of s on the S side (with the reconditioning load R connected to the battery 21)
The relay contact kl is connected to the reset R side (with the reconditioning load RR disconnected from the battery 21) by the excitation of the reset coil KIR, and the excitation of the set coil KIS is connected to This is performed using a conditioning on voltage van.

Resistors RIO to RIn and R20 to R2n are installed at both ends of the battery 210 and at the connection points between the cells 81 to Bn, respectively.
(Here, R10-R12---Rin, R2
0=R22-...-R2n) voltage divider circuit 2
30 to 23n are connected. Among these, the voltage dividing circuit 231
The output voltages Vl-Vn of ~23n are respectively supplied to the channel input terminals of the first analog multiplexer 241, and the output voltages vO~V of the voltage divider circuits 230~23n-1 are
n-1 each second analog multiplexer 24
2 channel inputs.

First and second analog multiplexers 241°24
2 are n channel switches CHf to CHn, respectively.
The channel switches CH are sequentially switched in accordance with the control pulse CP from the control pulse generator 25, and the voltage dividing circuit outputs v1 to Vn, VO to V are selectively output.
n-1 is derived. The voltage derived by the first analog multiplexer 241 is supplied to the (+) side of the differential amplifier 27 via the buffer circuit 2fil, and the voltage derived by the second analog multiplexer 242 is supplied to the (+) side of the differential amplifier 27 via the buffer circuit 2fil. and is supplied to the (-) side of the differential amplifier 27.

The differential amplifier 27 calculates and outputs the differential voltage vR between the two people's power, and the differential voltage vR obtained here is transferred to the comparator 2.
8 (-) side. This comparator 2B is (
The reference voltage V ref' supplied to the (+) side by the Zener diode ZD is compared with the differential voltage vR supplied to the (-) side, and a reset signal is output when VR<Vref'.

This reset signal is supplied to the reset circuit 29.

This reset circuit 29 is a switching transistor T
r l s consists of capacitor C1, comparator 2
When a reset signal is input from 8, the transistor Tri
turns on, energizes the reset coil KIR of the set/reset relay 22, connects 1 to the relay contact to the reset R side, and connects the reconditioning load RR.
This is to disconnect the battery 21 from the battery 21.

Further, a reset relay 30 is connected in parallel to this reset circuit 29. This reset relay 30 connects the on-drive coil to 2 to recondition the off-voltage V.
When of'l' is supplied, this on-drive coil is energized by 2 to set the relay contact to the on state, thereby energizing the reset coil KIR and controlling it to the above-mentioned reset state. It is.

The operation of the above configuration will be explained below.

First, when the reconditioning on voltage VOR is generated by a manual operation such as a ground command, the set/reset relay 22 is set and the reconditioning load RR is connected to the battery 21. At this time, the mold pressure between the (+) side terminal of each cell constituting the battery 21 and TLN/GND (T), the (-) side terminal and T
The mold pressure between LM and GND (T) is each resistor RIO~
Rin, voltage dividing circuits 230 to 23 using R20 to R2n
The voltage is divided by n to below the maximum allowable input voltage value of the analog multiplexers 241 and 242. Here, the voltage division coefficients of each voltage division circuit 230 to 23n include RIO-R11-
-----Rln, R20-R21----R2n
Therefore, k-R20/(R10+R20) is the same value. Note that the values of RIO and R20 are set to be sufficiently large values so that the battery discharge current due to these resistors becomes negligible.

Output voltage v1 of 231 to 23n among the above voltage dividing circuits
Vn is supplied to each channel of the first analog multiplexer 241, and output voltage vO of 230 to 23n-1
~V n-1 is the second analog multiplexer 242
is supplied to each channel. Here, each of the analog multiplexers 241 and 242 is shown as one for convenience, but the integer ff (,t'≧n The same result can be obtained by configuring it with / m ) analog multiplexers. These multiplexers 241 and 242 are driven by the same control pulse CP, and each multiplexer 241 and 242
As shown in FIG. 2, the channel switches CHI to CHn of No. 1 and 242 are sequentially turned on for a fixed period at a fixed cycle, and input voltages are sequentially derived.

For example, looking at the pth cell Bp from the bottom, the mold pressure Vp between its (+) side terminal and TLM/GND (T)
The mold pressure Vp- between the + and (=) side terminals and TLM/GND (T) is determined by the voltage divider circuit zap, 21p-11,: ok.
”V p+x k-Vp 5Vp-X k -vp-
After t, the first analog Φ multiplexer °24
1 channel switch CHp and the channel switch CHp of the second analog φ multiplexer 242, and each multiplexer 2
It is derived at the time when the channel switches CHp of 41° and 242 are turned on at the same time. The voltage Vp selected by the first analog multiplexer 241 is supplied to the (-) input terminal of the differential amplifier 27 via the buffer circuit 261, and the voltage Vp-1 selected by the second analog multiplexer 242 is supplied to the (-) input terminal of the differential amplifier 27. is supplied to the (,+) input terminal of the differential amplifier 27 via the buffer circuit 262.

When the gain of the differential amplifier 27 is G, the output voltage vR of the differential amplifier 27 is k (Vp -Vp-1) X
G and is compared with the reference voltage V red' of the comparator 28. At this time, when VR<Vref, a reset signal is output from the comparator 28, and the reset circuit 29
The transistor Trl is turned on, the reset coil KIR of the relay 22 is excited, the relay contact 1 is connected to the reset R side, the reset state is set, and the reconditioning load 22 is disconnected from the battery 21.

In addition, by manual operation such as a ground command, a reconditioning off voltage Vofl' is generated and 2 is turned on at the relay contact of the relay 30, thereby exciting the reset coil KIR and resetting 1 at the relay contact. It can also be set to the state. Note that even if the capacitor C1 of the reset circuit 29 fails while the comparator 28 is outputting a reset signal (high level) or if the transistor Tri fails in short circuit mode,
This is to enable reconditioning off by manually driving the relay 30.

To summarize the above, the voltage Vp across the p-th cell Bp is V
When the value becomes less than ref'/(k x G), Niri conditioning is automatically turned off. This is the same for other cells, and the partial voltage is derived sequentially by the control pulse CP, and the voltage is
rel”/(k×G).

Therefore, the battery reconditioning circuit with the above configuration automatically performs reconditioning when any one of the voltages across the Panteri constituent cells becomes equal to or lower than the reference voltage determined by V ref / (k x G). Therefore, there is no risk that the cells forming the battery will be charged to the opposite polarity, and deep discharge reconditioning can be safely performed. In addition, the voltage value across the cell at which reconditioning should be stopped is Vrel.
', k, and G, Vref'/(
k x G).

[Effects of the Invention] As described above, according to the present invention, battery reconditioning that requires an automatic stop function enables deep discharge reconditioning without charging battery constituent cells with reverse polarity even during reconditioning. The circuit can be provided.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram showing one embodiment of the battery reconditioning circuit according to the present invention, FIG. 2 is a timing diagram for explaining the operation of the same embodiment, and FIGS. 3 and 4 are respectively conventional FIG. 2 is a circuit diagram showing the configuration of a battery reconditioning circuit of FIG. 21...Battery, 31~Bn...Cell, RR...
・Reconditioning load, 22...Set/reset relay, 231-23n...Voltage dividing circuit, 241
, 242...Analog multiplexer, CHI~C
Hn... Channel switch, 25... Control pulse generator, 281, 262... Buffer circuit, 27... Differential amplifier, 28... Comparator, 2
9...Reset circuit, 30...On/off relay,
van... Reconditioning on voltage, Vof
f...Reconditioning off voltage. Applicant's representative Patent attorney Takehiko Suzue; Figure 2 GND Figure 3

Claims (1)

[Claims] A battery configured by a plurality of battery cells connected in series, a switch element connected to the battery and controlling the battery into a discharge state or a non-discharge state, and when the battery is placed in a discharge state by the switch element,
cell voltage detection means for selectively and sequentially deriving voltages across each of the plurality of battery cells; and a switch element configured to cause the battery to enter a non-discharging state when the voltage detected by the means becomes equal to or lower than a reference voltage. A battery reconditioning circuit comprising control means for controlling the battery reconditioning circuit.