JPS63245179A - Data processor - Google Patents

Abstract

PURPOSE:To obtain data subjected to interpolation arithmetic processing with less errors with respect to data shown in solid lines by dividing sampling data into two by prescribed frequency characteristics to apply linear interpolation and sine curve interpolation respectively. CONSTITUTION:The frequency characteristic of the sampling data is limited to prescribed frequency characteristics F1(omega), F2(omega) by a filter circuit 2 and a subtraction circuit 3. An interpolation arithmetic processing circuit 4 applies linear interpolation to the sampling data outputted from the circuit 2 to output interpolation data between sampling points of each data. An interpolation arithmetic processing circuit 5 applies a sine curve interpolation to the sampling data outputted from the circuit 3 to output interpolation data between sampling points of each data. Outputs of the circuits 4, 5 are added by an adder circuit 40. The sine curve interpolation is applied in addition to the linear interpolation in this way, then the data errors are reduced. In this case, the circuit 2 is constituted by a 2-dimensional circuit having a prescribed spatial frequency characteristic F1(omega) in horizontal and vertical directions of a displayed image.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

A. Industrial field of application B. Overview of the invention C. Prior art (Fig. 12) D. Problem to be solved by the invention (Fig. 12) E. Means for solving the problem (Fig. 1) 2. Effect ( Fig. 1) G Embodiment (Figs. 1 to 11) H Effects of the invention A Industrial field of application The present invention relates to a data processing device, and is suitable for application to, for example, a special effects device for television broadcasting stations. It is.

B. Summary of the Invention The present invention uses a data processing device to divide sampling data into two parts with predetermined frequency characteristics and perform linear interpolation and sine curve interpolation on each, thereby performing interpolation calculation processing with little error on actual data. It was designed to obtain data.

C. Conventional technology Conventionally, this type of special effects device converts television signals into digital signals to create a display image that looks like an input image pasted onto a three-dimensional curved surface (for example, a cylindrical curved surface). There is something that is displayed.

That is, based on three-dimensional curved surface data representing a three-dimensional curved surface, a desired three-dimensional curved surface is created by performing arithmetic processing to map planar input image data obtained from an input television signal onto the three-dimensional curved surface. You can get a display image pasted on the .

However, in this case, it is necessary to perform arithmetic processing on a large number of pixels that make up the input image data, which inevitably makes the overall structure of the special effects device large and complicated. A special effects device using an interpolation processing circuit is used as the device.

That is, after determining input image data corresponding to predetermined sampling points of the display image based on three-dimensional curved surface data, input image data corresponding to pixels between the sampling points is determined based on the input image data of the sampling points. By obtaining image data for each pixel of a display image by calculating data by interpolation, image conversion can be performed with a simple configuration and in a short calculation time.

D Problems to be Solved by the Invention However, in such a data processing device, there is a problem in that the quality of the displayed image deteriorates.

That is, as shown in FIG. 12, this type of data processing device usually uses an interpolation calculation processing circuit that performs linear interpolation.

These are the four adjacent sampling points P0°, P, Pl, and P. In I, image data D0°, Dl
. , D I + and D6+ are the sampling points P,.

Assuming that the sampling points Po, Pl change linearly in the X direction and the Y direction (that is, in the horizontal and vertical directions of the displayed image), respectively. , pH and pHl, the image data D (X+ y
l respectively at the sampling point P,. , pH1%P,
and Pal image data D. , I) to, D, and D
This is determined by internally dividing the straight line connecting O+.

However, in reality, the value of the image data does not change linearly, but at the sampling point P,. , pHl, and pH and Pal, there is a problem in that errors occur in image data obtained by performing linear interpolation calculations on actual image data values.

In actual display images, this error causes a problem in that the high-frequency components of the image data are degraded, the resolution of the entire display image is reduced, and the quality of the display image is degraded.

One way to solve this problem is to use a higher order, e.g.
One possible method is to approximate the image data using the following curve and perform interpolation calculations to reduce errors with respect to the actual image data.

However, when the proximal curve of image data is obtained using a high-order curve in this way, the number of sampling points required for the inter-segregation calculation process increases cumulatively, and the configuration of the data processing device becomes complicated. There was a problem.

In other words, in the case of linear interpolation, image data between four sampling points around the point for which image data is sought can be used to obtain the image data between the sampling points. When performing interpolation calculations,
Image data of 16 sampling points around the point from which image data is obtained is required, and the configuration of the entire data processing device becomes complicated accordingly.

The present invention has been made in consideration of the above points, and it is an object of the present invention to propose a data processing device that has an overall simple configuration and is capable of obtaining interpolated image data with few errors.

E Means for Solving the Problem In order to solve this problem, in the present invention, the frequency of the sampling data D fl, J) I) (Ill H ~ D (+, J..., D (1411 Jul)) The first and second filter circuits 2.3 limit the characteristics to predetermined frequency characteristics Fl(ω) and F2(ω), and the sampling data a(
1+Jl % a(++hJ) \a(1+J*+1
By linearly interpolating 1a (1°81..1), sampling data a(1+J), a(1+l, J)
, a(++J, Il , a(1+I+J+l) sampling point P(1,J) , P(1・1・J)・P mountain J・1)・pH・I+ J411 First interpolation data a ( 14XI J + y), and sampling data b(1+Jl,b(1,1) output from the second filter circuit 2.3.
, J), b mountain, ,, b (I, l + Jul1 by sine curve interpolation, sampling data
b(1+Jl・b(1・1・J〉・b mountain J01)・
b (sampling point of IllJ.3. ”+1+J),
PCI or IIJ), P (LJ*+1, P (1,
1+Jul1 second interpolation data b(1*x+J.y
, and the first and second interpolation data a (+*X+ Jay), b (+
+x+ Jay).

By performing the sine curve interpolation in addition to the F-action linear interpolation, the error in the interpolated data obtained via the precalculation circuit 40 can be reduced accordingly.

Furthermore, by using sine curve interpolation and linear interpolation, two sampling points P (1, Jl,
P(++l+Jl, P(1+ Jul, P(
1+I+J. 1) Sampling data D +1. J
), D(+ya,, ha, D(1+□+r>, D <I+
Interpolation calculation processing can be performed using only l+Jul1, and a data processing device with a simple configuration as a whole can be obtained.

G example An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1, 1 indicates the image processing device as a whole;
Each sampling point P (1,□1% P(t++, a
), P(1, J.1) and P(++llJ, , image data D<1+J), D(Ilil+J),
D(1+J.l) and D+1.1+J+l
) is supplied to the digital filter circuit 2 and the subtraction circuit 3.

The digital filter circuit 2 has a predetermined spatial frequency characteristic Fl(ω) in the horizontal and vertical directions of the displayed image.
The resulting sampling data a(1+JI 5a(1*l
+Jl % a (1+J+1) and aTI+l+J
. 1. is output to the first interpolation calculation processing circuit 4 and the subtraction circuit 3.

Therefore, through the subtraction circuit 3, the sampling data expressed by the following formula % formula % (1)
(1, J.. and b+1+I, J.,) are obtained, and the sampling data b(1+J), b+1'
l+J), b(1+J.1. and b TI+l+ Jl
) is output to the second interpolation calculation processing circuit 5.

In this way, the digital filter circuit 2 constitutes a filter circuit with a spatial frequency characteristic Fl(ω), and the subtraction circuit 3
Together, a filter circuit with a spatial frequency characteristic F2(ω) expressed by the following equation (5) is constructed.

The first interpolation calculation processing circuit 4 is an interpolation calculation processing circuit using linear interpolation, and calculates the image data D (14X+Jay) at a point P (1+X+J
The four sampling points adjacent to *rl are Pyamaha, P
CI'. , 17, PCI-1+ J + 1 > and
Image data of P(1-・■) D<IIJ)s Du*
++J> % D+1 9J-1) and D (II
Corresponding to Jul1, sampling data a mountain J,, a (1*
I+ Jl, a (14+1 Jul1 and a (1
, Ji) Interpolated data a of point P (++x+J*y)
tl*x, J and 1. get.

Here, the values X and y are the sampling point P (1, J) expressed by the following formula % formula % (6)
It represents the distance to (1+x, Jay), and the weighting is hereinafter referred to as a coefficient.

That is, as shown in Fig. 2, the weighted coefficient
1411J) are received by multiplication circuits 11 and 12, respectively,
The weighting is performed using coefficients 1-x and X.

As a result, the multiplier circuits 11 and 12 output the interpolated data (1x) a (+, Jl and xa
(1+I+J) is sent to the multiplication circuit 14 via the addition circuit 13.
Output to.

Therefore, the multiplier circuit 14 receives interpolated data a(1*x, J) having a value expressed by the following equation (3).

This means that the four sampling points P (IIJ), P (1,114, ,
Of P (1++・Jul) and P(1・J・1)・
Sampling data a(IIJ) and a(+, l, J) of sampling points P'(IIJ) and P(+01T J) aligned in the horizontal direction (that is, in the X direction) are weighted by coefficients 1-x and By interpolating the sampling points P(1+J) and P(++l+J), we can obtain the interpolated data a(14X, J) of the point P(14XIJl), which is internally divided by weighting coefficients 1-x and X. means.

Similarly, multiplier circuits 15 and 16 output sampling data a
(++J+ll and a(1+lIJ.), are weighted by coefficients 1-x and X, respectively, and then output to the multiplication circuit 18 via the addition circuit 17.

As a result, the multiplication circuit 18 receives interpolated data a(++X, J, . . . ) having a value expressed by the following equation (3).

This means that the four sampling points PII+J), P
<I+l+J) , P (+.l+ a++> and P
II+J. 1), sampling data a(1+J41) and a++41+ of sampling points P CI+ J*l+ and P (il+ J411) arranged in the horizontal direction
J. 6. is weighted by interpolating with coefficients 1-x and
J. 1. The weight is given by the point P (
14XIJ*+) interpolation data a (f4X+ Jul)
means to obtain.

The weighted coefficient generation circuit 19 receives the weighted coefficient y, creates a weighted coefficient ly, and outputs it to the multiplication circuit 4.

The multiplier circuits 14 and 18 weight the interpolated data a(14X+J) and a(faxn Jul) using coefficients ty and y, and then output them via the adder circuit 2o.

As a result, through the adder circuit 20, interpolated data a(lli

This can be confirmed by interpolating the interpolated data a (1*X+ J) and a(1*Xv J411 expressed by equations (8) and (9) with weighting coefficients 1-y and y. Interpolated data a(14X+J) and a(+*X+ Jul)
The points P (+ , x * J) and P (++
The weighting is the interpolated data a (+*x+
Jay) is obtained, thus four sampling points P(In J), P(11J1.J)
, P (Il+ Jl1) and P (II Jl), interpolated data a (1*x+ J+F) can be obtained by linearly interpolating the point P(1*x+J.,).

On the other hand, the second interpolation calculation processing circuit 5 selects four sampling points P, 1 . Ha, P(++l+J), P(++J.

1. and P(++I+J.I, sampling data b
(++J), b(++I+J), b(1+ Jl1
1 and b (101 + J * l 1 are located on the sine curve, and by performing interpolation calculation processing (hereinafter referred to as sine curve interpolation) by approximating that the angular intervals are π/2 apart from each other, Interpolated data ') II *XI J, yl of the desired point P(14X, J.,) is obtained.

Here, as shown in FIGS. 5 and 6, the sampling data blI+J) and b(1*l+J) of the sampling point P (+, □, and P full+ J) correspond to the curve L1
If the angular interval is π/2 apart, then the points corresponding to sampling data b, mountain C and b(Ill, C) are located on the circumference of radius T represented by curve f%91L2. If plotted, sampling data b, 1.
The values of □, and b(+.3.7.) can be expressed using the N-axis coordinates of the orthogonal coordinate axes M and N that pass through the center.

In other words, if the radius γ of the circumference is taken as the value expressed by the following equation 5% (11), then the sampling data b(1, J
) and b (l*I+J) are the following equation 5%) Therefore, the sampling point b(1
, J) and b(++l+J) are weighted by coefficients X and 1-X
The point P (1 * x, J) to be interpolated with should be expressed on the circumference at a position separated from the sampling point P (1 + Jl by an angular interval πx/2 in the direction of the sampling point P (+.11,) comes out.

Therefore, the interpolated data b (菖萬+J) of the point P (++lj+J) can be expressed by the following formula % formula % (14), and by substituting formulas (12) and (13), the following formula % formula % (15) Therefore, in this embodiment, as shown in FIG.
, P t+. Sampling data b+1+J corresponding to In Jul> and P(++J.l), b L
I. 1111, b(1・1・J・−) and b(1−・
Regarding 1) - By executing two-dimensional sine curve interpolation, the interpolated data of point P (14XI Jay)') (
141117ay).

That is, as shown in FIG.
and 26 are weighted by a factor X, each with a value of 5 in (
xπ/2) and cos(xπ/2) (i.e. 5in(
The weighting of (1x) π/2) creates a coefficient.

The multiplier circuits 27 and 28 receive sampling data b+1+Jl and b(11) obtained through the subtraction circuit 3.
IIJl is received, weighted with coefficients cos(xπ/2) and 5in(xπ/2), and outputted to the multiplication circuit 30 via the addition circuit 29.

Therefore, in the multiplication circuit 30, as shown in equation (15), the sampling point P(++Jl and P(1, 11,).

Sampling data b(++Jl and l)(++I
+J), the weighting is the coefficient cos(xπ/
2) and by interpolating with 5in(xπ/2),
Sampling points P Tl, Jl and P (1+l+
The weighting of Jl is the point P(
++x, J) interpolated data b (1+x, J) is obtained.

On the other hand, the multiplier circuits 32 and 33 output the sampling data b peaks 1.9, . and b(1°IIJl), weighted by coefficients cos(Xπ/2) and 5in(xπ/2), and then outputted to the multiplication circuit 35 via the addition circuit 34.

Therefore, the multiplier circuit 35 has sampling points PC1 and J.
-1) and P(1・l+J・eye sampling data b
+1+J,, ) and b (+ + I + J 411
The weight is the coefficient cos(xπ/2)
By interpolating with Interpolated data b(I
□+ 1*+> is obtained.

The weighting coefficient circuits 36 and 37 are based on the weighting coefficient y, and the weighting is based on the coefficient 5inO'π/2) and cos ()
'π/2) (that is, sin ((1)F)π/2)).

Multiplying circuits 30 and 35 each receive interpolated data b+1
+X* J) and b, 1. x, 1°l> is weighted by coefficients cos (yπ/2) and 5inO'π/2), and then output via the adder circuit 38.

Therefore, via the adder circuit 38, the point P (14X+J
l and P (1*x+J, 1) interpolated data b(1*x
, J) and b(+*x+ J*H are weighted by coefficients cos()'π/2) and 5inO'π/2)
By interpolating the points P (I□+J) and P (1◆
*F) interpolated data b(lawn Jlyl can be obtained).

The adder circuit 40 sequentially weights the sampling points P(++J), Pn** obtained by changing the coefficients X and y from the first and second interpolation processing circuits 4 and 5.
, n, P(1+I+J+1) and P
(Interpolated data of point P (1*x+J+y) in IT Jl1+ a(IIIXI Jay) and s, 1.8+J
41/l are added sequentially to obtain the interpolated data of the value expressed by the following formula % formula % at the relevant point P(1+, +J+1
1) is output as image data D(1+x+J.y).

Thus, the interpolated data a(i
x, J. By adding and outputting the interpolated data b(++X+J) obtained by sine curve interpolation to the interpolated data b(++X+J
Compared to the conventional image data between actual sampling points P(+ and J1), image data D(1
4XI JAF) can be obtained.

Since the interpolated data b (ix + Jay) to be further added is obtained by sine curve interpolation, the calculation process for the sine curve interpolation can be performed simply by using the image data of two adjacent sampling points, as in the case of linear interpolation. can be executed.

Therefore, without increasing the number of sampling points required for interpolation calculation processing, image data D tr+w with small errors can be obtained.
r J4Vl can be obtained, and a data processing device with an overall simpler configuration can be obtained accordingly.

Here, as shown by curves L3, L4, L5, and L6 in FIG. 9, the frequency characteristic Gl(ω
) is weighted to obtain interpolated data a (14 + Jar), so the frequency consistency on the high frequency side deteriorates depending on the values of coefficients X and y.In other words, as shown by curve L3, weighting is and when y is the value 0 (that is, when outputting interpolated data a (14X+J.a) on sampling point P (IIJl)),
When the gain is 1, the frequency characteristics are flat, and the weighting is applied when the coefficients X and y are each 0.5 (i.e., four sampling points
, P (+*l+ Jl1) and P (++J...), when outputting the interpolated data a (+-parallel/Jay) of the center point P (1-wing/Jny>), the gain decreases on the highest frequency side. do.

At this time, the weighting is such that when the coefficients ), when the angular frequency is f,/4, the gain is 1/σ, and when the frequency is f,/2, the gain is O.

On the other hand, in FIG. 10, curves L7, L8, L9
As shown by and LIO, the frequency characteristic G2(ω) of the second interpolation processing circuit 5 is such that the gain on the high frequency side and the low frequency side is weighted around the frequency f, /4 with respect to the sampling frequency f3. varies reciprocally depending on the values of coefficients X and y.

In other words, when the frequency f is /4, the gain is 1, and the weighting is such that when the values of coefficients X and y are 0, the gain is 1 as shown by curve L7.
When the weighting coefficients X and y have a value of 0.5, the gain changes the most with respect to a change in the spatial frequency.

At this time, when the frequency is 0, the gain becomes σ, and the frequency fs
/2, the gain becomes 0 and the gain G2(ω) changes as expressed by the following equation.

In this embodiment, the first and second interpolation processing circuits 4
The weighting at which the frequency characteristics GHω) and 02(ω) of GHω) and 02(ω) of 5 and 5 deteriorate the most is when the values of coefficients By selecting the frequency characteristic Fl(ω) of the digital filter circuit 2 so that K+J*V) is obtained, even if the weighting coefficients X and y change, the frequency characteristic remains within a practically sufficient range. Flat image data D
(IIIXI JAF).

In other words, the weighting is such that the transfer function H(ω) of the data processing device 1 when the coefficients When satisfying acosω = 1 (21), image data D(1
+z, )□ can be obtained.

Therefore, by substituting equation (5) into equation (21) and transforming it, the frequency characteristic Fl of the digital filter circuit 2 is expressed by the following equation:
(ω) and the associated frequency characteristic F of the output of the subtraction circuit 3
2(ω) can be obtained.

That is, as shown in FIG. 11, in the frequency band below the frequency f, 74, the digital filter circuit 2, the digital filter circuit 2, and the subtraction circuit 3 constitute a low-pass filter circuit and a bypass filter circuit, respectively, and the frequency In a frequency band of f,/4 or more, a filter circuit whose gain gradually increases and becomes infinite at frequency f3/2 may be used.

In practice, image data is composed of signal components in a frequency band of frequency f, 72 or less, and the frequency characteristic Fl(ω) of the digital filter circuit 2 is set within a range where a display image with a practically sufficient resolution can be obtained. Just do it.

According to experiments, the frequency characteristics of the digital filter circuit 2 are weighted so that when the values of the coefficients X and y are each 0.5, the transfer function H(ω) of the data processing circuit l becomes 1 By selecting Fl(ω), it is possible to obtain the image data DtI*x+J*a, which has a sufficiently small error for weighting even if the values of the coefficients X and y change, and thus the image quality of the displayed image deterioration can be prevented.

According to the above configuration, by adding the interpolated data obtained as a result of sine curve interpolation to the interpolated data obtained by linear interpolation to obtain image data, the image between the actual sampling points is adjusted by the amount of sine curve interpolation. It is possible to reduce errors in image data that has been subjected to interpolation calculation processing.

Furthermore, in sine curve interpolation, as in the case of linear interpolation, interpolated data between two adjacent sampling points can be obtained by simply using the image data of two adjacent sampling points, so the image data required for interpolation calculation processing is It is possible to obtain a data processing device that can perform interpolation calculation processing without increasing the number of data, and thus can obtain image data with few errors with an overall simple configuration.

In this way, it is possible to prevent a decrease in resolution as a whole to the extent that errors are reduced, and to obtain a special effects device with less N quality reduction.

In practice, the sampling frequency r is often selected to be 4fsc, which is four times the subcarrier frequency fsc of the chroma signal, and thus the frequency fc/4 (fs
By setting the characteristics of the digital filter circuit so that the frequency characteristics of c) are flat, it is possible to effectively prevent deterioration in the quality of the displayed image.

In addition, in the above-mentioned embodiment, a case was described in which calculation processing is performed assuming that the angular interval between two sampling points is π/2 during sine curve interpolation, but the present invention is not limited to this. may be changed to π/3, π/4, etc. as necessary.

Furthermore, in the above embodiment, a case has been described in which the digital filter circuit and the subtraction circuit are used to supply sampling data to the first and second interpolation processing circuits, but the present invention is not limited to this. , the first and second interpolation processing circuits may be provided with separate filter circuits.

Also, regarding the frequency characteristics of digital filter circuits (
It is possible to select various values within a practically sufficient range, not only when the characteristics of equations (22) and (23) are satisfied.

For example, the sampling frequency of image data is 3f, which is three times the subcarrier frequency rsc of the chroma signal.
If sc is selected, the sampling frequency f,
, the frequency f! instead of the frequency fs/4. /3 image data D+1°X+J. ,.

If the characteristics of the digital filter circuit are selected so that the level of is set to 1, it is possible to obtain a display image with little deterioration in image quality in practical use.

Furthermore, in the above-described embodiment, a case has been described in which two interpolation calculation processing circuits for linear interpolation and sine curve interpolation are used, but the present invention is not limited to this. In addition, a third interpolation calculation processing circuit is provided, and the interpolation data obtained from the third interpolation calculation processing circuit is added to the interpolation data obtained from the interpolation calculation processing circuits for linear interpolation and sine curve interpolation. It's okay.

By doing so, it is possible to further reduce errors with respect to actual image data.

Furthermore, in the above-described embodiments, a case has been described in which the present invention is applied to a data processing device that processes two-dimensional image data, but the present invention is not limited to this. Based on this, the present invention can be widely applied to data processing devices that obtain interpolated data between the sampling points.

In this case, conventionally, for example, when obtaining interpolated data between sampling points using a quadratic curve, the higher the dimensional sampling data (3D, 4D, etc.), the more the number of sampling data required for the interpolation calculation process. 41
．． 43... and increases exponentially. However, if the present invention is applied, the number of sampling data required for the interpolation calculation process can be reduced to 8 in 3 and 4 dimensions, respectively.
Interpolated data with few errors can be obtained with as few sampling data as 16 and 16.

Effects of the Invention As described above, according to the present invention, by performing sine curve interpolation in addition to linear interpolation, it is possible to obtain interpolated data between sampling points with an overall simple configuration and less error.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a data processing circuit according to an embodiment of the present invention, FIG. 2 is a block diagram showing its first interpolation calculation processing circuit, and FIGS. 3 and 4 are explanations of linear interpolation calculation processing. Figures 5, 6, and 7 are route maps for explaining the sine curve interpolation calculation process, Figure 8 is a block diagram showing the second interpolation calculation processing circuit, and Figure 9 is a block diagram showing the second interpolation calculation processing circuit. 1
FIG. 10 is a characteristic curve diagram showing the frequency characteristics of the second interpolation calculation processing circuit; FIG. 11 is a characteristic curve diagram showing the frequency characteristics of the digital filter circuit; FIG. 12 is a route map for explaining conventional linear interpolation calculation processing. 1...Data processing circuit, 2...Digital filter circuit, 3...Subtraction circuit, 4.5.
...Interpolation calculation processing circuit, 10.19.25.26
．． 36.37... Weighting is coefficient generation circuit, 11.
12.14.15.16.18.27.28.30,3
2.33.35... Multiplication circuit, 13.17.2
0.29.34.38.40...Addition circuit.

Claims (1)

[Claims] The above-mentioned sampling is performed by linearly interpolating the sampling data outputted from the first and second filter circuits, which limit the frequency characteristics of the sampling data to predetermined frequency characteristics, and the first filter circuit. By performing sine curve interpolation on the sampling data output from the first interpolation calculation processing circuit that outputs the first interpolation data between the sampling points of the data and the second filter circuit, A data processing device comprising: a second interpolation calculation processing circuit that outputs the second interpolation data; and an addition circuit that adds the first and second interpolation data.