JPS63245081A - Digital data recording system - Google Patents

Abstract

PURPOSE:To eliminate a need of new design of a signal format for digital data recording and reproducing by constituting digital data as a multilevel code sequence and recording each code of this sequence instead of a video signal at the same sample transmission speed as the video signal. CONSTITUTION:Digital data is constituted as a multilevel code sequence, and each code of this sequence is recorded as the signal of the level of the multilevel video signal instead of the video signal in frame or field units at the same sample transmission speed as the video signal. Consequently, digital data recording and video signal recording are arbitrarily selectively used in one frame or one field unit. Thus, it is unnecessary to newly design a signal format for digital data recording and reproducing, and only a simple circuit is added to a reproducing device to reproduce data.

Description

TECHNICAL FIELD The present invention relates to a digital data recording system, and more particularly to a digital data recording system in a transmission system in which video signals are recorded as sample values on a recording medium and reproduced.

BACKGROUND ART In recent years, new television signal transmission systems have been proposed for the purpose of high image quality or high efficiency transmission. One of them is MUSE (Multiple Sub-Nyqu), which samples the video signal, performs various processing, and transmits the resulting sample
There is a multiplex sub-sampling transmission method called (1st Sampling Encoding)
(See Publication No. 6994). Here, the various processes include, for example, time axis compression/time division multiplexing of luminance signals and color signals, signal band compression processing using sub-Nyquist sampling, and the like. Such a transmission method can also be applied to a recording/reproducing system using a recording medium such as a video disc.

On the other hand, video discs have high utility value as video files, and in this case, if digital data can be recorded along with video signals, they can be expected to be used in a wider range of fields. Although it is possible to achieve such functions using conventional transmission methods, it is necessary to design a new signal format for recording and reproducing digital data, and a separate reproduction device exclusively for digital data is required. It will have to be established.

Summary of the Invention The present invention has been made in view of the above-mentioned points, and it is not necessary to newly design a signal format for recording and reproducing digital data, and moreover, it is necessary to add a simple circuit to the reproducing device. The purpose is to provide a reproducible digital data recording method.

The digital data recording method according to the present invention is a transmission method in which a video signal is recorded as a sample value on a recording medium and is reproduced.The digital data is converted into a multi-value code sequence, and each code of this code sequence is converted into a multi-value code sequence. It is characterized in that a video signal level signal is recorded in frame or field units instead of the video signal at the same sample transmission rate as the video signal.

The digital data recording method according to the present invention is further characterized in that identification code information indicating that the recorded signal is digital data is multiplexed and recorded during the vertical retrace period preceding the recorded frame or field. It is said that

Example Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram showing an embodiment of a recording device to which a recording method according to the present invention is applied, and shows an example of recording a high-definition television signal on a video disc using a multiple subsample transmission method. It shows. According to the above transmission method, the video signal is 16. Since the sample values are transmitted at a transmission rate of 2 Mbaud, the required transmission band is 8.1 MHz, and the sample values are transmitted satisfactorily by waveform shaping by low-pass filters on the transmitting and receiving sides.

In FIG. 1, a high-quality television signal (hereinafter simply referred to as a video signal) with a bandwidth of 8.1 MHz obtained by the above transmission method is supplied to a pre-emphasis circuit 1, and after being pre-emphasized, a switch SW 1 is selectively supplied to the time division multiplexing circuit 2.

On the other hand, the PCM-converted audio signal is supplied to the error detection and correction encoding circuit 3, where processing such as addition of error detection and correction codes is performed. The binary data outputted from the error detection and correction encoding circuit 3 is supplied to the quaternary encoding circuit 4, where it is divided into 2-bit units and converted into a quaternary code series, thereby being quaternary encoded. A Gray code is used as the four-valued code, so that even if an error occurs in an adjacent level during level identification, the number of bit errors will be 1 bit. That is, as described below, <,00.01°11.10
The 2-bit codes of 1 and 2 are sequentially associated with each of four different levels.

The four-level encoded data is supplied to the time axis compression circuit 5 to perform time axis compression, and is intermittently compressed during two vertical retrace periods (75 lines in total) during the MUSE signal 17L/-m period (1125 lines). Sampling clock frequency 16.
It is output at a speed of 2MHz. In addition, the time axis compression circuit 5
does not necessarily need to be placed after the quaternary encoding circuit 4, but may be placed before it.

The output of the time axis compression circuit 5 is supplied to a four-level conversion circuit 6. The 4-level circuit 6 outputs 4-valued numbers 00°01, 11 .
10 levels each. Level 1. Level 2 and Level 3
correspond to each level. That is, as shown in FIG. 2, while the video signal represents one sample value at an 8-bit level (256 levels), the audio signal represents
Only 70% of the video signal is used, for example, 38 levels (level 0) and 98 levels (level 1) of the video signal.
, 158 level (level 2), and 218 level (level 3). When the level range of the audio signal is increased (closer to 100%), overgenito and undershoot occur due to the effect of pre-emphasis, which occupies more frequency bands of the recording signal than necessary, which tends to cause distortion. On the other hand, if it is made smaller, the data S/N deteriorates and the influence of noise on four-level discrimination increases. Therefore, it is preferable to use a range of around 70% as in the embodiment.

Further, digital data to be recorded in place of the video signal is supplied to a 4-value encoding circuit 7, and is divided into 2-bit units and converted into a 4-value encoding series, thereby being converted into 4-value encoding. As this four-value code, a Gray code is used as in the case of the audio signal, and two-bit codes of 00, 01, 11.10 are sequentially associated with each of four different levels. The contents of the digital data to be recorded include, for example, still image data, highly efficient encoded audio data, character information, and the like. 4-value encoded data is 4
It is supplied to the leveling circuit 8, and as in the case of the audio signal,
4-value video signal level, that is, 38 levels (level O
), 98 level (level 1), 158 level (level 2)
) and 218 level (level 3). The output of the 4-level circuit 8 is the switch SW1.
is selectively supplied to the time division multiplexing circuit 2.

The switch SW 1 is normally fixed to the ■ side, and when recording digital data instead of a video signal, the switch SW 1 is set to the ■ side by a command from the system controller (not shown).
4-level digital data is supplied to the time division multiplexing circuit 2 instead of the video signal. Also,
An occupation code generation circuit 9 is provided that generates identification code information indicating whether the signal to be recorded is a video signal or digital data. In response to the switching command, for example, identification code information of logic "1" when recording digital data and logic "O" when recording video signals is generated. This identification code information is also supplied to the time division multiplexing circuit 2.

The time division multiplexing circuit 2 time division multiplexes the 256-level video signal or 4-level digital data and the 4-level PCM audio data that are selectively supplied by the switch SW+. FIG. 3 shows an example of the structure of one frame of a recording signal obtained by time division multiplexing. In the same figure, line number 44
~567 is the first field video signal period, line number 6
07-1125.1-5 is the second field video signal period. The video signal is a sample value of a luminance signal and a chrominance signal, and is transmitted using 468 samples of sample numbers 13 to 480 on each line. The sample transmission rate is 16.
It is 2Mbaud. Although not shown, a control signal necessary for restoring the video signal is also multiplexed and transmitted using a part of the video signal period. Also, line number 5. A clamp level for reproducing the DC level of the transmitted signal is inserted in a part of 567. The synchronization signals include frame synchronization signals inserted into line numbers 605 and 606 and sample numbers 1 to 12 of each line.
It consists of a line synchronization signal inserted into the

During normal recording, PCM audio data is recorded on 38 lines with line numbers 6 to 43 within the vertical blanking period of the first field of the video signal, and 37 lines with line numbers 568 to 604 within the vertical blanking period of the second field. Out of a total of 75 lines, there are 16. 2Mt+au
Four-value transmission is performed at a transmission rate of d.

In addition, in the present invention, frame synchronization necessary for signal transmission,
Digital data is transmitted instead of the video signal in all periods except for the line synchronization signal period, the clamp level period, and the identification code transmission period described later. This digital data is also the same as PCM audio data < 16.2M
Four-value transmission is performed at a transmission rate of baud. The selection of whether to transmit digital data or a video signal is made by switch SW+ based on a command from the system controller. It is multiplexed onto line number 604 within. This identification code is a code for identifying whether the signal content of the subsequently transmitted frame is video or digital data. This identification code can also be inserted together with other codes (screen number code, etc.) necessary for recording the video disc.

The output of the time division multiplexing circuit 2 is a transmission filter (low-pass filter) 1 composed of, for example, an FIR digital filter.
0 to limit the frequency band to a predetermined width. The output of the transmission filter 10 is converted into an analog signal by a D/A converter 11, and is supplied to an FM modulation circuit 13 via a pre-emphasis circuit 12. In the FM modulation circuit 13, a carrier wave of a predetermined frequency is frequency-modulated by the supplied signal. The output of this FM modulation circuit 13 is output to the limiter 14.
via an E10 modulator (not shown) and recorded on a video disc.

A specific example of a multiplex recording system for PCM audio data in the case where a high-definition television signal is recorded on a video disc using a multiplex subsample transmission system and played back is disclosed in Japanese Patent Application No. 1983 filed by the present applicant. There is one described in the specification of No.-234976. That is, the PCM audio data is set at the same sample transmission rate as the video signal, and 2-bit digital data is recorded using 4-value video signal levels.

In such a multiplex recording system, the multiplexing and recording of digital data is limited only to the vertical retrace period, and the data content is limited to PCM audio data and some additional information, so the scope of use is narrow, so the above-mentioned recording is Depending on the device,
It is possible to record digital data even during the video period, and by selectively using it, it can be used widely as a video/data file.

FIG. 4 is a block diagram showing the configuration of a signal processing circuit in a reproducing apparatus for a video disc recorded as described above. In the same figure, F
The M signal is frequency demodulated by an FMI circuit 21, high-frequency noise is removed by a reception filter (low-pass filter) 22, and waveform shaping is performed on the M signal. The signal is supplied to the resampling circuit 25. A synchronization detection circuit 23 detects synchronization signals such as a line synchronization signal and a frame synchronization signal from the output of the reception filter 22, and generates various timing signals necessary within the apparatus. The resample clock generation circuit 26 has a PLL circuit configuration, for example, and generates an accurate sample clock from the detection output signal of the synchronization detection circuit 23 and supplies it to the resample circuit 25. The resampling circuit 25 resamples the output of the receiving filter 22 based on this resampling clock and converts it into a digital signal.

The identification code separation circuit 24 separates the identification code contained in the output of the reception filter 22, decodes it, and supplies it to the controller 27. Based on this identification code, if the signal content of the frame to be subsequently reproduced is digital data, the controller 27 sets a flag to that effect and controls the switch SW2 for selecting the signal processing system. Even when a vertical retrace period is detected in the synchronization detection circuit 23, a flag to that effect is set and the switch sw2. for signal processing system selection is activated. Controls switching of sw3. The switch SW2 selects the signal processing system depending on whether the signal to be reproduced is a video signal or digital data, and selects the ■ side when neither the vertical retrace period nor the frame in which digital data is recorded, and resampling is performed. The output of the circuit 25 is supplied to a video processing circuit 28. The video processing circuit 28 is a multiple sub-sampling decoding processing circuit. The original video signal decoded by the video processing circuit 28 is converted into an analog signal by a D/A converter 29 and supplied to a monitor (not shown) or the like.

On the other hand, in the case of a vertical retrace period or a frame in which digital data is recorded, switch SW2 selects the ■ side;
The output of the resample circuit 25 is supplied to a level discrimination circuit 30. The PCM audio data or digital data supplied to the level identification circuit 30 is identified in the circuit 30 as to which of the four levels mentioned above, and
Converts to value symbol. Further, in the case of the vertical retrace period, the switch SW3 selects the ■ side, whereby the four-value encoded PCM audio data is supplied to the audio demodulation circuit 31. The audio demodulation circuit 31 performs signal processing that is the opposite of that during recording, that is, time axis expansion, conversion from four-value encoding to normal binary encoding, error detection and correction, and other processing. Further, in the case of digital data other than the vertical retrace period, the switch SW3 selects the ■ side, whereby the digital data encoded with four values is supplied to the data processing circuit 32. In the data processing circuit 32, data processing is performed in the opposite manner to that during recording, ie, processing such as conversion from a four-valued symbol to a normal two-valued symbol.

Note that the selection of the signal processing system by switch SW3 is not necessarily limited to the above method, and depending on the application,
In a frame in which digital data is recorded, it is possible to record data in the same format during the vertical retrace period.In this case, another identification code is multiplex recorded, and this is identified during playback to switch SW3. It is also possible to always select the ■ side.

As is clear from the configuration of the playback device described above, according to the digital data recording method according to the present invention, by simply adding the identification code separation circuit 24 and the data processing circuit 32 to the conventional circuit configuration, the system can be multi-faceted. Functionality can be achieved.

In the above embodiment, a case has been described in which signals to be recorded are selected on a frame basis, but it may also be made on a field basis, and in this case, the identification code may be inserted once in one field. In addition, the number of multi-values for data transmission may be other than 4, and in short, depending on the SN ratio and transmission characteristics of the transmission system,
It is sufficient if a sufficiently small error rate can be obtained.

As described in detail, according to the digital data recording method of the present invention, digital data is converted into a multi-value code sequence, and each code of this code sequence is converted into a video signal as a multi-value video signal level signal. Since recording is performed in place of the video signal at the same sample transmission speed, recording of digital data and recording of the video signal can be arbitrarily selected and used in units of one frame (or one field), and the recording of digital data and There is no need to newly design a signal format for reproduction, and reproduction can be performed by simply adding a simple circuit to the reproduction device.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a recording apparatus to which the recording method according to the present invention is applied, FIG. 2 is an explanatory diagram of the signal level of a recording signal, and FIG. 3 is a configuration diagram of one frame of a recording signal.
FIG. 4 shows signal 2 in a device for reproducing signals recorded by the device shown in FIG. 1. Time division multiplexing circuit 4.7 Quaternary encoding circuit 6.8. ...Four level circuit 9...Identification code generation circuit 13...FM modulation circuit 21...F
M demodulation circuit 23...Synchronization detection circuit 24...Identification code separation circuit 28...Video processing circuit

Claims (4)

[Claims] (1) Record the video signal as a sample value on a recording medium,
A digital data recording method in a transmission method for reproducing the digital data, wherein the digital data is a multi-value code series, and each code of this code series is used as a multi-value video signal level signal to transmit the same sample as the video signal. A digital data recording method characterized by recording in frame or field units instead of video signals depending on the speed. (2) The digital data recording method according to claim 1, wherein the digital data is recorded in the same format during the vertical retrace period. (3) Record the video signal as a sample value on a recording medium,
A digital data recording method in a transmission method for reproducing the digital data, wherein the digital data is a multi-value code series, and each code of this code series is used as a multi-value video signal level signal to transmit the same sample as the video signal. Depending on the speed, recording is performed in frame or field units instead of video signals, and identification code information indicating that the recorded signal is digital data is multiplexed during the vertical retrace period preceding the recorded frame or field. A digital data recording method characterized by recording. (4) The digital data recording method according to claim 3, wherein the digital data is recorded in the same format during the vertical retrace period.