JPS63240828A - Video endoscope - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video endoscope equipped with means for correcting driving conditions for signal cables of different lengths.

[Prior art 1] In recent years, optical endoscopes (also called fiberscopes) that transmit an optical image formed by an objective lens at the distal end of the insertion section to the proximal side using an image guide formed by a fiber bundle have been developed. Instead, the optical image formed by the objective lens is photoelectrically converted into an electrical signal by a solid-state Il&element (hereinafter referred to as D) such as a charge-coupled device (hereinafter referred to as COD), and then transmitted to the hand side. However, electronic endoscopes (hereinafter also referred to as electronic endoscopes or video endoscopes) that can be displayed on a color monitor via a video camera have come into practical use.

The above video endoscopes are available depending on the purpose of use.
The length of the insertion portion that can be inserted into a body cavity or a lumen differs. For this reason, the lengths of the signal cables that are inserted into the insertion section and the universal cord extending from the rear end of the insertion section and reach the (video processor or) camera control unit, etc., are also different.

If the length of the signal cable is different, the resistance value of the entire signal cable will be different, which may cause a difference in the output gain of the SID, a variation in S/N, or a change in the impedance at the end of the cable. If a part of the cable is connected to the camera control unit, the waveform may become distorted due to reflection, there may be a difference in the delay amount of the SID drive pulse from the camera control unit, or the video output from the SID may Differences may occur in the amount of signal delay. For this reason, for example, in Japanese Patent Application Laid-open No. 60-80429, a matching circuit is built into the connector of an electronic scope to prevent waveform distortion.

[Problems to be Solved by the Invention] In the conventional example described above, the drive signal generation means for reading signals from the SID is installed on the camera control side, so multiple cable lines required for signal reading are required. It becomes necessary to pass the cable through almost the entire area inside the insertion section, and therefore, a large number of adjustment points for phase shift based on differences in cable length are required.

Furthermore, a large number of cable lines are required, which complicates the structure of the insertion section and also increases the outer diameter of the insertion section.

The present invention was made in view of the above-mentioned points, and an object of the present invention is to provide a video endoscope that requires fewer adjustment points and that can hit the structure of the torle entry part.

[Means and effects for solving the problem] In the present invention, by providing a drive circuit near the SrD without reading signals from the SiD, it is possible to simplify the number of adjustment points and reduce the number of signal cables inserted into the insertion section. That's what I do.

[Example 1 Hereinafter, the present invention will be specifically explained with reference to the drawings.

Figures 1 to 3 relate to the first embodiment of the present invention.
The figure shows the structure of the first embodiment, FIG. 2 shows the structure of the drive circuit, and FIG. 3 shows the structure of the video signal processing circuit.

As shown in FIG. 1, a video endoscope device 1 equipped with a first embodiment has a video endoscope 3 having an elongated insertion section 2, a connector receiver 4 to which this video endoscope 3 can be connected, and a video endoscope device 1 having a first embodiment. A camera control unit (or video processor unit) 5 that houses a processing means, and this camera control unit (hereinafter referred to as CC).
It is written as U. ) 5 and a color monitor 6 which takes in the video signal outputted from 5 and displays it in color.

The video endoscope 3 includes an elongated insertion section 2 that can be inserted into a body cavity or a lumen, and the insertion section 2.
It consists of a large operating section 7 connected to the rear end of the controller, and a universal cord 8 extending from the operating section 7.

An objective lens 9 for imaging the subject is disposed on the distal end side of the insertion section 2, and the focal plane of this objective lens 9 has a C
The imaging surface of the solid-state image device (SID) formed with CD11 (
It is arranged so that the light-receiving surface (light-receiving surface) faces the camera. The objective lens 9 and the CCD 11 constitute an imaging means. In other words, the objective lens 9 creates an optical image of the object (, CD11
The optical image formed on this imaging surface is photoelectrically converted into an electrical signal.

A drive circuit 12 is housed near the CCD 11 at the distal end of the insertion section 2 housing the CCD II, which applies a drive pulse for signal reading to the CGD II.

Inside the insertion section 2 is a light guide 13 that transmits illumination light.
The light guide 13 is inserted through the universal cord 8 so that illumination light from a light source section 14 in the CCU 3 is supplied to a light guide connector portion attached to the CCU 3. Therefore, the illumination light transmitted by this light guide 13 is connected to the objective lens 9 and S
The object to be imaged by the ID 11 can be illuminated.

A signal transmission cable 15 is inserted into the insertion portion 2 and the universal cord 8, and a connector 16 formed at the end of the universal cord 8 is connected to the connector receiver 4 of the CCU 3.
By connecting to the video endoscope 3 and G
O(J5).In other words, the clock signal CLK generated from the tarlock generator 17 in the CCUS passes through the matching circuit 18 to the signal cable of the connector 16 attached to the connector receiver 4. 15 and is input to the drive circuit 12.

Further, by applying the drive signal of the drive circuit 12, the CGD
The signal S read from II is transmitted to CCLJ5 via signal cable 15, passed through matching circuit 18, and inputted to video signal processing 20.

The video endoscope device 1 according to the first embodiment uses, for example, a frame-sequential color image conveyance system, and the light source section 14 transmits white light from a white lamp 21 to a motor 2.
After passing through a rotary filter 23 rotated by a rotary filter 23, the illumination light is converted into red, green, and blue illumination light, and then condensed by a lens 24 and irradiated onto the incident end surface of the light guide 13.

Further, the signal S read out from the 5ID 11 passes through the 7 switching circuit 18 and is manually inputted to the video No. 0 processing circuit 20.
A bond processed with a video signal, for example RG, is converted into a three-color signal and displayed on an RGB compatible color monitor 6.

The configuration of this video signal processing circuit 20 is shown in FIG. After the signal component is zumble-held, the correction circuit 32 performs γ correction and A/
The D converter 33 converts the signal into a digital signal. Thereafter, the signals transmitted under the sequential illumination of R, G, and B through the multiplexer 34, which is switched by a signal from a timing generator (not shown) synchronized with the rotation of the rotary filter 23, are transferred to the R frame memory 35R, the G frame memory 3
5G, written to the B frame memory 35B. The signal data written in each of these frame memories 35R, 35G, and 35B are simultaneously read out and converted into analog color signals R, G, and B by the D/A converter 36, respectively, and buffered? 37 and output to the color monitor 6 side.

By the way, in the video endoscope device 1 equipped with the first embodiment, an identification circuit 41 for identifying the video endoscope 3 attached to the CCtJ5 is provided in the CCUs, and a type for identification is provided on the video endoscope 3 side. A signal generation circuit 42 is provided.

, be.

The type signal generating circuit 42 is configured by connecting resistors r having different resistance values depending on the lengths of the insertion portion 2 and the universal cord 8 to two connection bins in the connector 16, for example. , the resistance value is determined, a determination signal is output, and the matching circuit 18 is switched to a matching state corresponding to the connected scope.

By the way, the clock signal @CLK of the clock generator 17
The configuration of the drive circuit 12 to which is input is not shown in FIG. The clock signal CLK input to the drive circuit 12 is applied to one input terminal of the comparator 44, and is compared with the voltage (2) of the voltage source 45 applied to the other input terminal, and is output.

The clock signal CLK uses a sine wave with the period equal to the clock signal CLK so as not to generate unnecessary radiation waves such as harmonics, and is a square wave whose zero-crossing point is binarized by the comparator 44. It is compared with the voltage V (-0) which is the threshold value for outputting.

In this embodiment, the binary output level of the comparator 44 does not change even if the cable ring is different and the level of the clock signal eCLK changes because the signal is binarized into a square wave at the zero-cross point. It has the following characteristics.

The output signal of the comparator 44 is inverted and amplified, and the output signal of the comparator 44 is amplified by the horizontal clock pulse signals φ111 and 180"
Horizontal clock pulse signals φH2 having different phases are generated.

Further, the output signal of the comparator 44 is transmitted to the differentiating circuit 4.
After being differentiated by 8, the current is amplified by a non-inverting amplifier 49, and then further passed through a voltage shift circuit 50 to generate a reset gate pulse signal φR.

The COD used in this embodiment requires a constant bias value as the reset pulse signal φR, and the output potential of the comparator 44 is shifted by about +3V, for example. This voltage shift circuit 50 also has a current amplification function, and outputs a current amplified reset pulse signal φR.

Output signal φ111 of the drive circuit 12. φ112. φR
The vertical clock pulse signal φV transmitted through the signal cable 15 using a shuttle is applied to the CCD 11.

The signal S is output from CGDII.

Signal φ111°φ generated by the drive circuit 12
112. φR is different from the clock signal QC when the cable length is different.
Although the amplitude of LK varies, it is characterized in that it is generated based on a signal binarized by the comparator 44 at a zero-cross level that is independent of the cable length.

Note that the vertical clock pulse signal φ■ has a large period and is less affected by phase shift changes due to cable length.
A vertical pulse of the clock generator 17 in the circuit 3 is applied via the signal cable 15 after an impedance change is performed in the matching circuit 18. (In addition, in this vertical clock pulse signal "/JφV, since its frequency is low, the impedance change B> due to the difference in cable length is small, so matching may be simplified to only one type, etc.) The pulse signal φV generally represents a plurality of different phases.

According to the first embodiment configured in this way, the drive circuit 1
2 near the CCD 11 to optimize the driving conditions, it is possible to reduce the number of signal lines required without reading from the CCD 11. Moreover, the drive circuit 12
The number of phase shift adjustment points or phase shifters based on differences in cable length can be reduced compared to the case where the cable is installed on the CCU 3 side.

Furthermore, since the horizontal clock pulse, which has a relatively high frequency, is transmitted as a sine wave rather than a rectangular wave, harmonics included in the case of this rectangular wave are not radiated to the surroundings, and the output signal of the CCD 11 This also eliminates the possibility of contamination and deterioration of S/N.

FIG. 4 shows a second embodiment of the invention.

In this second embodiment, a drive circuit 52 having a function of generating a vertical clock pulse φV is housed at the tip of a video endoscope 51 in addition to the function of the drive circuit 12 in the first embodiment.

The drive circuit 52 is a clock generator 5 in the CCU 33.
After the phase shift of the clock signal CLK of No. 4 is adjusted by the matching circuit 55, the signal transmitted through the signal cable 15' is input. In this case as well, a sine wave with a period equal to the period of the horizontal clock pulse is used as the clock signal CLK, and the phase shifter in the matching circuit 55 corresponding to the cable length is selected by the output signal of the identification circuit 41 for the above-mentioned phase adjustment. Ru. In addition, in this embodiment, a CCD 11 is provided at the tip.
It houses a preamplifier 57 into which the output signal of is input, a clamp circuit 58, and a sample hold circuit 59, and the output of this sample hold circuit 59 is transmitted through a signal cable 15', and is passed through a matching circuit 60 for impedance matching in CCUS. The signal is led to a video signal processing circuit 61.

Further, in this embodiment, the light source section 62 is for white illumination consisting of a white lamp 63 and a condensing lens 64, and the video endoscope 51 is a color type with a mosaic filter 65 provided on the front surface of the CGDll. It consists of an imaging system.

The video signal processing circuit 61 performs mosaic signal processing when a color mosaic is used, and its output becomes an NTSC composite video signal or an RGB color signal output and is displayed in color on the color monitor 13. The rest of the structure is almost the same as that of the first embodiment, and the same components are given the same reference numerals.

In this embodiment, the horizontal O-clock pulse signal φ111°φ1
12 and the reset pulse signal φR, the driving circuit 52 also stores the vertical clock pulse signal φV near the CGD 11.
It is generated by. Therefore, it has the same advantages as the first embodiment, and since only the clock signal CLK of the clock generator 54 and the output signal S read from CGDll are required as the signal cable 15', the structure of the insertion section 2 can be simplified. can be converted into Furthermore, since the correlated double sampling circuit is provided in the vicinity of the CCD 11 together with the drive circuit 52, the output signal S from the CCD 11 is not affected by phase shift due to the signal cable, and the signal components in this output signal S are Reset noise can be reduced by sampling during the period, and a signal with a high S/N ratio can be obtained. Further, in this case, since the output signal S of the CCD 11 is amplified by the preamplifier 57 before being attenuated by the signal cable, the S/N can also be increased by the preamplifier 57. Therefore, in this case, by providing an AGC circuit within the video signal processing circuit 61, the output signal S can be handled without being affected by the cable length.

Further, in this embodiment, since only the frequency of the sine wave signal is transmitted for the transmission of the clock signal CLK, unnecessary radiation waves are not generated from the transmission line of the clock signal CLK. Furthermore, by interposing narrow band pass filters at both ends of this transmission line, for example, it is possible to effectively eliminate other noise from being mixed into this clock signal.

In the second embodiment, depending on the case, the matching circuit 60 for impedance matching may be replaced by 111! There are cases where there is no problem in practical use even if it is similar.

Note that the present invention can be similarly applied to a video endoscope in which a television camera containing an SID is attached to the eyepiece of the fiberscope.

Note that a fiber can also be used as the signal cable.

[Effects of the Invention] As described above, according to the present invention, in a video endoscope in which a solid-state image sensor is housed at the distal end side of the insertion section, a signal captured from the solid-state m-image element is transmitted near the solid-state image element. Since a drive circuit for reading is provided, the number of signal lines for reading signals can be reduced.

[Brief explanation of the drawing]

Figures 1 to 3 relate to the first embodiment of the present invention.
FIG. 2 is a configuration diagram of a video endoscope device equipped with the first embodiment, FIG. 2 is a configuration diagram of a drive circuit, FIG. 3 is a configuration diagram of a video signal processing circuit, and FIG. 4 is a configuration diagram of a video endoscope device according to a second embodiment of the present invention. FIG. 1... Video endoscope device 2... Insertion section 3... Video endoscope 5... Camera control unit (CCU) 6...
・Color monitor 11...CCD12...Drive circuit 15...Signal cable 17...Clock generator 18...Matching circuit 20...Video signal processing circuit

Claims (1)

[Claims] 1. In a video endoscope in which a solid-state imaging device is housed on the distal end side of an insertion section, a drive circuit for optimizing driving conditions of the solid-state imaging device is provided near the solid-state imaging device. A video endoscope that features: 2. Claim 1, wherein the drive circuit for optimizing the drive conditions generates a charge reset pulse and a horizontal transfer clock signal for the solid-state image sensor.
Video endoscope as described in section. 3. The drive circuit for optimizing the drive conditions includes means for binarizing the input clock signal, means for outputting the binarized signal via a buffer circuit, and a means for outputting the binarized signal via a buffer circuit. Claims characterized by comprising means for inverting the signal and outputting it via a buffer circuit, and means for changing the pulse width and phase of the binarized signal and outputting it via the buffer circuit. The video endoscope described in paragraph 1.