JPS63239927A - Hetero-epitaxial structure and forming method thereof - Google Patents
Hetero-epitaxial structure and forming method thereofInfo
- Publication number
- JPS63239927A JPS63239927A JP7351787A JP7351787A JPS63239927A JP S63239927 A JPS63239927 A JP S63239927A JP 7351787 A JP7351787 A JP 7351787A JP 7351787 A JP7351787 A JP 7351787A JP S63239927 A JPS63239927 A JP S63239927A
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- substrate
- single crystal
- compound
- grown
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 25
- 239000013078 crystal Substances 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims abstract description 53
- 150000001875 compounds Chemical class 0.000 claims abstract description 44
- 239000004065 semiconductor Substances 0.000 claims abstract description 27
- 229910021480 group 4 element Inorganic materials 0.000 claims abstract description 9
- 230000000737 periodic effect Effects 0.000 claims abstract description 6
- 230000006911 nucleation Effects 0.000 claims description 31
- 238000010899 nucleation Methods 0.000 claims description 31
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 239000011159 matrix material Substances 0.000 claims 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 10
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 6
- 239000007789 gas Substances 0.000 abstract description 5
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 238000001534 heteroepitaxy Methods 0.000 abstract description 4
- 239000000377 silicon dioxide Substances 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 abstract description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 3
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 abstract description 3
- 239000000919 ceramic Substances 0.000 abstract description 3
- 239000011521 glass Substances 0.000 abstract description 3
- 238000010438 heat treatment Methods 0.000 abstract description 2
- 230000008018 melting Effects 0.000 abstract description 2
- 238000002844 melting Methods 0.000 abstract description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 8
- 229910004205 SiNX Inorganic materials 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004943 liquid phase epitaxy Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 2
- 101100310622 Mus musculus Soga1 gene Proteins 0.000 description 1
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 235000014121 butter Nutrition 0.000 description 1
- DVRDHUBQLOKMHZ-UHFFFAOYSA-N chalcopyrite Chemical compound [S-2].[S-2].[Fe+2].[Cu+2] DVRDHUBQLOKMHZ-UHFFFAOYSA-N 0.000 description 1
- 229910052951 chalcopyrite Inorganic materials 0.000 description 1
- 238000013329 compounding Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は異種基板上に化合物半導体を成長させたヘテロ
エピタキシー素子およびその製造方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a heteroepitaxy device in which a compound semiconductor is grown on a heterogeneous substrate, and a method for manufacturing the same.
[従来の技術]
III −V族およびII −VI族化合物半導体は超
高速電子デバイス、半導体レーザー、発光素子、太陽電
池、光検出器等に広く利用されている。これら化合物半
導体結晶のエピタキシャル成長のためには、Gaへsや
InP等の化合物半導体単結晶基板が用いられている。[Prior Art] Group III-V and group II-VI compound semiconductors are widely used in ultrafast electronic devices, semiconductor lasers, light emitting devices, solar cells, photodetectors, and the like. For epitaxial growth of these compound semiconductor crystals, compound semiconductor single crystal substrates such as Ga, S, and InP are used.
そのために作られた素子も高価なものとなり、また、現
在のところ大面積に亘って均一なGaAs基板を作るこ
とは困難であるために、エピタキシャル成長を用いて大
面積の化合物半導体を製造することは困難となっている
。Elements made for this purpose are also expensive, and it is currently difficult to produce a GaAs substrate that is uniform over a large area, so it is difficult to manufacture large area compound semiconductors using epitaxial growth. It has become difficult.
このような事情から、またStデバイスとの複合化の目
的でIV族(主にSi)から成る、GaAs基板に比べ
れば比較的大きな単結晶基板の上にヘテロエピタキシャ
ル成長させることが試みられている(梅野・曽我: 「
応用物理」、55巻、8号(+986)[発明が解決し
ようとする問題点]
このように従来の化合物半導体へテロエピタキシー素子
では、化合物半導体単結晶基板を用いるので高価であり
、また大面積化が困難であった。For this reason, and for the purpose of compounding with St devices, attempts have been made to grow heteroepitaxially on single crystal substrates made of group IV materials (mainly Si), which are relatively large compared to GaAs substrates ( Umeno/Soga: “
Applied Physics, Vol. 55, No. 8 (+986) [Problems to be Solved by the Invention] As described above, conventional compound semiconductor heteroepitaxy devices use compound semiconductor single crystal substrates, which are expensive and require large area. It was difficult to
Si単結晶を基板としても、その力学的強度から、また
Si、Q1結晶の大面積化の困難から、成長し得る化合
物半導体結晶の面積はたかだか直径6インチ程度が限界
であり、実用上はそれよりかなり小さいものしか得られ
ていない。Even if Si single crystal is used as a substrate, the area of compound semiconductor crystal that can be grown is limited to about 6 inches in diameter at most, due to its mechanical strength and the difficulty of increasing the area of Si and Q1 crystals, which is practically impossible. I've only been able to get something much smaller than that.
本発明はこのような従来の欠点を解消し、大面積上に成
長させた化合物半導体へテロエピタキシー素子を提供す
ること、および簡単な操作で安定して化合物へテロエピ
タキシー素子を製造する方法を提供することを目的とす
る。The present invention eliminates such conventional drawbacks, provides a compound semiconductor heteroepitaxial device grown on a large area, and provides a method for stably manufacturing a compound heteroepitaxy device with simple operations. The purpose is to
[問題点を解決するだめの手段]
このような目的を達成するために本発明は非晶質基板上
に成長させたIV族元素の単結晶と、ケイ素単結晶上に
エピタキシャル成長させた化合物半導体層とからなるこ
とを特徴とする。[Means for Solving the Problems] In order to achieve these objects, the present invention provides a single crystal of a group IV element grown on an amorphous substrate and a compound semiconductor layer epitaxially grown on a silicon single crystal. It is characterized by consisting of.
また本発明は非晶質基板上に成長させた周期表第IV族
に属する原子を母体とする単結晶を有する成長基板上に
化合物半導体を構成する元素を供給して、IV族元素の
単結晶上に化合物半導体層を形成することを特徴とする
。Further, the present invention provides a single crystal of a group IV element by supplying an element constituting a compound semiconductor onto a growth substrate having a single crystal whose host is an atom belonging to group IV of the periodic table grown on an amorphous substrate. It is characterized by forming a compound semiconductor layer thereon.
さらに本発明は非晶質基板に、基板より核形成密度の大
ぎい核形成面(5NOL)を形成し、核形成面(SND
L)に周期表第rv族に属する原子を母体とする単結晶
核を形成し、単結晶を核形成面をこえて非晶質基板の核
形成密度の小さな非核形成面(Ssos)上を覆って成
長させて成長基板を作製する工程と、成長基板上に化合
物半導体を構成する元素を供給して、IV族元素の単結
晶上に化合物半導体層を形成する工程とからなることを
特徴とする。Furthermore, in the present invention, a nucleation surface (5NOL) having a higher nucleation density than the substrate is formed on the amorphous substrate, and a nucleation surface (SND
L) A single crystal nucleus is formed using atoms belonging to group rv of the periodic table as a host, and the single crystal is spread over the nucleation surface to cover the non-nucleation surface (Ssos) with a low nucleation density of the amorphous substrate. and a step of supplying elements constituting the compound semiconductor onto the growth substrate to form a compound semiconductor layer on the single crystal of the group IV element. .
本発明は成長させるべき結晶の核形f&密度(NO)が
、結晶を成長させる面の材質によって異なることを利用
するものである。例えばSi結晶を堆積する場合、Si
O□は小さな核形成密度(NDs)を、SiNは大きな
核形成密度(NDL)を有する。モしてSin2面とS
iN面とを有する基体に結晶形成処理を施せば、この核
形成密度の差(八ND)によって、Si結晶はSiN上
にのみ堆積成長し、Sin、上には成長しない。このよ
うに大きな核形成密度(ND−L)をもち結晶が堆積成
長する面を核形成面(SNDL) 、小さな核形成密度
(NDs)をもち、結晶が成長しない面を非核形成面(
SNos)と称する。この時核形成面(Sso、、)の
面積を単一の核しか発生し得ない程度に十分小さくして
おくと、その単一核より単結晶が成長し“、この単結晶
は核形成面(SNOL)を越えて、非核形成面(SNo
s)上へも成長する。The present invention utilizes the fact that the nuclear shape f&density (NO) of a crystal to be grown differs depending on the material of the surface on which the crystal is grown. For example, when depositing Si crystal, Si
O□ has a small nucleation density (NDs) and SiN has a large nucleation density (NDL). Mo, Sin 2 side and S
If a crystal formation treatment is performed on a substrate having an iN plane, Si crystals will deposit and grow only on SiN and will not grow on Sin due to the difference in nucleation density (8ND). The surface with a large nucleation density (ND-L) on which crystals accumulate and grow is called the nucleation surface (SNDL), and the surface with a small nucleation density (NDs) on which crystals do not grow is called the non-nucleation surface (non-nucleation surface).
It is called SNos). At this time, if the area of the nucleation surface (Sso, ) is made small enough to generate only a single nucleus, a single crystal will grow from that single nucleus, and this single crystal will grow from the nucleation surface. (SNOL) and the non-nucleation surface (SNo.
s) Grow upwards as well.
本発明はこのようにして成長した単結晶上にヘテロエピ
タキシー成金を行うので、化合物半導体のへテロエピタ
キシー成長に特別の大きな単結晶を用いることなく、大
面積のヘテロエピタキシャル成長が可能であり、また位
置と大きさの制御された化合物ヘテロエピタキシャル結
晶を得ることができる。Since the present invention performs heteroepitaxial growth on the single crystal grown in this way, it is possible to perform heteroepitaxial growth over a large area without using a special large single crystal for the heteroepitaxial growth of compound semiconductors. and compound heteroepitaxial crystals with controlled sizes can be obtained.
[実施例] 以下に図面を参照して本発明の詳細な説明する。[Example] The present invention will be described in detail below with reference to the drawings.
第1図は本発明の一実施例として、Si単結晶上にGa
As結晶を成長させたヘテロエピタキシャル構造を作製
する方法を示す工程図である。FIG. 1 shows an embodiment of the present invention in which Ga is deposited on a Si single crystal.
FIG. 3 is a process diagram showing a method for manufacturing a heteroepitaxial structure grown with As crystals.
まず第1図(八)に示す成長基板を準備する。図示する
成長基板1は、高融点ガラス、石英、アルミナ、セラミ
ックスなどからなる下地基板2.下地基板2上に設けた
SiO2膜3および複数のSr単結晶4からなっている
。図中5は単結晶Siを5in2上に成長させるために
用いたSiN膜である。このような成長基板1の作製法
については後に説明する。First, a growth substrate shown in FIG. 1 (8) is prepared. The illustrated growth substrate 1 includes a base substrate 2 made of high melting point glass, quartz, alumina, ceramics, etc. It consists of a SiO2 film 3 provided on a base substrate 2 and a plurality of Sr single crystals 4. In the figure, 5 is a SiN film used to grow single crystal Si on 5in2. A method for manufacturing such a growth substrate 1 will be explained later.
次に成長するGaAs層中にアンチフェイズドメインが
発生するのを防ぐために成長基板1をアルシン(八S+
13)雰囲気中950℃で20分程度熱処理した。Next, in order to prevent the generation of antiphase domains in the GaAs layer to be grown, the growth substrate 1 was changed to arsine (8S+
13) Heat treatment was performed at 950° C. for about 20 minutes in an atmosphere.
そして成長基板温度を420℃とし、反応ガスとしてト
リメチルガリウム(TMG) とAsH,を用い、M
OCVD (有機金属化学気相)法によって、バッファ
用GaAs層6を約120人堆積させた[第1図(B)
]。Then, the growth substrate temperature was set to 420°C, trimethyl gallium (TMG) and AsH were used as reaction gases, and M
Approximately 120 GaAs buffer layers 6 were deposited by the OCVD (organometallic chemical vapor deposition) method [Fig. 1 (B)
].
成膜時のTMGとAs113の比は約1=10であり、
反応圧力は80Torrであった。The ratio of TMG and As113 during film formation was approximately 1=10,
The reaction pressure was 80 Torr.
次に他の条・件は同じままで基板温度を680℃に上昇
し、GaAs層7を6μm成長させた[第1図(C)]
。Next, the substrate temperature was raised to 680°C while other conditions remained the same, and the GaAs layer 7 was grown to a thickness of 6 μm [Figure 1 (C)]
.
こう′して広い面積にわたってSi上にGaAsを成長
させたヘテロエピタキシャル構造を得ることができた。In this way, it was possible to obtain a heteroepitaxial structure in which GaAs was grown on Si over a wide area.
次に第2図を参照して成長基板1の作製法を説明する。Next, a method for manufacturing the growth substrate 1 will be explained with reference to FIG.
高融点ガラス、石英、アルミナ、セラミックスなど高温
に耐える下地基板2上に、スパッタ法などの公知の方法
によってSiO2膜3を約2000人堆積する[第2図
(A)]。SiO□膜はSiの核形成密度(ND)が小
さく、非核形成面(Ssos)となる。Approximately 2,000 SiO2 films 3 are deposited on a base substrate 2 made of high-melting-point glass, quartz, alumina, or ceramics that can withstand high temperatures by a known method such as sputtering [FIG. 2(A)]. The SiO□ film has a low Si nucleation density (ND) and serves as a non-nucleation surface (Ssos).
次にSiH4ガスとN113ガスとを用い、プラズマC
vD法によって、5in2膜2上にSiN膜5八を形成
する。 SiNの組成は化学量論組成からずれても差し
つかえない。このSiNx膜をリソグラフィ技術によっ
て第2図(B) に示すようにバターニングする。Next, using SiH4 gas and N113 gas, plasma C
A SiN film 58 is formed on the 5in2 film 2 by the vD method. The composition of SiN may deviate from the stoichiometric composition. This SiNx film is patterned by lithography as shown in FIG. 2(B).
SiNxは核形成密度が大きく核形成面(SNDL)と
なる。この時、SiNxの大きさを、単一の核のみ形成
するよう数μm以下と十分微細にしておく。SiNx has a high nucleation density and becomes a nucleation surface (SNDL). At this time, the size of the SiNx is made sufficiently fine to several μm or less so that only a single nucleus is formed.
ついで5ill、Cf12ガスを用いた熱CVD法など
によってS1結晶4を成長させると、核形成面(SND
L)であるSiNx上の単一核から成長したSi単結晶
は非核形成面(SNos)であルSiO2面を覆って第
2図(C)に示すように成長する。Next, when the S1 crystal 4 is grown by a thermal CVD method using 5ill and Cf12 gas, the nucleation surface (SND
A Si single crystal grown from a single nucleus on SiNx (L) grows with its non-nucleation surface (SNos) covering the SiO2 surface as shown in FIG. 2(C).
最後にS i !lj−結晶4の表面を平坦に研摩して
第2図(D)に示すような成長基板1を得ることができ
る。Finally S i! By polishing the surface of the lj-crystal 4 to a flat surface, a growth substrate 1 as shown in FIG. 2(D) can be obtained.
核形成…1(SNI、L)の形成はS iNx膜をバタ
ーニングするのでなく、5107表面に局所的にGa、
Asその他のイオンを打込むことによって行うこともで
きる。Nucleation...The formation of 1 (SNI, L) does not butter the SiNx film, but locally forms Ga, L, etc. on the 5107 surface.
This can also be done by implanting As or other ions.
5il結晶の形成は熱CVD法でなく他のCVD法によ
ってもよく、またMBE (分子線エピタキシー)法に
よってもよい。また周知の技術を用いて導電型を制御す
るための不純物をドーピングさせてやフても良い。The 5il crystal may be formed not by thermal CVD but by other CVD methods, or by MBE (molecular beam epitaxy). Further, impurities for controlling the conductivity type may be doped using well-known techniques.
非核形成面としては、下地基板上に堆積させた5102
膜に限らず、5102基板そのものを用いることもでき
る。As a non-nucleation surface, 5102 deposited on the base substrate
In addition to the film, the 5102 substrate itself can also be used.
GaAsのヘテロエピタキシャル成長法としてM OC
V D法を例示したか、MIIE法やLPE(液相エピ
タキシ)法を用いることができることは言うまでもない
。MOC as a GaAs heteroepitaxial growth method
Although the VD method is shown as an example, it goes without saying that the MIIE method and the LPE (liquid phase epitaxy) method can also be used.
ヘテロエピタキシャル成長のための基板単結晶としてS
iのみならずGeを用いることもてきる。S as a substrate single crystal for heteroepitaxial growth
Not only i but also Ge can be used.
さらに本発明は化合物半導体としてGaP、InΔS。Furthermore, the present invention uses GaP and InΔS as compound semiconductors.
lsbなどのIII −V族化合物全敗およびそれらの
混晶化合物、 CbSe、11gTeその他のII −
VI族化合物全般およびそれらの混晶化合物、ざらにC
dCa52などのカルコパイライ形1− III −V
i族化合物を用いたヘテロエピタキシャル構造にも適用
することができる。III-V group compounds such as lsb and their mixed crystal compounds, CbSe, 11gTe and other II-
Group VI compounds in general and their mixed crystal compounds, Zarani C
Chalcopyrite type 1-III-V such as dCa52
It can also be applied to a heteroepitaxial structure using an i-group compound.
[発明の効果]
以上説明したように、本発明によりは絶縁物上に大面積
にIV族とIII−V、II−VI族のヘテロエピタキ
シャル膜が得られるので、従来のIII −V 。[Effects of the Invention] As explained above, according to the present invention, a heteroepitaxial film of group IV, III-V, and group II-VI can be obtained over a large area on an insulator, which is different from conventional III-V.
It −VI族化合物半導体の11結晶基板、 Si単
結晶基板ILにヘテロエピタキシーしたものに較へ、低
価4;49機械強度大の基板が得られる。Compared to an It-VI group compound semiconductor 11-crystal substrate or a Si single-crystal substrate IL which is heteroepitaxially formed, a low-cost 4:49 substrate with high mechanical strength can be obtained.
また、Si米結晶にスイッヂング回路や増幅回路を汀、
■込んで発光部と制御部を一体化した発光素子を形成す
ることがてき、大面積、低価格の電気光学素子を得るこ
とができる。In addition, switching circuits and amplifier circuits can be placed on Si rice crystals.
(2) A light-emitting element in which a light-emitting part and a control part are integrated can be formed with great care, and an electro-optical element with a large area and a low cost can be obtained.
第1図は本発明の詳細な説明する工程図、第2図は成長
基板の作製の例を示す工程図である。
1・・・成長基板、
2・・・下地基板、
3・・・5102膜、
4・・・Si単結晶、
5・・・核形成面、
6・・・GaAsバッファ層、
7・・・GaAsエピタキシャル層。
第1図FIG. 1 is a process diagram explaining the present invention in detail, and FIG. 2 is a process diagram showing an example of manufacturing a growth substrate. DESCRIPTION OF SYMBOLS 1... Growth substrate, 2... Base substrate, 3... 5102 film, 4... Si single crystal, 5... Nucleation surface, 6... GaAs buffer layer, 7... GaAs epitaxial layer. Figure 1
Claims (1)
子を母体とする単結晶と、該単結晶上にエピタキシャル
成長させた化合物半導体層とからなることを特徴とする
ヘテロエピタキシャル構造。 2)前記IV族元素の単結晶が、前記非晶質基板上におけ
る位置および大きさが制御された複数の単結晶であるこ
とを特徴とする特許請求の範囲第1項記載のヘテロエピ
タキシャル構造。 3)前記IV族元素の単結晶が非核形成面(S_N_D_
S)である前記非晶質基板上に設けられた核形成面(S
_N_D_L)上に選択成長されたことを特徴とする特
許請求の範囲第1項または第2項に記載のヘテロエピタ
キシャル構造。 4)前記IV族元素がケイ素であることを特徴とする特許
請求の範囲第1項ないし第3項のいずれかの項に記載の
ヘテロエピタキシャル構造。 5)前記化合物がIII−V族化合物であることを特徴と
する特許請求の範囲第4項記載のヘテロエピタキシャル
構造。 6)前記化合物がII−VI族化合物であることを特徴とす
る特許請求の範囲第4項記載のヘテロエピタキシャル構
造。 7)前記化合物が I −III−VI族化合物であることを特
徴とする特許請求の範囲第4項記載のヘテロエピタキシ
ャル構造。 8)非晶質基板上に成長させた周期表第IV族に属する原
子を母体とする単結晶を有する成長基板上に化合物半導
体を構成する元素を供給して、前記IV族元素の単結晶上
に化合物半導体層を形成することを特徴とするヘテロエ
ピタキシャル構造の形成方法。 9)非晶質基板に、該基板より核形成密度の大きい核形
成面(S_N_D_L)を形成し、該核形成面(S_N
_D_L)に周期表第IV族に属する原子を母体とする単
結晶核を形成し、該単結晶を前記核形成面をこえて前記
非晶質基板の核形成密度の小さな非核形成面(S_N_
D_S)上を覆って成長させて成長基板を作製する工程
と、前記成長基板上に化合物半導体を構成する元素を供
給して、前記IV族元素の単結晶上に化合物半導体層を形
成する工程とからなることを特徴とするヘテロエピタキ
シャル構造の形成方法。 10)前記非晶質基板がSiO_2基板であり、前記I
V族半導体がケイ素であることを特徴とする特許請求の
範囲第9項記載のヘテロエピタキシャル構造の形成方法
。 11)前記化合物がIII−V族化合物であることを特徴
とする特許請求の範囲第10項記載のヘテロエピタキシ
ャル構造の形成方法。 12)前記化合物がII−VI族化合物であることを特徴と
する特許請求の範囲第10項記載のヘテロエピタキシャ
ル構造の形成方法。 13)前記化合物が I −III−VI族化合物であることを
特徴とする特許請求の範囲第10項記載のヘテロエピタ
キシャル構造の形成方法。[Scope of Claims] 1) Consisting of a single crystal grown on an amorphous substrate and whose parent body is an atom belonging to Group IV of the periodic table, and a compound semiconductor layer epitaxially grown on the single crystal. A heteroepitaxial structure. 2) The heteroepitaxial structure according to claim 1, wherein the single crystal of the group IV element is a plurality of single crystals whose positions and sizes on the amorphous substrate are controlled. 3) The single crystal of the group IV element has a non-nucleation surface (S_N_D_
The nucleation surface (S) provided on the amorphous substrate is
_N_D_L) The heteroepitaxial structure according to claim 1 or 2, wherein the heteroepitaxial structure is selectively grown on _N_D_L. 4) The heteroepitaxial structure according to any one of claims 1 to 3, wherein the Group IV element is silicon. 5) The heteroepitaxial structure according to claim 4, wherein the compound is a III-V group compound. 6) The heteroepitaxial structure according to claim 4, wherein the compound is a II-VI group compound. 7) The heteroepitaxial structure according to claim 4, wherein the compound is a group I-III-VI compound. 8) Supplying an element constituting a compound semiconductor onto a growth substrate having a single crystal whose matrix is an atom belonging to Group IV of the periodic table grown on an amorphous substrate, and growing the single crystal of the Group IV element. 1. A method for forming a heteroepitaxial structure, comprising forming a compound semiconductor layer. 9) Form a nucleation surface (S_N_D_L) with a higher nucleation density than the substrate on an amorphous substrate, and form a nucleation surface (S_N_D_L) on the amorphous substrate.
_D_L) is formed with a single crystal nucleus whose parent body is an atom belonging to Group IV of the periodic table.
D_S) forming a compound semiconductor layer on the single crystal of the Group IV element by supplying an element constituting a compound semiconductor onto the growth substrate; A method for forming a heteroepitaxial structure, comprising: 10) The amorphous substrate is a SiO_2 substrate, and the I
10. The method for forming a heteroepitaxial structure according to claim 9, wherein the group V semiconductor is silicon. 11) The method for forming a heteroepitaxial structure according to claim 10, wherein the compound is a III-V group compound. 12) The method for forming a heteroepitaxial structure according to claim 10, wherein the compound is a II-VI group compound. 13) The method for forming a heteroepitaxial structure according to claim 10, wherein the compound is a group I-III-VI compound.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7351787A JPS63239927A (en) | 1987-03-27 | 1987-03-27 | Hetero-epitaxial structure and forming method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7351787A JPS63239927A (en) | 1987-03-27 | 1987-03-27 | Hetero-epitaxial structure and forming method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63239927A true JPS63239927A (en) | 1988-10-05 |
Family
ID=13520514
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7351787A Pending JPS63239927A (en) | 1987-03-27 | 1987-03-27 | Hetero-epitaxial structure and forming method thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63239927A (en) |
-
1987
- 1987-03-27 JP JP7351787A patent/JPS63239927A/en active Pending
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