JPS6323478A - Facsimile equipment - Google Patents

Abstract

PURPOSE:To simply record high-speed data from a high-speed FAX by providing a 2nd memory to use only a recording head for data write/read. CONSTITUTION:Circuits up to a MODEM 1, a memory 2, a decoding circuit 3 and a detection circuit 7 are operated in real time. On the other hand, when the recording at the recorder side,is required, the content of the memory 2 is read, decoded by the decoding circuit 3 and stored in a line memory 4. After the storage, the data is read and recorded by a recording head 6. Thus, the facsimile signal of a high-speed FAX is received at a high speed and recorded in response to the size of the recording head.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a facsimile machine that receives data from a high-speed facsimile machine.

[Prior art]

Facsimile machines are moving toward faster speeds. The current high-speed FAX is called G3. G3 is
This is a unified standard determined by CCITT. A conventional example that describes the functions of G3 is the ``Data Communications Handbook'' (IEICE Line, 1207 pages, published in 1988).

G3 consists of a data transmission format on the line and a fixed format for its modem. Therefore, there are no particular restrictions on the size of the recording head or the size of the reading head. For example, a slow recording device may be used.

This device records by mechanically scanning a small thermal head with 16 to 32 dots in the main scanning direction. When such a recording device is applied to a device that requires high speed, such as a high-speed FAX receiver, it is necessary to increase the number of recording heads to 128 dots or more. On the other hand, 128-256
Even when the dot recording heads are lined up at a high density of 7.7 lines/am, the size is 16 to 32 m, making it difficult to record in uniform contact with the recording paper, resulting in uneven recording. .

[Problem that the invention seeks to solve]

For the above-mentioned reasons, conventional recording apparatuses usually limit the number of dots that can be recorded simultaneously to a maximum of about 64. Even if 64 dots could be recorded in 1 m5 ec, it would take 216 x 8 = 1728 m sec to record a letter size of 216 m in width at a linear density of 8 lines/■. In other words, it takes 1728m to record 64 lines.
5ec is required. This means 27m per line.
It will take 5ec.

On the other hand, the G3 fax standard in the CCTTT recommendation states that 2 Qmse per line (3.85 lines/m)
Let c be iR$. Therefore, it is impossible to receive a facsimile signal sent from a G3 FAX using a low-speed FAX.

SUMMARY OF THE INVENTION An object of the present invention is to provide a facsimile apparatus which can easily record facsimile signals from a high-speed FAX.

[Means for solving problems]

The present invention relates to a modem that receives signals from a line.

Stores facsimile signals from the modem. A first memory having a capacity equivalent to one screen, a decoding circuit for decoding the contents of the memory, and a capacity for one scanning direction of the recording head (capacity equivalent to a line) for storing the output of the decoding circuit. It consists of a second memory and a recording section that records the contents of the second memory.

[Effect]

In the second memory, data is written and read only by the recording head, so that high-speed data can be easily recorded.

〔Example〕

FIG. 1 shows an embodiment of the present invention. This fax machine has modem 1. Memory 2. Decoding/encoding circuit 3° line memory 4. Conversion circuit 5. It consists of a recording head 6 and a detection circuit 7. The opponent's high-speed aircraft will be G3.

Therefore, the telephone line carries the signal from G3 and modem 1
will be entered into.

The signal from G3 input to the modem 1 through the telephone line is demodulated and AD converted. Memory 2 stores this digital signal. Its capacity is, for example, equivalent to one screen (equivalent to one page).At the same time as this storage, the raw digital signal is sent to the decoding circuit 3 (the encoding circuit is used during transmission).
The compressed facsimile signal is converted into the original binary image signal.

The detection circuit 7 detects the presence or absence of a code error by counting the number of pixels for one restored line.

By this detection, it is possible to immediately inform the transmitting side whether or not the page has been successfully received when one page has been received.

The processing so far has been online processing.

Line memory 4 stores the output of decoding circuit 3.

However, this storage time is not online but when the contents of the line memory 6 become empty. When this sky becomes empty,
Read out the digital signal already stored in memory 2,
After being decoded by the decoding circuit 3, it is stored. The line memory 4 has a capacity corresponding to the product nXm of the number of lines n held by the recording head 6 and the number m of pixels per line.

When the line memory 4 reaches this full capacity of data, it inputs the image signal to the data conversion device 5 assuming that the number of ins corresponds to the number of dots of the recording head 6.

The conversion device 5 rearranges the image signals decoded in line order in the sub-scanning direction of the recording head 6 and sends them to the head 6. In addition, when the line memory 4 is completely filled, the decoding circuit 3
continues the decoding operation, but memory 2 and line memory 4
There is no change in the data. During this time, a so-called idle operation is performed, which is used to detect whether there is an error in the signal input from the telephone line.

When the recording operation of the recording head 6 is completed and the line memory 4 becomes empty, the code information read from the line memory 2 is restored to an image signal and stored in the line memory 4.

The decoding circuit 3 needs to restore the encoded data from the modem 1 in real time and also decode the data in the memory 3 at the same time. Such an operation is described, for example, in JP-A-59-1
This can be realized using the LSI described in Japanese Patent No. 26368. The detection circuit 7 may be constituted by a comparison circuit that compares a pixel number counter for one line with the required number of pixels.

The line memory 4 requires a memory capacity of n lines or more, where n is the number of pixels of the recording head 6. As shown in FIG. 1, the recording head 6 has n lines, and one line has m pixels. Therefore, the line memory 4 has a capacity of at least nXm pixels. m pixels indicates the number of scans in one line.

The line memory 4 stores nXm pixel data, which is then sequentially read out and sent to the recording head 6 for recording. After the recording head 6 finishes recording nXm pixels,
The data of the next nXm pixels are recorded in the line memory 4.

The recording head 6 records this new nXm pixel read data.

Thereafter, the procedure is to store data in units of nXm pixels, read out and record the stored data, and then store data in units of nXm pixels.

It should be noted that if only one line memory 4 is prepared, the data will have to be read out after storage, which takes time. In order to increase the speed, two line memories 4 may be prepared, and when one is used for storage, the other is switched for reading. This allows continuous recording when viewed from the recording head 6.

Here, the capacity of memory 2 will be described. Assume that the current manuscript is A4 size. At this time, the minimum time for recording all pages with the recording head 6 is set to tpsec. The speed of the modem is assumed to be a bit/SθC.

Therefore, when recording at the highest speed, a-t bit signals are input through the telephone line while recording one page. That is, for a high-speed facsimile machine that can accept reception of at least one page, the capacity of the memory 2 of at bits is sufficient. Currently, for a modem speed of 9.6K bits/sec, it takes 1 time to record on A4 paper.
If it takes 20 seconds, the capacity of memory 2 is 1.2M.
This capacity can be achieved with five bits by using a 256-bit dynamic RAM.

According to the above embodiment, modem 1. Memory 2° decoding circuit 3. Operations up to the detection circuit 7 are executed in real time. On the other hand, on the recording side, when recording is necessary, the contents of the memory 2 are read out, decoded by the decoding circuit 3, and stored in the line memory 4. After this storage, the data is read out and recorded by the recording head 6. Thereby, facsimile signals of high-speed FAX can be received at high speed and can be recorded according to the size of the recording head.

FIG. 2 shows an example realized by a computer system. Microprocessor (MPU) on the system bus
8 and a modem to the system bus], memory 2.
Decoding/encoding circuit 3. Line memory 4. The six conversion circuits 5 to which the conversion circuits 5 are connected are latch circuits 5-1. Selector 5
- Consists of 2.

Note that the memory, ROM, etc. for the MPU 5 are omitted.

In the above configuration, direct communication between the elements 1 to 5 is not performed, but is always performed via the MPU 8.

Furthermore, the MPU 8 has the function of the detection circuit 7.

FIG. 3 shows an embodiment for increasing the throughput of line memories, in which two line memories 4-1 and 4-2 are provided.
takes in the read restoration signal of the memory 2 through the decoding circuit 3 through the selector 4-5 and stores it. Memory 4-1
The address is created by the address generator 4-4 and stored in the memory 4.
The address of -2 is created by the address creator 4-3. Selector 4-6 distributes the addresses.

According to this embodiment, the recording head 6 can record continuously. Further, reading from the memory 2 can also be performed continuously.

It can be used not only for recording but also for sending. This example is the fourth example.
As shown in the figure. By scanning the original 20, the lens 21
The sensor 1o reads the data through the encoder circuit 9, binarizes it in the binarization circuit 9, stores it in the line memory 4, and then transfers it to the line via the encoder circuit 3.

FIG. 5 shows an embodiment in which the embodiment of FIG. 4 is realized by a computer system, in which a serial/parallel conversion circuit 11 is provided on the output side of the binarization circuit 9.

The system bus was provided to perform parallel transmission.

FIG. 6 shows an embodiment with a read head.

The reading head 10 has a structure in which reading sensors are arranged in the main scanning direction y, and performs reading by scanning in the width direction X of the paper surface. In this case, data for i lines corresponding to the number i of pixels of the sensor can be input by one scan. In order to input such a signal to the encoder circuit 3, it is necessary to convert it into a signal in the line direction. This conversion was performed by the conversion circuit 5.

FIG. 7 shows another embodiment, and is particularly closely related to FIG. 6. The selector 4-5 receives recording data from the system bus and stores it in either the line memory 4-1 or 4-2. One of the line memories 4-1 and 4-2 is in the write mode and the other is in the read mode. This allows continuous writing and reading. Address generator 4-3 is for line memory 4-2, address generator 4
-4 is for the line memory 4-3, this transfer is performed by the selector 4-6, and the selector 4-7 is for the output D o u
The recording head 6 switches its output D o u
Record t.

The reading head (sensor) 10 and the recording head 6 cannot be used at the same time, and when one is used for convenience, the other becomes unusable. Now, when the read mode is selected, the signal read by the sensor 10 is converted into binary data by the binarization circuit 9 and inputted to the multiplexer 12. The multiplexer 12 selects which of the line memories 4-1 and 4-2 the read data should be input to; however, the line memories 4-1 and 4-2
As in the case of recording, one side is alternately switched between writing and reading on the other side. Line memory 4-1 or 4-
The read data D out from 2 is sent to the recording head 6.
The signal is sent to the S/P converter 11, converted into parallel data, and sent to the system bus.

In this embodiment, the line memories 4-1 and 4-2 can be used for both reception and transmission.

FIG. 8 shows an example of two-color recording, in which a transfer tape made of two colors, red and black, is inserted between the recording head 6 and the recording paper, and the black part is placed for black recording, and the red part is placed for red recording. By placing , two-color recording becomes possible. It can also be applied to these recording formats.

Although the description has been made for the G3, it can also be applied to models other than the G3.

〔Effect of the invention〕

According to the present invention, it has become possible to record on an inexpensive recording device with a recording speed slower than the speed determined by the CCITT standard. Furthermore, a high-speed facsimile receiving apparatus can be constructed using a recording device that can only record at a constant speed for at least a certain number of blocks.

[Brief explanation of the drawing]

Fig. 1 is a diagram of an embodiment of the present invention, Fig. 2 is a diagram of an embodiment using a computer system, and Fig. 4 is a diagram of an embodiment with a transmission function added.
FIG. 5 is a diagram of an embodiment using a computer system, FIG. 6 is a diagram of an embodiment with other transmission functions added, FIG. 7 is a diagram of an embodiment using a computer system, and FIG. 8 is a diagram of the color recording side. DESCRIPTION OF SYMBOLS 1... Modem, 2... Memory, 3... Decoding/encoding circuit, 4... Line memory, 5... Conversion circuit, 6...
... Recording head, 7... Detection circuit.

Claims (1)

[Scope of Claims] 1. A modem that receives an encoded image signal from a line, a code memory having a capacity equivalent to a page for storing the signal demodulated by the modem, and a code memory that stores the signal demodulated by the modem at the same time as the coded image signal is stored in the memory. a decoding circuit that decodes the demodulated signal; a transmission error detection circuit that checks the output of the decoding circuit; a conversion circuit that converts the output of the decoding circuit into a recording sequence; and a recording head for recording the output of the conversion circuit. and a line memory having a capacity equal to the number of pixels of a line covered by the size of the recording head is provided between the decoding circuit and the conversion circuit,
A facsimile apparatus stores a signal read from a code memory and decoded through a decoding circuit in the line memory, and when recording, the stored signal is read from the line memory and sent to a conversion circuit. 2. The facsimile apparatus according to claim 1, wherein the line memory comprises a first line memory and a second line memory, and when storing data in one memory, the other memory is used for reading.