JPS63228831A - Subcarrier wave synchronizing circuit - Google Patents

Abstract

PURPOSE:To omit a band suppressing circuit for ARI (early traffic information) signal by opening a switch means after detecting the input of the ARI signal via a signal detecting circuit. CONSTITUTION:The ARI signal inputted to an input terminal 1 and an RDS (radio digital system) signal are applied to multipliers 3 and 12 to undergo the phase or level detection. This detection output is outputted to an LPF 4 or 15 and a BPF 6 or 13 and the voltage undergone the full wave rectification through an absolute value circuit 14 or 16 is outputted to a Schmitt circuit 18 via an adder 17. Then a switch circuit 9 is turned off when the input voltage exceeds a prescribed level. As a result, a 1st PLL loop is cut and a 2nd PLL loop is locked. Thus both RDS and ARI signals can be demodulated without using a band suppressing circuit for ARI signal.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a subcarrier synchronization circuit that demodulates signals carried by mutually orthogonal subcarriers having the same frequency. The present invention relates to a subcarrier synchronization circuit when a subcarrier is modulated with an RDS (Radio Data System) signal and an ARI (Allied Traffic Information) signal.

(b) Conventional technology In European FM radio broadcasting, for example, in order to distinguish between broadcasting stations that provide traffic information etc. and those that do not, 57
A system is used that performs the above-mentioned distinction by placing an ARI signal on a KHz subcarrier and demodulating this signal. In addition, in recent years, an RDS system has been proposed in which information such as broadcast programs and broadcast times is encoded, the above-mentioned code is placed on the subcarrier using a 57K) Iz subcarrier, and the code is superimposed on a normal FM radio signal and transmitted. ing. When both of the above-mentioned signals are combined into an FM radio signal and transmitted, it is conceivable that the RDS signal and ARI signal are transmitted simultaneously on a 57 KHz subcarrier with a 90 degree phase difference, for example. EBU Review ffechnica is a circuit that processes such signals.
1 teeth 204, the Costas loop described in April 1984 has been devised. This Costas loop suppresses the ARI signal and synchronizes with the subcarrier of the RDS signal.

C) Problems to be Solved by the Invention However, when a Costas loop circuit as described above is used as a demodulation circuit in which an RDS signal and an ARI signal are transmitted simultaneously, a band suppression circuit is required to suppress the ARI signal. It is. Also, the frequency of this band suppression circuit is set to 57K.
Highly accurate frequency adjustment is required to accurately match the frequency of Hz.

(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and includes a first phase-locked loop synchronized with a subcarrier containing a first signal; The phase is 90 degrees different from the carrier wave,
a second phase-locked loop synchronized with a subcarrier containing a second signal; a signal detection means for detecting the second signal; and a switch for disconnecting the first phase-locked loop by the output of the signal detection means. It is characterized by comprising a means.

(*) Effect According to the present invention, when the second signal (ARI signal) is input, it is detected by the signal detection circuit (ARI signal detection circuit), and by opening the switch means, the second signal (ARI signal) is input. The first PLL circuit of the subcarrier containing the signal (RDS signal) is disconnected, and when the ARI signal is not input, the first PLL circuit containing the RDS signal is disconnected by closing the switch means.
By using the L circuit, it is possible to provide a subcarrier synchronization circuit that can synchronize with subcarriers containing both RDS signals and ARI signals without requiring a band suppression circuit for suppressing ARI signals as in the past.

(f) Embodiment Figure 2 is a circuit diagram showing the principle of the present invention, in which (1) is an input terminal to which input data is applied, (2> is a voltage controlled oscillator (VCO) with a free-run frequency of 57 KHz. ),
(3) is 5 7 K1. contained in the input data. (
7) A multiplier that multiplies the subcarrier by the VCO (2) (7) free-run frequency of 57 KHz, and 4) a low-pass filter that passes only the low frequency signal included in the output signal of the multiplier (3). The filter (5) is an addition circuit that adds the signal that has passed through the low-pass filter and the signal that has passed through a switch circuit (9) that will be described later.

Further, (6) is a bandpass filter that passes only the RDS signal included in the output signal of the multiplier (3);
7) is a multiplication circuit that multiplies the signal passed through the bandpass filter (6) by a signal from the bandpass filter (13), which will be described later, and 8) is included in the output signal from the multiplication circuit (7). A low-pass filter that passes DC signals,
(9) is an ARI signal detection circuit (10) which will be described later.
This is a switch circuit that opens and closes depending on the detection signal output when a signal is detected. Therefore, (11) is the V CO (2
) to the output filter 57 Kl (90 degree phase shift circuit that shifts the phase of the free run frequency of Z by 90 degrees, (12) is the
A multiplier (13) that multiplies the 57 KHz signal output from the 0 degree phase shift circuit (11) and the 57 KHz subcarrier input from the input terminal (1), the multiplier (12)
This is a bandpass filter that passes only the RDS signal included in the output signal from the .

In the above circuit configuration, multiplier (3) - band pass filter (6) (multiplier (12) - band pass filter (1)
3) - multiplier (7) - low pass filter (8) one switch circuit 9) - adder (5) - V CO (2) constitute a first PLL loop (so-called Costas loop). Also, multiplier (3) - low pass filter (
4) -Adder (5) -V CO(2) adds the second P
An LL loop is configured. When the ARI signal detection circuit (10) detects that the ARI signal is being carried, the switch circuit (9) is turned off and the first PL
Cut the L loop to form the second PLL loop described above. On the other hand, when there is no ARI signal, the switch circuit (9
) to form the first PLL loop.

By on/off control of the switch circuit (9) according to the presence or absence of this ARI signal, if only the RDS signal is carried, the first PLL loop constitutes a demodulation circuit for the RDS signal, and furthermore, the ARI signal is , RDS signals are simultaneously conveyed, the switch circuit (9) is disconnected by the ARI signal detection circuit (10), and the second PLL loop constitutes a demodulation circuit for the ARI signal.

Next, a specific example using the above-mentioned principle is shown in FIG.
Since this circuit has the same circuit configuration as the above-mentioned principle diagram except for the specific circuit of the ARI signal detection circuit, the same circuits are given the same numbers and the explanation of the configuration will be omitted. The ARI signal detection circuit (su) includes an absolute value circuit (14) into which the output signal phase-detected by the multiplier (3) is input via a low-pass filter (4), and an output signal which is level-detected by the multiplier (12). A low-pass filter (15) to which the signal is input, an absolute value circuit (16), an adder (17) to which the outputs of the absolute value circuits (14) and (16) are added, and the output of the adder (17) is input; It is comprised of a Schmitt circuit (18) that outputs a switch disconnection signal to the switch circuit (9) when a voltage of a predetermined level or higher is applied.

(19> is an ARI synchronous detection output terminal, and the ARI synchronous detection output is supplied from the low-pass filter (15).
(20) is the RDS demodulation output terminal and the bandpass filter (
The outputs of 6) and (13) can be fully supplied.

In the subcarrier synchronization circuit having the circuit configuration as described above, R is carried by a subcarrier of 57 K) Iz to the input terminal (1).
Consider the case where the DS signal and ARI signal are applied simultaneously. At this time, the RDS signal is 57K)1. The ARI signal is a signal (DSB wave) that has both sides of the subcarrier of This is the signal. Here, for the sake of later explanation, it is assumed that the RDS signal is carried by a subcarrier with a phase of 0 degrees, and the ARI signal is carried by a subcarrier whose phase is shifted by 90 degrees with respect to the above-mentioned subcarrier.

Both signals input to the input terminal (1) are sent to the multiplier (3) and (
12〉 applied to the 0 multiplier (3) d is V CO (2)
The multiplier (3) detects the phase or level of both signals from the input terminal (1). At this time, level detection (synchronous detection) is performed on the DSB wave that includes the RDS signal, and the frequency is, for example, 250Hz.
The RDS signal between ~z and axuz is taken out. Also,
Since the carrier wave containing the ARI signal has a phase of 90 degrees, phase detection is performed. On the other hand, the multiplier (12) has vCO (
2) to 57 KHz signal is a 90 degree phase shift circuit (11)
Since the input is via AR, the multiplier (12) conversely inputs AR
The I signal is level detected, and the RDS signal is phase detected. Therefore, after level detection of the ARI signal, for example, a low frequency (250 Hz or less) sine wave is included. Then, these detection outputs are passed through a low-pass filter (4)
or (15), bandpass filter <6) or (13)
However, unlike AM modulation, the DSB detection signal of the RDS signal does not include low frequencies (for example, below 250 Hz), so only the ARI signal passes through the low-pass filters (4) and (15), and the absolute value circuit (14) or (1
The full-wave rectified voltage in step 6) is output to the Schmitt circuit (18) via the adder (17). Schmitt circuit (
18), when the input voltage reaches a predetermined value or higher, the input terminal (
1), it is determined that a carrier wave including an ARI signal is being input, and the switch circuit (9) is turned off. Therefore, even if a DSB wave is input through the bandpass filter (6), the first PLL loop is completely disconnected, and the second PLL loop described above is
The L loop becomes locked. Further, the level-detected output of the ARI signal is outputted to the ARI synchronous detection output terminal (19) via a low-pass filter (15). This signal lights up a lamp etc. via an amplifier (not shown).
Indicates that the selected station is a station that provides traffic information, etc. In addition, the RDS signal is filtered by a bandpass filter (6) and (
13) from the DSB detection output terminal (20).

On the other hand, when the ARI signal is not input and only the RDS signal is input, the Schmitt circuit (18
) becomes low and the switch circuit (9) turns on. Therefore, the first phase lock loop ( Fustaslube) is formed and RDS
DSB demodulation of the signal is performed, and the DSB demodulation output terminal (2
An output signal is obtained at 0), dehooded by an RDS decoder (not shown), processed by a microcomputer, etc., and used as data for a broadcast program, etc.

Finally, if the carrier wave input to the input terminal (1) contains only the ARI signal, the second PLL roof (multiplication! (3) - low pass filter (4>-710 multiplier (5
) −V CO(2) ) locks and multiplier (12)
- ARI synchronous detection output can be obtained at the ARI synchronous detection output terminal (19) via the low-pass filter (15).

As described above, in this embodiment, when an ARI signal and an RDS signal exist simultaneously, the first
PLL (Costas loop) is disconnected, the second PLL is locked, ARI signal synchronous detection output and RDS demodulation output are obtained, and when only the RDS signal is input, the first PLL is
1 and L (Costas loop) are locked to obtain an RDS demodulated output.

(G) Effects of the Invention As described above, according to the present invention, it is possible to demodulate an RDS signal from a mixed signal of an RDS signal and an ARI signal without using a band suppression circuit for suppressing an ARI signal as in the past. A
Demodulation of the RI signal is possible.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the present invention, and FIG. 2 is a circuit diagram explaining the present invention in detail. (1)...Input terminal, (2)...VCOl (3
), (7), (12)...multiplier, <4), (8
)...Low pass filter, (5), (17)...
Adder, (6), (13)...band pass filter, (9)...switch circuit, (su)...AR
I detection circuit, (11)...90 degree phase conversion circuit,
(14). (16>... Absolute value circuit, (18)... Schmitt circuit, (19)... ARI detection output terminal, (20
)・-RD S demodulation output terminal.

Claims (1)

[Claims] a first phase-locked loop that is synchronized to a subcarrier that includes a first signal; and a second phase-locked loop that is 90 degrees out of phase with the first subcarrier and that is synchronized to a subcarrier that includes a second signal. A subcarrier synchronization circuit comprising a loop, a signal detection means for detecting the second signal, and a switch means for disconnecting the first phase-locked loop based on the output of the signal detection means.