JPS63222869A - Image forming method - Google Patents

Abstract

PURPOSE:To realize high-accuracy control of gradation, by correcting a current supply time according to differences between relative values of light emission intensities of light-emitting diodes when a fixed current is supplied to diodes. CONSTITUTION:In the period from time t0 to time t1, an address signal ADRj is applied to a frame memory 11, and simultaneously, an address signal ADRi is applied to the frame memory 11 and a correction data recorder 12, gradation data LPD(j, i) and correction data Q(i) are read, and a calculation is conducted by a multiplying circuit 13. At time t1, the storage of corrected gradation data PD(1)-PD(N) into a line memory 16 is completed. Light-emitting diodes Dc1, Dc2, Dc3 emit light for time widths tau1, tau2, tau3 proportional to the values of the gradation data PD(1), PD(2), PD(3) after correction, and the quantities of light being emitted are set by only controlling the light-emitting times. Further, even when there is scatter in the light emission intensities of the diodes in response to the supply of a fixed current, the diodes are driven for the time width corresponding to the corrected value of the gradation data PD(i), so that the quantities of light emitted from the diodes are uniformized, and the scatter is corrected.

Description

Detailed Description of the Invention [Industrial Application Field] The present invention relates to an image forming method for forming an image on a photosensitive material using a light emitting diode array as a point light source, and in particular, an image forming method for forming an image on a photosensitive material by controlling the gradation of the light emitting diode array. key of 1ij
The present invention relates to an image forming method in which an i@ is formed.

[Conventional Example 1 Conventionally, a light-emitting diode array made up of fine light-emitting diodes A"- arranged in a row was used as a light source, and a photosensitive material such as a silver halide film was moved relative to the direction perpendicular to the longitudinal direction of the light-emitting diode array. By controlling the light emitting intensity of each light emitting diode while moving, a halftone image (latent image) was formed.

That is, by controlling the current supplied to each light emitting diode, the light emission intensity is changed to form a half-tone image.

However, since the characteristics of current versus light emission intensity of light emitting diodes are different from each other, a current supply circuit as shown in FIG. 5 or 6 has been used. The circuit shown in Figure 5 is a power supply ■. A light emitting diode array 1 is forward-biased between 0 and the ground terminal, and the cathode of each light emitting diode is connected to the ground terminal via a resistor and a transistor. By applying 81 to 3n, the light emission intensity of each light emitting diode is independently controlled. Each resistance is
When the control signals $1 to So of the same level are applied, the adjustment is made so that the same current flows through each light emitting diode, thereby making the characteristics of the light emitting diodes uniform. The circuit in FIG. 6 uses a power supply of V. A light emitting diode array 1 is forward-biased between 0 and the ground terminal, and a transistor connected in series with each light emitting diode is connected to the ground via a resistor 2. It is designed to give.

[Problems to be Solved by the Invention] However, even with the image forming method using such a compensation means, there are the following problems.

That is, in the conventional example shown in FIG. 5, when there are a large number of light emitting diodes, adjusting the respective resistances becomes extremely complicated, which has the disadvantage that it is not suitable for high-resolution image formation. or,
Even if techniques such as Ray iF-trimming in half integrated circuit technology are used, they are extremely difficult to implement in practice.

In the conventional example shown in Fig. 6, this adjustment method is convenient when high-resolution image formation is performed by arranging multiple light emitting diode arrays in parallel. There is a drawback that the characteristics cannot be made uniform.

[Means for Solving the Problems] The purpose of the present invention has been made in view of the above problems, and it is an object of the present invention to improve the problems caused by variations in the light emission intensity of light emitting diodes, and An object of the present invention is to provide an image forming method that can realize gradation control.

To achieve this objective, the present invention supplies a constant current to each light emitting diode of a light emitting diode array, and controls the supply time in accordance with the gradation level.
Furthermore, the current supply time is adjusted for each gradation level according to the variation in the light emission intensity of each light emitting diode when the constant current is supplied, thereby correcting the variation in the light emission intensity of the light emitting diodes of people. Features.

[Example] Hereinafter, an example of the image forming method according to the present invention will be described with reference to the drawings.

FIG. 1 schematically shows the configuration of an image forming apparatus using a light emitting diode array as a light source. In the figure, 3 is a light emitting diode array that emits cyan light with a wavelength λ1 of approximately 850 nl; 4 is a light emitting diode array that emits magenta light with a wavelength λ2 of approximately 605 na+; and 5 is a light emitting diode array that emits cyan light with a wavelength λ3 of approximately 5
This is a light emitting diode array that emits 10n snow yellow light, and each light emitting diode array 3, 4.5 is a group of extremely fine light emitting diodes D to D connected in the longitudinal direction.
It is composed of Dc1cNlml~DmN1Dy1~D,N. Further, each light emitting diode group is formed parallel to the longitudinal direction at an equal pitch of n, and is arranged so as to face the photosensitive material 6 such as a silver halide film.

7.8.9 is a SELFOC lens interposed between the light emitting diode arrays 3, 4.5 and the photosensitive material 6, and when the photosensitive material 6 is transferred in the direction of arrow Y, it is removed from the light emitting diode arrays 3, 4.5. The emitted light is irradiated line by line through a specific SELFOC lens 7.8°9. That is, the irradiated area 10 for one line
Regarding (corresponding to the shaded area in the figure), Y
The photosensitive material 6 is transferred in the direction, and first the light from the light emitting diode array 5 is irradiated with a width of ΔD, then the light from the light emitting diode array 4, and finally the light from the light emitting diode array 3 is irradiated with the same width. Irradiate sequentially at ΔD. In this way, 3
By irradiating light with different wavelengths λ and λ2°λ, parts of both images are formed on the irradiated area 1o, and by repeating the same operation while further transferring the photosensitive material 6, an image for one frame is created. (color latent image) can be formed.

Light emitting diode DC1~OcN"m1~0ffIN, D
The light emitting operations of 71 to D and N are controlled by a control circuit shown in FIG. Although FIG. 2 shows a control circuit for the light emitting diode array 3, other light emitting diode arrays 4.5 and 4.5 are also controlled by a similar circuit. Therefore, this will be explained as a representative example.

First, to describe the configuration, 11 is a frame memory;
Gradation data corresponding to each frame is stored. For example, N light emitting diodes D. When one frame of image is formed on the photosensitive material 6 by irradiating M lines with 1 to DCH, each light emitting diode D. Gradation data for each line corresponding to 1 to DCN is stored in M address areas. Also, people's gray scale data expresses gray scales in two stages, which are made up of binary data of 2 bits.

13 L: L correction data storage memory, which stores correction data corresponding to the light emission intensity of each of the light emitting diodes DC1 to DcN when the supply current is constant. That is, as described above, each light emitting diode D does not exhibit the same light emitting intensity even if the supplied current is constant. When a predetermined constant current is supplied to 1 to DcN, the emission intensity of each is measured, and for example, the emission intensity of light emitting diode DC1 at this time is set to 1.
As another light emitting diode D. 2 to DCH, and calculate these relative ratios to each light emitting diode DC1.
~Stored as correction data corresponding to DCH.

Note that the code j (an integer from 1 to M) is the line number.

The code i (an integer from 1 to N) is the order of the light emitting diodes, the gradation data is LPD (j, i), and the correction data is Q.
It will be explained below as m. In addition, each data LPD (j
, i) , Q(i) is read using the address signal ADR・,
It is assumed that this is done by ΔDR.

13 is a multiplication circuit, which calculates the gradation data output from the frame memory 11 for each line and multiplies P D (j, i) and correction data Q (i) as shown in the following equation (1). Then, corrected gradation data P O(i) is generated.

14 is a pulse width modulation circuit, which generates a rectangular signal with a time width proportional to the value of the corrected gradation data p o (++).

Reference numeral 15 denotes a drive circuit for driving the light emitting diode [)cl-DcN, and sets the light emission time according to the time width set in the Okigata I5. However, each light emitting diode D
. A constant current is supplied to DCH1 to DCH to emit light, and the amount of light emitted by each of them is determined only by the time width.

FIG. 3 is a block diagram showing in more detail the configuration of the pulse width modulation circuit 14, drive circuit 15, etc. in FIG. It is composed of an advancing counter 17, a k-addressing counter 18, and a comparator 19, and a portion corresponding to the drive circuit 15 is composed of a shift register 20, a wrap circuit 21, and an LED driver 22.

The line memory 10 has a storage area for each bit at each of N storage addresses, and temporarily stores one line of gradation data P D (i) supplied from the multiplication circuit 13 . The N-advancing counter 11 counts the clock signal CK2 of a predetermined period, and supplies this count data SN as an address signal to the line memory 16, thereby calculating the gradation data P D (i) stored at the specified address i. is read out to the comparator 19.

The k-advancing counter 18 receives a clock signal DCK of a predetermined period.
I is counted, and this count data TM is supplied to one input terminal of a comparator 19 and compared with gradation data P D (i). Here, the period of the clock signal GK2 is 1/N of the clock signal CK1, that is, the period of the light emitting diode Dc
It is a fraction of f~DcN. The comparator 19 compares the count data TM and the gradation data PD(+),
If P D (+)≧TM, “1”, PD(i)<TM
If so, logical data CM(+) of "0" is generated.

The shift register 20 has a storage capacity of N bits, and stores logical data CM(
i) are accumulated in order.

The latch circuit 21 is the logic data CM of the shift register 20.
(1) to CM (N) are periodically latched to the clock signal @CK1, and have an N-bit memory address. That is, as described above, one clock signal CK1 is generated every time N clock signals @CK2 are generated, so all floors read from the line memory 6 in accordance with the address signal 3N are Key data P D (1) to P D (N
) with the count data TM, the comparison results are logical data CM(1) to CM(N).
is latched.

The LED driver 22 drives each of the light emitting diodes O61 to OoN@ based on the value of the logical data held in each bit of the latch circuit 21. For example, if the logic data CM(i) of a certain bit is 1'', a constant current is supplied to the corresponding light emitting diode D.i to cause it to emit light, and if it is 0'', the current supply is stopped.

Next, the operation of the control circuit having such a configuration will be explained based on the timing chart of FIG. For convenience of explanation, a case will be described in which the gradation of one line of image formation is from O to 3, that is, 12 bits.

First, in the period from time 1o to tl, the address signal ADR designates the line number in the frame memory 11.
, and at the same time, the address signal ADRi specifying the order of the light emitting diodes D01 to [)cN is applied to frame 1.
1 and correction data storage device 12 to store the gradation data LPD (j, i) and correction data Q of the specified line.
(i) is read out and the multiplication circuit 13 performs the calculation of the above equation (1). At time t1, storage of the corrected gradation data PD(1) to PD(N) in the line memory 16 is completed.

Next, the clock signal CK1 is generated as shown in FIG.
~3 count data TM is generated and a clear signal CLR1 is generated.
The reset operation is repeated every time the signal becomes "L". As shown in the same figure (F), the clear signal CLR2 goes to "L" level in synchronization with the clock signal CK1, and the clock signal CK2, which resets the contents of the N-advancing counter 17, synchronizes with the clock signal CK1. As shown in (G) of the same figure, N pieces of grayscale data P D (1 ) to P D (N) are read out. This operation is a number of pixels [1] equal to the number of gradations 2k (=4).
This is continued until time t5 when the check signal CK1 is generated.

In order to explain the operation more specifically, the gradation data after correction is expressed as PD(1)-1PD(2)-2, PD(3).
)=3, first, the count data TM becomes 1'' by the first clock signal CKI, and the gradation data P D (1) to P D are sequentially read out during the period from time t to t2.
(N) by the comparator 19, PD(1)=TM
, PD(2)>TM, F'D(3)>TM, so
The logical data becomes CM(1)-CM(2)-CM<3)-1, and the shift register 20 stores N, 1.1...) data, which is latched into the latch circuit 21 at time t2. .

In the next period t2 to t3, the previous logical data is CM (1)
Since =CM(2)=CM(3)=1, the light emitting diode DDD is lit.

C19, c2ゝ C3 At the same time, the count data T of the k-advancing counter 8
M becomes "2", and the gradation data P D (1) to PD (N) read out again in synchronization with the clock signal CK2 are compared. At this time, PD(1)<TM.

Since PI)(2)=TM and PD(3)>TM, the logical data is CM(1)=O1CM(2)=1, CM(
3) -1, and the shift register 20 has to, i, i
...) is accumulated and latched into the latch circuit 21 at time t3°.

In the next period t to t4, the previous logical data CM (
1) -0, CM(2) -1, CM(3) = 1, so the light emitting diode D. 1 is turned off and the light emitting diode O
D continues to be lit. This and C2' C3 simultaneously become count data TM7/1''3'', in this case PD(1)<TM, PD(2)<TMSPD(3)
-TM, so CM(1)=CM(2)-0,CM(
3) -1, and is latched by the latch circuit 21 at time t4, and in the next period from t to t5, the light emitting diode DD is turned off, and the light emitting diode C1'C2' and the ode Dc30 continue to be lit.

As a result of this process, (I), (J), (in)
As shown in FIG.
Light is emitted with a time width τ τ , τ3 proportional to the value of D(3), and the amount of light emitted is set only by controlling the light emission time. Furthermore, even if there are variations in the light emission intensity between light emitting diodes for a constant supply current, the supplementary 1f data Q (
i), and each light emitting diode is driven with a time width corresponding to the value of the corrected gray scale data PDm. The amount of light emitted by the light emitting diodes becomes uniform for each gradation, and variations among the light emitting diodes are corrected.

Although a specific example has been described here with the number of gradations set to 4, in this embodiment, gradation control of 2' (k is any integer) can be performed. For example = 8 bits as 25
There are 6 stages.

As described above, according to this embodiment, the resistance value explained in the conventional example is :l! 1! ! It eliminates the need for complicated adjustments such as adjustments, etc., and can easily correct variations between light-emitting diodes using correction data.Especially when there are a large number of light-emitting diodes, extremely excellent effects can be obtained. Suitable for high resolution image formation.

[Effects of the Invention] As explained above, according to the present invention, a constant current is supplied to each light emitting diode of a light emitting diode array, and the supply time of the current is changed in accordance with the gray level. In an image forming method that performs gradation control, the supply time is corrected for each gradation level according to the relative dispersion of the light emitting intensity of each light emitting diode when the constant current is supplied. Even if there are variations in the light emission intensity between the light emitting diodes, the intensity of the light emission can be made uniform for each gradation, so gradation control with zero precision can be performed.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram showing an embodiment of an image forming apparatus constructed based on the image forming method according to the present invention, and FIG. 2 shows a control circuit for controlling a light emitting diode array provided in the image forming apparatus. 3 is a block diagram showing a specific example of the control circuit shown in FIG. 2, FIG. 4 is a timing chart for explaining the operation of the control circuit shown in FIG. 3, and FIG. 5 is a block diagram showing a specific example of the control circuit shown in FIG. and FIG. 6 is a circuit diagram for explaining a gradation control technique in a conventional image forming method. 3.4.5... Light emitting diode array Do1~DC1
1, D1-D,. Dy1 to DVN...Light emitting diode 6...Photosensitive material 7.8.9...Self-cleaning lens 11...Frame memory 12...Correction data storage memory 13...N power circuit 14... Pulse width conversion circuit 15... Drive vJ circuit 16... Line memory 17... N-advance counter 18... K-advance counter 19... Comparator 20... Shift register 21...・Latch circuit 22...LED driver agent Patent attorney (8107) Kiyotaka Sasaki (
(and 3 others) Figure 1 < Figure 5 Figure 6

Claims (1)

[Scope of Claims] The amount of light received by the photosensitive material is controlled by supplying a constant current to each light emitting diode of a light emitting diode array and changing the supply time of the current to each light emitting diode according to the gradation level. In the image forming method for forming a half-tone image using the constant current, the current supply time is corrected according to a difference in relative values of the light emitting intensities of the respective light emitting diodes when the constant current is supplied. An image forming method characterized by: