JPS63220641A - Subscriber circuit - Google Patents

Subscriber circuit

Info

Publication number
JPS63220641A
JPS63220641A JP5381187A JP5381187A JPS63220641A JP S63220641 A JPS63220641 A JP S63220641A JP 5381187 A JP5381187 A JP 5381187A JP 5381187 A JP5381187 A JP 5381187A JP S63220641 A JPS63220641 A JP S63220641A
Authority
JP
Japan
Prior art keywords
signal
circuit
pcm
testing
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5381187A
Other languages
Japanese (ja)
Inventor
Kenzo Takada
高田 健三
Hiroyuki Ujiie
氏家 浩幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5381187A priority Critical patent/JPS63220641A/en
Publication of JPS63220641A publication Critical patent/JPS63220641A/en
Pending legal-status Critical Current

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  • Monitoring And Testing Of Exchanges (AREA)

Abstract

PURPOSE:To know an action condition in plural supervising points in detail by sending a signal concerning to an action condition in plural supervising points for testing to an incoming line as a PCM signal by a control signal for testing from an outgoing line, in the test of a subscriber circuit. CONSTITUTION:A subscriber circuit 1' has a circuit part 14 composed of a feeding and supervising circuit 11, a two-wire/four-wire converting circuit 12 and a cordic 13, a multiplexing signal converting means 15 composed of a multiplexing switch 150, an analog/digital converting circuit 151 and a control circuit 152 and a switching means 16 composed of a switching circuit 17. The multiplexing signal converting means 15 receiving a control signal for testing from the outgoing line 20 multiplexes the signal (analog) of respective types of the action condition appearing at plural supervising points for testing of the circuit part 14, digital-converts it, makes it into a PCM signal, sends control signal to the switching means 16, connects the output of the multiplexing signal converting means 15 with the incoming line 21 and sends the PCM signal. The PCM signal is analyzed by a central control unit and respective types of the action condition are displayed.

Description

【発明の詳細な説明】 〔概要〕 加入者回路の試験において、下り回線からの試験用制御
信号により、試験用の複数の監視点における動作状態に
関する信号(アナログ)を多重化してディジタル信号に
変換し、PCM信号として上り回線に送出させて交換機
内部で解析し、詳細な加入者回路の動作状態を把握する
ようにするものである。
[Detailed Description of the Invention] [Summary] In testing subscriber circuits, signals (analog) related to the operating status at multiple monitoring points for testing are multiplexed and converted into digital signals using test control signals from the downlink. The PCM signal is sent to the uplink as a PCM signal and analyzed within the exchange to determine the detailed operating status of the subscriber circuit.

〔産業上の利用分野〕[Industrial application field]

本発明は電子交換機の加入者回路に係わり、特に試験時
において、複数の試験用監視点における動作状態を通報
する加入者回路に関するものである。
The present invention relates to a subscriber circuit of an electronic exchange, and more particularly to a subscriber circuit that reports operating conditions at a plurality of test monitoring points during a test.

加入者回路の試験は個々の加入者回路に試験機を接続し
、発着信機能等に関する良否判定を行っているが、回路
動作の内容を識別して障害処理等に対処するため、良否
判定のみではなく、試験の対象となる監視点の動作状態
を通報できる加入者回路の提供が要望される。
To test subscriber circuits, test equipment is connected to each subscriber circuit to determine pass/fail regarding call/receive functions, etc., but in order to identify the details of circuit operation and deal with failures, etc., only pass/fail determination is performed. Instead, it is desired to provide a subscriber circuit that can report the operating status of the monitoring point to be tested.

〔従来の技術〕[Conventional technology]

第4図は従来例の加入者回路ブロック図である。 FIG. 4 is a block diagram of a conventional subscriber circuit.

図において、加入者回路1に接続される試験器8は交換
機の試験装置(以下TSTと称す)7と連携して使用さ
れる。
In the figure, a tester 8 connected to a subscriber circuit 1 is used in conjunction with a test equipment (hereinafter referred to as TST) 7 of a switching system.

TST7の指示により中央制御装置(以下CCと称す)
6は信号分配装置(以下SDと称す)5に制御情報を与
え、監視・信号回路1oに制御信号を送らせてリレーT
を動作させる。
Central control unit (hereinafter referred to as CC) according to instructions from TST7
6 gives control information to the signal distribution device (hereinafter referred to as SD) 5, causes the monitoring/signal circuit 1o to send a control signal, and relay T
make it work.

動作した接点tO,tI により試験器8が加入者回路
1に接続される。
The activated contacts tO, tI connect the tester 8 to the subscriber circuit 1.

試験器8は発信動作、ダイヤル、着信動作等の試験を行
うが、これ等の試験信号は例えば給電・監視回路11に
おける応答検出やループ監視等の監視点の状態変化(電
圧変化)を起こし、該状態変化は制御・監視回路10に
より走査装置(以下SCNと称す)4に伝達される。
The tester 8 tests outgoing operation, dialing, incoming call operation, etc., and these test signals cause state changes (voltage changes) at monitoring points such as response detection and loop monitoring in the power supply/monitoring circuit 11. The state change is transmitted to the scanning device (hereinafter referred to as SCN) 4 by the control/monitoring circuit 10.

5CN4は該状態変化を走査により検出し、CC6に1
lTlfilすると、CC6は該検出結果の良否を判定
し、T S T7によりプリントアウトする。
5CN4 detects the state change by scanning and sends 1 to CC6.
After lTlfil, CC6 determines whether the detection result is acceptable or not, and prints it out using TST7.

また、試験器8のダイヤルにより、CC6は加入者回路
1をネットワーク2を経由して試験トランク3に接続す
る。
Further, by dialing the tester 8, the CC 6 connects the subscriber circuit 1 to the test trunk 3 via the network 2.

音声信号の試験に関しては、一定のレベルで試験器8か
ら送出された音声信号が接点to、tl。
Regarding the audio signal test, the audio signal sent out from the tester 8 at a constant level is passed through the contacts to and tl.

給電・監視回路11,2#j5f4線変換回路12゜コ
ーデック13.上り回線21.ネソ]・ワーク2゜試験
トランク3の通話路で運ばれ、試験トランク3で音声信
号伝送損失が測定され、CC6の制御によりTST7で
プリントアウトされる。
Power supply/monitoring circuit 11, 2#j5f4-wire conversion circuit 12° codec 13. Uplink 21. The audio signal transmission loss is measured in the test trunk 3, and printed out by the TST 7 under the control of the CC 6.

また、着信側の音声信号伝送損失については試験トラン
ク3から一定レベルの音声信号がネットワーク2.下り
回線20.コーデック13.2線−4線変換回路12.
給電・監視回路11.接点tfl、tl、試験器8に送
られ測定される。
Regarding voice signal transmission loss on the receiving side, a voice signal of a certain level is transmitted from the test trunk 3 to the network 2. Downlink 20. Codec 13. 2-wire to 4-wire conversion circuit 12.
Power supply/monitoring circuit 11. The contacts tfl and tl are sent to the tester 8 and measured.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来の技術にあっては、試験は、応答等の機能に関
する良否を判定するのみで、それ等の機能がどのような
状態であるかを識別することができない問題点がある。
The conventional technology described above has a problem in that the test only determines the quality of functions such as response, but cannot identify the state of these functions.

〔問題点を解決するための手段〕[Means for solving problems]

第1図は本発明の原理ブロック図である。 FIG. 1 is a block diagram of the principle of the present invention.

図において、1゛は時分割電子交換機の加入者回路を示
している。14は回路部、20は下り回線、21ば」ニ
リ回線である。
In the figure, 1' indicates a subscriber circuit of a time division electronic exchange. 14 is a circuit section, 20 is a down line, and 21 is a line.

本発明に関わるものとして、15は回路部14の各種動
作状態を表す複数の試験用監視点に接続された複数の入
力端子の入力信号を、多重化してディジタル変換し、P
CM信号として出力する多重化信号変換手段、16は多
重化信号変換手段15の制御により、上り回線21と回
路部14との接続を、多重化信号変換手段15との接続
に切換える切換手段である。
As related to the present invention, reference numeral 15 multiplexes and digitally converts input signals from a plurality of input terminals connected to a plurality of test monitoring points representing various operating states of the circuit section 14,
A multiplexed signal converter 16 outputs a CM signal, and 16 is a switching device that switches the connection between the uplink 21 and the circuit section 14 to the multiplexed signal converter 15 under the control of the multiplexed signal converter 15. .

〔作用〕[Effect]

下り回線20から試験用制御信号を受信した多重化信号
変換手段15は、回路部14の複数の試験用監視点に現
れる各種動作状態の信号(アナログ)を多重化してディ
ジタル変換し、PCM信号とするとともに、切換手段1
6に制御信号を送って多重化信号変換手段15の出力を
上り回線21に接続させ、該PCM信号を送出する。
The multiplexing signal converting means 15, which has received the test control signal from the downlink 20, multiplexes and digitally converts the signals (analog) of various operating states appearing at the plurality of test monitoring points of the circuit section 14, and converts the signal into a PCM signal. At the same time, the switching means 1
6 to connect the output of the multiplexed signal conversion means 15 to the uplink 21, and send out the PCM signal.

該PCM信号は図示されていない中央制御装置により解
析され上記各種動作状態が表示される。
The PCM signal is analyzed by a central control unit (not shown) and the various operating states are displayed.

かくして、各試験用監視点の動作状態が識別できるので
、障害処理等を的確且つ迅速に行うことができる。
In this way, since the operating state of each test monitoring point can be identified, troubleshooting, etc. can be performed accurately and quickly.

〔実施例〕〔Example〕

以下図示実施例により本発明を具体的に説明する。 The present invention will be specifically explained below with reference to illustrated examples.

第2図は本発明の1実施例の加入者回路ブロック図、第
3図は各種動作状態の転送の説明図である。全図を通じ
同一符号は同一対象物を示す。
FIG. 2 is a block diagram of a subscriber circuit according to an embodiment of the present invention, and FIG. 3 is an explanatory diagram of transfer of various operating states. The same reference numerals indicate the same objects throughout the figures.

第2図において、給電・監視回路11.2線−4線変換
回路12.コーデック13は第1図の回踏部14に対応
し、多重化スイッチ150.アナログディジタル変換回
路151.制御回路152は第1図の多重化信号変換手
段15に対応し、切換回路17は第1図の切換手段16
に対応する。
In FIG. 2, power supply/monitoring circuit 11.2-wire to 4-wire conversion circuit 12. The codec 13 corresponds to the rotary section 14 in FIG. 1, and the multiplexing switch 150. Analog-digital conversion circuit 151. The control circuit 152 corresponds to the multiplex signal conversion means 15 in FIG. 1, and the switching circuit 17 corresponds to the switching means 16 in FIG.
corresponds to

加入者回路1”と試験器8の接続は従来例と同じである
が、該接続と同時にCC6は試験用制御情報CDを下り
回線20を経由して制御回路152に送出する。
The connection between the subscriber circuit 1'' and the tester 8 is the same as in the conventional example, but at the same time as the connection, the CC 6 sends the test control information CD to the control circuit 152 via the downlink 20.

試験用制御情報CDは第3図に示す如く、125μs毎
に送られるPCM受信信号RD(例えば音声)間の空き
時間帯に送られるので通話への支障はない。
As shown in FIG. 3, the test control information CD is sent during the free time between the PCM reception signals RD (for example, voice) sent every 125 μs, so there is no problem with telephone calls.

多重化スイッチ150の入力端子Sl、S2〜Snには
、給電電圧、ループ検出判定レベルやアナログ信号波形
等に関する監視点が接続されており、これ等監視点の状
態(例えば電圧)は制御回路152の制御により多重化
スイッチ150で多重化され、デルタシグマ変調器を含
むアナログディジタル変換回路151で上記監視点の電
圧レベルに応じたパルス数を有するPCM信号に変換さ
れる。
Monitoring points regarding the power supply voltage, loop detection judgment level, analog signal waveform, etc. are connected to the input terminals Sl, S2 to Sn of the multiplexing switch 150, and the status (for example, voltage) of these monitoring points is determined by the control circuit 152. The signal is multiplexed by a multiplexing switch 150 under the control of , and converted into a PCM signal having a pulse number corresponding to the voltage level of the monitoring point by an analog-to-digital conversion circuit 151 including a delta-sigma modulator.

制御回路152は切換回路17を切換え、アナログディ
ジタル変換回路151の出力を上り回線21に接続して
いるので、上記PCM信号は上り回線21に送出され、
ネットワーク2を経由してCC6で解析され、上記の各
試験用監視点の動作状態が元のアナログ量表示でTST
7からプリントアウトされる。これにより、加入者回路
1”の詳細な回路動作を識別できる。
Since the control circuit 152 switches the switching circuit 17 and connects the output of the analog-to-digital conversion circuit 151 to the uplink 21, the PCM signal is sent to the uplink 21.
It is analyzed by CC6 via network 2, and the operating status of each test monitoring point above is displayed as TST in the original analog quantity display.
It is printed out from 7. This allows the detailed circuit operation of the subscriber circuit 1'' to be identified.

上記のPCM信号は第3図に示す如く、125μs毎に
送られるPCM送信信号SD間の空時間帯に、時分割多
重化された順に、即ち、入力端子S1の動作状態情11
Ds1.入力端子S2の動作状態情報D32〜入力端子
Snの動作状態情報DSnと順次送られるので通話に支
障はない。
As shown in FIG. 3, the above PCM signals are transmitted in the free time zone between the PCM transmission signals SD sent every 125 μs in the order in which they are time-division multiplexed, that is, the operating state information 11 of the input terminal S1.
Ds1. Since the operating state information D32 of the input terminal S2 to the operating state information DSn of the input terminal Sn are sent in sequence, there is no problem with telephone calls.

音声信号伝送損失の測定については従来例と同様な接続
で行われるが、コーデック13のアナログ信号側の試験
用監視点からは、該アナログ信号の波形を得ることがで
きるので、より詳細な伝送特性試験が行われる。
The measurement of audio signal transmission loss is performed using the same connection as in the conventional example, but since the waveform of the analog signal can be obtained from the test monitoring point on the analog signal side of the codec 13, more detailed transmission characteristics can be measured. An exam will be held.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く本発明にあっては、複数の監視点にお
ける動作状態を詳細に知ることができるので、交換機建
設時における、加入者回路の各種機能が正常に機能する
かを確認する試験や定期試験が的確にでき、障害時には
障害内容の分析・修理を迅速に行うことができる。
As explained above, according to the present invention, the operational status at multiple monitoring points can be known in detail, so it is possible to carry out regular tests to confirm whether various functions of subscriber circuits are functioning normally when constructing a switch. Tests can be performed accurately, and in the event of a failure, the failure can be analyzed and repaired quickly.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の原理ブロック図、 第2図は本発明の1実施例の加入者回路ブロック図、 第3図は各種動作状態の転送の説明図、第4図は従来例
の加入者回路ブロック図である。 図において、 1゛は加入者回路、 14は回路部、 15は多重化信号変換手段、 16は切換手段、 20は下り回線、 21は上り回線を示す。 従来勃1の加入者回路ブ1 算  4 コッグロ (支)
Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram of a subscriber circuit according to an embodiment of the present invention, Fig. 3 is an explanatory diagram of transfer of various operating states, and Fig. 4 is a subscriber circuit diagram of a conventional example. It is a circuit block diagram. In the figure, 1' is a subscriber circuit, 14 is a circuit section, 15 is a multiplexed signal conversion means, 16 is a switching means, 20 is a downlink, and 21 is an uplink. Conventional Erection 1 subscriber circuit 1 Calculation 4 Koguro (branch)

Claims (1)

【特許請求の範囲】 時分割電子交換機の加入者回路(1′)において、回路
部(14)の各種動作状態を表す複数の試験用監視点に
接続された複数の入力端子の入力信号を多重化してディ
ジタル変換し、PCM信号として出力する多重化信号変
換手段(15)と、前記多重化信号変換手段(15)の
制御により、上り回線(21)と前記回路部(14)と
の接続を前記多重化信号変換手段(15)との接続に切
換える切換手段(16)とを設け、 下り回線(20)からの試験用制御信号により動作され
る前記多重化信号変換手段(15)の前記PCM信号を
、前記切換手段(16)を経由して上り回線(21)に
送出するようにしたことを特徴とする加入者回路。
[Claims] In a subscriber circuit (1') of a time division electronic exchange, input signals of a plurality of input terminals connected to a plurality of test monitoring points representing various operating states of the circuit section (14) are multiplexed. The connection between the uplink (21) and the circuit section (14) is controlled by a multiplex signal converter (15) that converts the signal into a digital signal and outputs it as a PCM signal, and the multiplex signal converter (15). A switching means (16) for switching the connection with the multiplexed signal converting means (15) is provided, and the PCM of the multiplexed signal converting means (15) is operated by a test control signal from the downlink (20). A subscriber circuit characterized in that a signal is sent to an uplink (21) via the switching means (16).
JP5381187A 1987-03-09 1987-03-09 Subscriber circuit Pending JPS63220641A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5381187A JPS63220641A (en) 1987-03-09 1987-03-09 Subscriber circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5381187A JPS63220641A (en) 1987-03-09 1987-03-09 Subscriber circuit

Publications (1)

Publication Number Publication Date
JPS63220641A true JPS63220641A (en) 1988-09-13

Family

ID=12953175

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5381187A Pending JPS63220641A (en) 1987-03-09 1987-03-09 Subscriber circuit

Country Status (1)

Country Link
JP (1) JPS63220641A (en)

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