JPS63217780A - Electronic camera - Google Patents

Abstract

PURPOSE:To constantly clear image by driving a solid-state image pickup device in a field storage mode when an object moves at high speed and in a frame storage mode when it moves at low speed or it is stationary. CONSTITUTION:An object image is formed on the photosensitive surface of a CCD 11 by an image pickup lens 10. An output signal is inputted to a next signal processing circuit 12 and processed so as to be recorded by a video floppy 13. The output of the circuit 12 is recorded on the floppy 13 via a recording amplifier 14. In this electronic camera, the movement of the object is detected by a control circuit 16, as a result, when the moving speed of the object is high, a pulse signal to be driven in the field storage mode is generated from a driving circuit 15 and the CCD 11 is operated in this mode. When the moving speed of the object is low, the movement of the object is similarly detected by the circuit 16, consequently, the pulse for driving in the frame storage mode is generated from the circuit 15 and the CCD 11 operates in the frame storage mode.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an electronic camera, and more particularly to an electronic camera that uses a solid-state imaging device to capture images by field storage or frame storage.

(Prior Art) In recent years, with improvements in semiconductor manufacturing technology, fine pattern processing technology, etc., many small, high-performance electronic devices have been developed and put into practical use.

One such electronic device captures optical images,
A charge-coupled device (CCD) that converts the optical image into an electrical signal
It is now being used to replace traditional image pickup tubes. Particularly recently, CCDs have come to be widely used as imaging devices for electronic cameras that capture and record images of objects entirely electrically.

By the way, as for the electrical performance of such a CCD, the light-receiving characteristics such as light-receiving sensitivity and resolution are particularly important.
In order to improve the light-receiving characteristics of D, various improvements have been made to its structure.

FIG. 4 shows a schematic configuration of a typical interline transfer CCD having excellent light receiving characteristics. In the figure, 2 is a light receiving section formed of a photodiode that receives an optical image, 4 is a vertical register that vertically transfers the signal charge accumulated in the light receiving section 2, and 6 is a signal transferred from the vertical register 4. 8 is a transfer gate for driving and controlling the vertical register and horizontal register 4.6, and 9 is an output that outputs an electric signal based on the signal charge transferred to horizontal register 4. Each amplifier is shown.

(Problems to be Solved by the Invention) The interline transfer CCD having the above configuration is constructed by arranging the light receiving section 2 and the vertical register 4 in pairs, so that a driving pulse is applied to each cell of the vertical register 4. By combining these, it is possible to select frame accumulation, in which charges are accumulated and read out in one photodiode for one frame, and field accumulation, in which charges are accumulated and read out in one field.

While frame accumulation provides high vertical resolution, the photodiode charge accumulation time is limited to one frame (approximately 1/30
(seconds), the disadvantage is that the image becomes blurred, making it impossible to capture a clear image, especially when the subject is moving at a high speed.

On the other hand, in field accumulation, the photodiode accumulation time is 1 field (approximately 1/60 second), which eliminates equivalent afterimages, improves the resolution of moving subject images, and reduces vertical edge flicker. It has advantages such as: On the other hand, when field accumulation is used, the charges accumulated in the light receiving sections 2 of a plurality of lines are read out simultaneously, and although the light receiving sensitivity is better than that of frame accumulation, there is a problem in that the vertical resolution is lowered.

The present invention was made in view of the above circumstances, and an object of the present invention is to provide an electronic camera that can obtain high image quality by changing the driving method of a solid-state imaging device according to the moving speed of a subject. do.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention uses a field accumulation mode when the subject is moving at a fast speed, and when the subject is moving at a slow speed. Alternatively, means is provided for driving the solid-state imaging device in frame accumulation mode when the device is stationary.

(Function) By the means described above, each advantage of field accumulation and frame accumulation is selectively utilized, so that the performance as a whole can be significantly improved and a high-quality signal can be obtained.

(Example) The present invention will be described in detail below using the drawings.

FIG. 1 shows an embodiment of the electronic camera of the present invention, in which a subject image is formed on the photosensitive surface of a CCD 11 by an imaging lens 10. The output signal of the CCD 11 is input to the next signal processing circuit 12 and processed so that it can be recorded on a video floppy 1.3. And signal processing circuit 1
The output signal of 2 is recorded on the video floppy 13 via the recording amplifier 14.

On the other hand, the CCD 11 is driven by a drive circuit 15, and the drive circuit 15 is further controlled by a control circuit 16.

The control circuit 16 is internally equipped with one field memory, to which a part of the output signal from the CCD 11 is applied, and it compares all or part of the signals of the first field and the second field to detect the difference between the video signals. do. Depending on the presence or absence of this difference signal, the drive circuit 15 of the CCD 11 is controlled, and the CCD II
It is configured such that it is possible to select whether to drive in field accumulation mode or frame accumulation mode.

Next, an interline transfer CCD as shown in FIG.
The operation of field storage and frame storage will be explained in detail.

Figure 2 (A) shows the interline transfer C shown in Figure 4.
A schematic configuration diagram of the CD 11 is shown, and FIG. 2(B) shows the transfer gate 103 and vertical register 104 during frame accumulation.
The drive pulse applied to is shown.

In frame accumulation, first, in period T1, in order to read the A field, the drive pulse φ is applied to the COD of the vertical register 104.
V4 ((e) in FIG. 2(B)) is applied to the transfer gate 103, and transfer gate pulse φPT ((a) in the same figure) is applied to the transfer gate 103.
)) is applied. As a result, the signal charge of the photodiode 102-A is transferred to the vertical register 104.
The driving pulse φ is read into the vertical register 104.
By applying Vl ((b) in the figure), signal charges are sequentially transferred from the vertical register 104 every horizontal scanning period.
It is transferred to a horizontal register as shown in FIG.

Next, when all A field reading is completed, a driving pulse φV2 ((C) in the same figure) is applied to the CCD of the vertical register 104 in order to read the B field in period T2.
) is applied to the transfer gate 103, and a transfer gate pulse φPT (FIG. 2(a)) is applied to the transfer gate 103.

As a result, the signal charge of the photodiode 102-B is read into the vertical register 104, and then the signal charge is read into the vertical register 104.
By applying the drive pulse φV3 (FIG. 4(d)) to the signal charge 4, signal charges are sequentially transferred from the vertical register 104 to the horizontal register every horizontal scanning period.

Further, the signal charge transferred to the horizontal register for each field is converted into a clock-like video signal and transferred to the output amplifier. Furthermore, this video signal is amplified by an output amplifier and then input to a subsequent recording signal processing circuit. The video signal is then FM modulated by a recording signal processing circuit and recorded on a video floppy disk, that is, a magnetic sheet.

In this way, in the frame accumulation in the interline transfer CCD II, one photodiode 102 is configured to correspond to one pixel of the TV screen, so the vertical resolution of the subject image is maximized.

Next, field accumulation will be explained with reference to FIGS. 3(A-1), (A-2), and (B).

3(A-1) and (A-2) show the schematic configuration of the interline transfer CCD 11 shown in FIG. 4, and FIG. 3(B) shows the transfer gate 103 and storage register during field storage. The drive pulse applied to 104 is shown.

In field accumulation, as shown in FIG. 3 (A-1), first, in period T1, in order to read field A, a drive pulse φV4 (FIG. 3 (B) is applied to the φv4 gate of vertical register]04
) of (e)) is applied to the transfer gate 103, and a transfer gate pulse φPT (see (a) in the same figure) is applied to the transfer gate 103 to transfer the signal charge of the photodiode 102-A to the vertical register 104.
The data is transferred to the CCD below the φV4 gate. Further, the signal charges accumulated in the CCD under the φV4 gate are mixed with the signal charges under the adjacent φV2 gate via the φv3 gate by applying a driving pulse φV3 (FIG. 2(d)) to the φv3 gate.

Next, in the T2 period, as shown in FIG. 3 (A-2), φv4 of the vertical register 104 is
By applying a drive pulse φV2 (FIG. 10C) to the gate and applying a transfer gate pulse φPT (FIG. 10A) to the transfer gate 103, the signal charge of the photodiode 102-A is transferred to the vertical register 104. CCD under φV2 gate
It is designed to be transferred to Furthermore, the signal charge under the φV4 gate is applied to the φv1 gate by a driving pulse φVl (see (b) in the same figure).
) through the φv1 gate by applying φ
Mixed with the signal under the V2 gate.

The signal charges mixed under the φV2 gate of the vertical register 104 are sequentially transferred to the horizontal register every horizontal scanning period. The signal charge transferred to the horizontal register is converted into a clock pulse-like video signal, and then recorded on a magnetic sheet via an output amplifier and a recording signal circuit.

In the electronic camera according to the present invention having the CCD II configured as described above in the imaging section, the movement of the subject is detected by the control circuit 16, and as a result, if the moving speed of the subject is fast, the field accumulation mode is activated from the drive circuit]5. A driving pulse signal is generated, -10=CCD 11 operates in field accumulation mode.

On the other hand, if the object is moving at a slow speed or is stationary, it is similarly detected by the control circuit 16, and as a result, the drive circuit 15 generates a pulse signal for driving in frame accumulation mode, and the CCD II Operates in frame accumulation mode.

In the above description, it has been explained that field storage and frame storage are automatically switched, but it is of course possible to switch manually.

For example, when photographing a subject that moves at high speed, such as a car race, field accumulation may be used, and when photographing a stationary subject such as a landscape, frame accumulation may be used to capture a fixed image. .

Furthermore, although the above description has been made regarding the case where the technology is applied to an electronic camera, it is needless to say that this technology does not necessarily require a video floppy and can be applied to video cameras and professional cameras.

[Effects of the Invention] As explained above, the electronic camera according to the present invention is configured so that the CCD driving method can be controlled by switching between field accumulation and frame accumulation according to the moving speed of the subject, so that the distal movement is fast. Sometimes field accumulation is used to obtain a clear image with little blur, and when the moving speed is slow, frame accumulation is used to obtain a clear image with high vertical resolution.

[Brief explanation of the drawing]

FIG. 1 is a configuration explanatory diagram showing an embodiment of an electronic camera according to the present invention, and FIG. 2 is an interline transfer C diagram in FIG.
An explanatory diagram when operating a CD in frame accumulation mode,
Figure 3 is an explanatory diagram when the COD in Figure 1 is operated in field storage mode, and Figure 4 is an illustration of the interline transfer CC.
It is a schematic block diagram of D. 11...CCD, 16...control circuit, 15...drive circuit. Applicant's agent Patent attorney Takehiko Suzue (a) φ, E - and - O'to (b) φv1--→8'-Shuku C) φV2 -1--÷--- (d) φV3 -1 Figure 4 (B) Figure 3

Claims (2)

[Claims] (1) In an electronic camera that uses a solid-state imaging device in the optical imaging section, when the subject is moving at a high speed, the drive mode of the drive circuit that drives the solid-state imaging device is set to field accumulation mode, and the 1. An electronic camera comprising a switching means for switching to a frame accumulation mode when the moving speed of the electronic camera is slow or the electronic camera is stationary. (2) The switching means obtains a first field video signal and a second field video signal corresponding to the subject image in order to automatically grasp the movement status of the subject;
detecting a difference between the video signals of the first and second fields;
2. The electronic camera according to claim 1, further comprising a control circuit that outputs a signal for switching to field accumulation when the difference is large and to switching to frame accumulation when the difference is small.