JPS6320549A - Monitor information collecting system - Google Patents

Abstract

PURPOSE:To execute an individual collection of monitor information of the whole computer and a simultaneous collection of monitor information of a VMCP and each virtual computer, by collecting the monitor information of a control program in one of two groups of counters, and collecting the monitor information of the virtual computer in the other. CONSTITUTION:An SVP counter register group 7-1 of an SVP counter register group 7, and an SVP counter register group 7-2 have functions for collecting the monitor information of a VMCP, and for collecting the monitor information of the whole VM, respectively. An SVP monitor mechanism 8 reads out the SVP counter register group 7-1 and 7-2 at a prescribed time interval by a line 107-1 and a line 107-2, respectively. Also, based on the information of an SVP counter register 9-1-i, the monitor information of the VMCP is brought to a screen display on a console device 6 by a line 106, and also, based on the information of an SVP counter register 9-2-i, the monitor information of the whole VM is brought to a screen display on the console device 6 by the line 106.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the monitoring function of computer resources possessed by a service processor, and in particular to a virtual machine that can separately collect monitor information of control programs and monitor information of virtual machines. This paper relates to a monitor information collection method in a computer system.

[Prior Art] FIG. 6 is a schematic diagram of a real computer system, and FIG. 7 is a schematic diagram of a virtual computer system using the real computer shown in FIG.

In Fig. 6, 1 indicates an actual computer system,
The actual computer system 1 includes a central processing unit (CPU) 2.
Main memory (MM)3. Input/output processing unit (IOP)4.
Devices including a service processor (SVP) s and a console device 6 are connected by signal lines 100 to 106.

The main storage device 3 contains the operating system (
(hereinafter referred to as "O8") is stored, and this controls the entire computer system.

On the other hand, in FIG. 7, the real computer system 1 itself has the same configuration as that shown in FIG. 6, but a logical computer (virtual computer, hereinafter referred to as
r V M J) system control program (also called
The difference is that "rVMcP" (hereinafter referred to as "rVMcP") is stored.

By the function of VMCP that simulates hardware, one or more of the above-mentioned virtual computers having an architecture similar to the real computer system 1 are realized.

That is, in FIG. 7, 1-1,
1-2, 1-3 are virtual machines, and each virtual machine has a logical CPU 2-i, a logical main storage device 3-1.
Logical input/output processing device 4-1. It consists of a logical service processor 5-i and a logical console device 6-i.

The logical GPU 2-i of each virtual computer is realized by the VMCP allocating the CPU 2 of the real computer system to each virtual computer in a time-sharing manner. Further, the logical main storage device 3-i of each virtual machine is.

It is allocated as a virtual space created and managed by VMCP. Furthermore, the logical input/output processing device 4-i of each virtual computer is realized by occupying or sharing the counterpart in the real computer system.

In addition, the logical service processor 5-i of each virtual machine
This is realized by exclusively using the service processor 5 of the actual computer system or by simulating similar functions using vMCP commands. The console device 6-i of each virtual computer occupies and uses one console device for each virtual computer.

The monitor information collection function possessed by the service processor S of the actual computer system will be explained with reference to FIG. The svp counter register group 7 includes the SvP counter register 9-i.
(i=1, 2...n). The svp monitor mechanism 8 has a signal line 103-1 (1=1.2...
j), the monitor information of the central processing unit 2 is obtained, and if the computer resource to be monitored is in a specific state at a fixed time interval or every time a specific event occurs, the signal line 107 is used to 111'' is added to the corresponding SvP counter register 9-i of the SvP counter register group 7.

Further, the SvP monitor mechanism 8 has a signal line 104-1 (
1=1.2. ...k), the monitor information of each input/output device is obtained, and if the input/output device to be monitored is in a specific state at a fixed time interval or every time a specific event occurs, a signal is sent. By line 107, "'1" is added to the corresponding SVP counter register 9-i of the SvP counter register group 7.

Furthermore, the SVP monitor mechanism 8 reads out the counter register 9-i through the signal line 107 at regular time intervals, and directly displays this information on the screen of the console device 6 through the line 106.

As mentioned above, the service processor 5 of the actual computer system
has a function of collecting monitor information of the central processing unit 2 and the bathing power processing unit 4 and displaying it on the console device 6.

In addition to the monitor information collection by the service processor 5, the actual calculation meeting system 1 can also collect monitor information by the central processing unit 2.

An example of measuring the performance of a virtual computer system using a hardware monitor mechanism is Macki.
nnon: rVirtual Machine F
ability/370J+(IBM System
m J o n al VOl, 18. NQ 1.

pp. 24 (1979)).

[Problem that the invention seeks to solve]

When the above-mentioned conventional technology is used in a virtual computer system, it is possible to collect monitor information for the entire system.

However, the conventional technique described above has a problem in that it is not possible to collect monitor information for each virtual machine or monitor information only for VMCP.

The present invention has been made in view of the above circumstances, and its purpose is to solve the above-mentioned problems in the conventional monitor information collection method and to collect monitor information of the VMCP and the entire virtual machine separately. , and a monitor information collection method capable of simultaneously collecting monitor information for each virtual machine.

[Means for solving problems]

The above-mentioned object of the present invention is to provide a service processor with a group of counters, which can be used at fixed time intervals or triggered by the occurrence of an event to be monitored to detect when a central processing unit or an input/output device is in a specific state. a computer having a service processor that updates the corresponding counter and displays information on the counter on a console device; and a control program that manages running of one or more operating systems, the control program comprising: In a virtual computer system configured such that a virtual computer is realized for an operating system and each virtual computer is operated on the computer, whether the central processing unit is being used by the control program or by a virtual computer. and means for identifying whether the input/output device is being used by the control program or a virtual machine, and two sets of counters in the service processor are provided, This is achieved by a method for collecting monitor information in a virtual computer system, characterized in that one of the set of counters is configured to collect monitor information of the control program, and the other is configured to collect monitor information of the virtual machine.

[Effect]

As explained below, in the first embodiment of the present invention, two sets of computer resources are provided using registers that identify whether VMC;P is in use or a virtual machine is in use. Monitor information for only virtual machines is set in one of the SvP counter register groups, and monitor information for only VMCP is set in the other.

In addition, in the second embodiment, computer resources are transferred to VMCP.
The value of the register that identifies whether the VMCP is in use or which virtual machine is in use is the value of the register that identifies the VMCP or any virtual machine that is using the SvP counter register group. If they match, monitor information is set in the corresponding SvP counter register group.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram of an SVP monitor showing an embodiment of the present invention. In FIG. 1, symbols 2 to 14 indicate the same components as previously shown in FIGS. 6 to 8. However, Sv
The P counter register group 7 includes two groups 7-1 and 7-2. V in the svp counter register group 7-1.
The SVP counter register group 7-2 has a function of collecting MCP monitor information, and the SVP counter register group 7-2 has a function of collecting all VM overall monitor information. A method for collecting this monitor information will be described later.

15 is a running mode display register, and the value of this register is '1' when running in VMCPMC, and 'O' when running in VM.
”, and 16-Q (Q=1.2...k)
is an in-use mode display register, and the value of the in-use mode display register 16-Q is 464 when the VMCP is using the input/output device monitored by the signal line 104-k.
．． When u and VM are in use, it is “O”.

First, a method of setting the driving mode display register 15 will be explained. When an event that transfers control to the VMCP occurs while the VM is running, the interrupt execution circuit 11 and the interrupt execution microprogram 12 set R1n in the running mode display register 15 via line 110. Also, VMC
When P dispatches a VM, the instruction execution circuit 13 and instruction execution microprogram 14 set "QH" in the running mode display register 15 through line 110 in response to the dispatch instruction.

The in-use mode display register 16-Q is set to 0'' by line 111-R if it is input/output to VM at the start of input/output, and if it is input/output to VMCP, it is set to 0'' by line 111-Q. Set.

Next, a method of updating the SVP counter register group 7-4.7-2 will be explained. The SvP monitor mechanism 8 obtains monitor information of the central processing unit 2 through a signal line 103-Q (Q = 1.2...j), and monitors the information at fixed time intervals or when a specific event occurs. degree, line 108
When the computer resource to be monitored is in a specific state, if the running mode display register 15 is "11", the corresponding SvP counter register 9 of the SvP counter register group 7-1 is selected by the signal line 107-1. -1-i
Add 111 It to the driving mode display register 15.
RQ'', 1'' is added to the corresponding SvP counter register 9-2-i of the SvP counter register group 7-2 via the signal line 107-2.

Further, the SvP monitor mechanism 8 has a signal line 104-Q (Q=
1.2. ), the in-use mode display register 16-k changes to the line 109-k at fixed time intervals or whenever a specific event occurs.
If it is “1”, SvP is set by the signal line 107-1.
"1" is added to the corresponding SVP counter register 9-1-i of the counter register group 7-1, and if the in-use mode display register 16-k is "O", the SVP counter register group is added by the signal line 107-2. 7-2 applicable SvP
Add '11 It to counter register 9-2-i.

The SvP monitor mechanism 8 monitors the line 107-1 at fixed time intervals.
and SvP counter register group 7 by line 107-2.
-1 and 7-2 are read, and based on the information of the SvP counter register 9-1-i, VMCP monitor information is displayed on the screen on the console device 6 via the line 106, and the SvP counter register 9-2 is read out. - Based on the information of i, V
All overall monitor information is sent to the console device 6 via line 106.
to be displayed on the screen.

Next, a second embodiment of the present invention will be described based on FIG.

In FIG. 2, reference numeral 19 denotes a save area address register, which has a function of holding the address of the save area 20 for saving the state of the central processing unit of the currently running VM. The save area 20 stores a VM number, which is a unique number assigned to each VM by the VMCP, and CPU information necessary to start the VM.

In addition, the service processor 5 includes one or more sets of svp counter registers 7-1 (12=1.2.-.m) and V-p counter registers in use.
VM or VMCP ti-m
An ID table 23 is provided.

The VMID table 23 is composed of a plurality of sets (7) of VMID registers 21 and valid bits 22.

When the valid bit 22-Q is 'O', it indicates that the SvP counter register group 7-Q is in an unused state, and when it is '1', it indicates the VMCP corresponding to the VM number stored in the VMID register 21-Q, or Indicates that a specific VM is using the SvP counter register group 7-Q.

When a VM dispatch command is issued specifying the address of the save area 20, the following process is executed. First, the instruction execution circuit 13 and the instruction execution microprogram 14 set the address of the save area 20 in the save area address register 19 via the line 113;
4, the V M I D stored in the save area 20 is set in the V M I D register 17 during running. Furthermore, the instruction execution circuit 13 and the instruction execution microprogram 14 execute the corresponding VM (7) stored in the save area 20.
)-Starts running of the VM by setting status information in the central processing unit 2 via line 100.

Next, when an event occurs that transfers control to the VMCP while the VM is running, the interrupt execution circuit 11 and the interrupt execution microprogram 12 perform the following processing.

First, the line 113 indicates the save area address register 1.
Get the contents of 9 and save area 2 with this as the start address.
0, the state of the central processing unit 2 is saved by line 100. Furthermore, the running VMID register 17 is set to 110" to instruct the VMCP to run. After that, the VM
Performs processing to transfer control to the CP.

Next, when switching VMs using the VM switching mechanism 10, the following processing is performed. First, the UA 113 reads the contents of the save area address register 19, and places the central Next, the VM switching mechanism 10 saves the state of the processing device 2 along the line 100.
Next, the evacuation area 17-2 for the VM to be run is specified.

Further, the address of the save area 20-2 is set in the save area address register 19 by line 113, and the corresponding VM ID is set in the running VMID register 17 by @114. Further, the status information of the selected VM stored in the 1λ save area 20-2 is set in the central processing unit 2 along the line 100, thereby starting the VM.

In the VM ID register 18-Q in use, at the time of starting input/output, if it is a VM input/output, set the VM ID of the corresponding VM from the line 112-Q, and if it is a VMCP(7) input/output, set the VMID of the corresponding VM from the line 112-Q. 112-Q sets "071."

Next, updating of the SvP counter register group 7-set will be explained. The SvP monitor mechanism 8 obtains monitor information of the central processing unit 2 through the signal line 103-1, and determines whether the computer resource to be monitored is in a specific state at a fixed time interval or every time a specific event occurs. , line 117 indicates that V matches the contents of running VMID register 17.
If the MID register 21-Q exists and its valid bit 22-Q is "'1", the corresponding SVP counter register 9-Q of the SvP counter register group 7-2
-i Add "1".

Further, the svp monitor mechanism 8 connects the signal line 104-12 (Q
=1.2. If the input/output device to be monitored is in a specific state at a fixed time interval or whenever a specific event occurs, the monitor information of the input/output device is obtained by k), and if the input/output device to be monitored is in a specific state, If there is a VMID register 21-2 that matches the contents of the VMID register 18-Q and its valid bit 22-Q is "1", the corresponding SvP counter register 9 of the SvP counter register group 7-2
−Q −i Add “1”.

SvP monitor mechanism 8 at fixed time intervals! ! 107-
1. . . . 107-m reads the SvP counter register group 9-2. Then, based on the information of the SvP counter register 9-Q-i (i = 1.2...n), if the valid bit 22-Q is "1", the VM
The monitor information of the VM corresponding to the VMID stored in the ID register 21-Q is displayed on the console device 6 via the line 106. Here, the VMID register 21-
If Q is 0'', it is assumed that it is VMCP monitor information.

Next, the VMID register 21 in the 5VP5 according to the present invention
- The method of setting the party and valid bit 22-Q will be explained. The VMID register 21-Q and valid bit 22-Q are
It is also possible for console device 6 to set the value directly via line 106. Furthermore, it is also possible to specify using a SET command, which will be described later.

As shown in FIG. 3, the SET instruction (SET) is a so-called S-format instruction, and specifies a validity bit (v) 24 and a VMID field 25 in the general-purpose register GRI. When the VMCP issues the SET command, the instruction execution circuit 13 and the instruction execution microprogram 14 set the validity bit 24 and V%IZD:Feed/L/Do 25 indicated in the general register GRI by the line 103-0.
h in the VMIDL/register 21 and the valid bit 22, respectively.

This means that when the valid bit 22-2 is II l gg, the VM
This means that the monitor information of the VM or VM CP for which the ID is set is collected in the SvP counter register group 7-Q.

The specifications of the SET command will be explained below with reference to FIG.

First, ■? that matches the VMID field 25 specified in the general-purpose register GRI by the SET command? , i I
Check whether the D register 21-Q exists or not (step 31), and if so, set the valid pin)-22-
Set the validity bit 24 specified in general register GRI in Q (step 32), program status word P
SW (Program 5tatus Word)
A condition code "0" is set to (step 33).

Next, we will describe the process when there is no vSIID register 21-Q that matches the field 25 from the VM specified in the general register GRI by the SET command (step 31).

First, check whether there is a field in which the valid bit 22 is rr Ou (step 34), and if it exists, the valid bit 22 of this field and V M
The validity bit 24 and VMID field 25 designated by the general-purpose register GRI are set in the ID register 21 as "defined" (step 35), and the condition code 110++ is set in the PSW (step 36).

Also, if there is no field whose valid bit 22 is '0'' (step 34), check whether the validity bit 24 specified in general register GR1 is It I It (step 37), if 7117! For example, set the condition code ``3'' to the PSW (step 3).
8).

Further, if there is no field whose valid bit 22 is rt O++ and the validity bit 24 specified in the general register GRI is 11011 (step 37), a condition code ``'O'' is set in the PSW (step 39).
).

As described above, the condition code is set to 11 by the SET command.
If it is 071, it indicates that the VMIDL/register 21-2 and valid bit 22-Q have been set or cleared normally, and in this embodiment, all of the SVP counter register group 7-Q are in use. Sometimes, when a SET command is issued to another VM or a VMCP that is not in use, the condition code is set to II 3 ++ and an abnormal termination occurs.

Furthermore, the VMID used in software and the VMID used in hardware may be different.

In this case, the VMID conversion mechanism 26 shown in FIG.
Register 17 and in-use VMID register 18-1 (
Q=1.2. ... k) into a VMID used by the hardware.

Furthermore, the VMID register 21-Q is sent from the console device 6.
To set the valid bit 22-Q, it is possible to directly set the value using line 106, or it is also possible to set the result of converting the software VMID to the hardware VMID using line 120. be.

In addition, in the SET command, lines 1i8 and 119 indicate that V
The result of conversion by the MID conversion mechanism 26 is set in the VMID register 21-1.

According to the above embodiment, in the virtual computer system, V
This has the effect that it becomes possible to collect SvP monitor information for M CP and VM separately, and to collect SvP monitor information for every 7M at the same time.

Hereinafter, a sense byte reporting method based on the same concept as shown in the above embodiment will be explained.

In the system as shown in FIG. 7, an input/output control device (not shown) connected to the input/output processing device 4 is a VMCP or O8 on the main storage device 3, which is a host device.
As for the sense byte reporting method for reporting, for example, the method described in Japanese Patent Laid-Open No. 59-221722 is known.

However, when the method shown in the above-mentioned prior art is used in a virtual computer system number, there are the following problems. That is, if an error occurs during input/output and the sense byte is held in the input/output control device, information cannot be transferred between the input/output control device and the lower-level input/output device.

For this reason, in the actual computer system shown in FIG. 6, the O8 issues a sense command to the input/output control device to release the sense byte from being suspended. The above command releases the input/output control device from the busy state, and O3 performs a retry according to the obtained sense byte information.

However, in a virtual machine system like the one shown in Figure 7, if an error occurs due to the input/output of a certain VMI and the sense byte is held in the input/output controller, the input/output controller becomes busy and other VMs or VMCP will not be able to transfer information with input/output devices.

Therefore, when the sense byte pending is reported, the VMCP issues a sense command to release the sense byte pending, release the I/O controller from the busy state, and hold the obtained sense byte. put, and VM
Triggered by the sense command from O3 on I, the above V
Reports the sense bytes held by the MCP to O3.

In the above-mentioned conventional technology, the above-described processing prevents the VMI's sense byte pending from affecting the input/output of other VMs.

However, in this method, the process of reporting the sense byte caused by the input/output of V',i to O8 on 7M is
Since this was done with the intervention of VMCP, which is software, overhead may occur due to VMCP. The method described below makes it possible to eliminate the above overhead.

An example of the system configuration in this case is shown in FIG.

The feature of this system is that a plurality of sets of instructing means indicating whether wait sensing is in progress and sense byte holding means are provided, whereas only one set was used in the past, by specifying an ID, and the central processing unit 2 Which VM or VM CP
a VMID register indicating whether input/output is being processed;
The point is that an ID holding register is provided in the input/output control device 41 in order to identify which VM is executing input/output.

The configuration and operation of the system shown in FIG. 9 will be explained in detail below.

In FIG. 9, symbols 2 to 6, 101 to 107 indicate the same components as shown in FIGS. 1 to 5, and 41
indicates an input/output control device, and 42 indicates an input/output device.

The input/output control device 41 includes a logic circuit 442 and a determination circuit 4.
5. Memory circuit 46. Report circuit 47. ID holding register 4
8. The device interface circuit 49 includes a sense byte 51-x (i
= 1 + 2 + . . . n ) R wait sensing instruction bit 52-i (i=1.2 . . . n) is stored.

The logic circuit 44 executes processing according to processing instructions from the input/output processing device 4, and if an error occurs during processing, it analyzes the error and retries, and if retry is not possible, considers the error information. It has the function of The determination circuit 45 also determines whether an error has occurred during the execution of a processing instruction, whether the error that has occurred can be retried, whether the error that has occurred is the same as the error that occurred immediately before, and whether a series of error processing has been completed. It has the function of making judgments.

The memory circuit 46 also includes the logic circuit 45 and the determination circuit 4.
It has a function of storing the error information determined in step 6.

The reporting circuit 47 has a function of reporting the results of a series of error processing in the input/output control device 41 to the input/output processing device 4 .

The device interface circuit 49 is for receiving and receiving information from the input/output device 42, and has an ID holding register 48.
is newly provided to hold the identification information of the input/output request source. Note that the sense byte 51-i in the storage circuit 46 is configured to store a sense byte for each ID stored in the XD holding register 48, and the wait/sensing indication bit 52-1 is as follows.
This is for displaying whether or not the sense byte 51-1 is in a sense wait state.

The central processing unit 2 also includes a VM that issues input/output instructions.
A VMID register 43 for storing an identifier of the VMID register 43 and a conversion table 55 for converting the number stored in the VMID register 43 into an ID to be sent to the input/output processing device 4 are provided.

First, a method of setting a value to the VMID register 43 will be described. VM dispatch command by VMCP,
Alternatively, when disbatching a VM using firmware, the central processing unit 2 obtains the identifier of the corresponding VM stored in the main storage device 3 through the Ii 100, and writes the above-mentioned identifier into the VMID register 43 through the line 123. Store.

When the oS on the VM issues an input/output command while V3/L is running, the VM uses the hardware mechanism to execute the command.
There are cases where CP's intervention is unnecessary and cases where VMCP's intervention is necessary. If VMCP intervention is unnecessary, the above V
There is no need to change the value of MID register 43.

When VM CP intervenes to simulate VM input/output instructions, the central processing unit 2 , by line 123, the above V
The VM identifier is set in the MID register 43. Further, in the case of VMCP-specific input/output, a specific value, for example, 1107+, is set for the identifier.

Next, the contents of the operation from the activation of the processing command to the reporting of the processing result will be explained in accordance with the processing order.

(1) The central processing unit 2 uses the line 123 to
Obtain the value of the D register 43 and convert it to the conversion table 55 using the line 124.
A corresponding ID is obtained from the input/output processing device, and this ID and an input/output operation start signal are sent to the input/output processing device by alol.

(2) The input/output processing device 4 sends the ID and the input/output operation activation signal to the input/output control device 41 via the line 121.

(3) The input/output control device 41 stores the ID in the ID holding register 48 and instructs the input/output device 42 to operate.

(4) The input/output device 42 reports to the input/output control device 41 that "error X" has occurred during operation.

(5) After the logic circuit 44 creates a sense byte of the above "error X" and stores it in the sense byte 51-i, the judgment circuit 45 judges the above "error If so, the input/output control device 41 instructs the input/output device 42 to continue operating.

(6) The input/output device 42 returns to the input/output device 42 during operation.
The input/output control device 4 indicates that the above-mentioned "error
Report to 1.

(7) When the input/output control device 41 repeats several tries and determines that the input/output control device 41 cannot recover by itself, the wait sensing instruction bit 52-1 indicates that the input/output control device 41 is in wait sensing. is set to "'1" to report to the input/output processing device 4 that the input/output operation has ended abnormally.

(8) Abnormal termination of input/output is reported to O8 on the VM that issued the input/output instruction.

(9) O8 on the VM issues a sense command.

(10) After performing the same processing as the above operations (1) to (3), set the wait sensing instruction bit 52-1 corresponding to the ID stored in the ID holding register 48 to rr.
After setting it to Opp to indicate that wait sensing is not in progress, the sense byte 51-1 is sent to the input/output processing device 4.
Report to.

(11) The sense byte is reported to the O8 on the VM that issued the sense command.

The above is the operation from starting the processing command to reporting the processing result.

Furthermore, even if the sense byte of a certain VM is pending in the input/output control device 41, other VMs or VMCP-specific input/outputs can be handled by pretending that the input/output control device 41 is in a non-busy state. ■M or V Ni C
P is capable of information transfer with the input/output device 42 under the input/output control 12ffi41.

As described above, according to the above system, the input/output control device is provided with wait sense instruction information, sense byte, and I/O controller.
By providing multiple sets of D and specifying the above ID for input/output, the suspension of sense bytes due to the input/output of a virtual machine will not affect the input/output of other temporary computers. This has the effect of reducing the CPU overhead of the virtual machine control program.

〔Effect of the invention〕

As described above, according to the present invention, the service processor has a group of counters, and the central processing unit or input/output device is in a specific state at a fixed time interval or triggered by the occurrence of a monitored event. a computer having a service processor that updates the corresponding counter if necessary and displays the information of the counter on a console device; and a control program that manages the running of one or more operating systems; The control program realizes a virtual computer for the operating system, and in a virtual computer system configured to run each virtual computer on the computer, the control program determines whether the central processing unit is being used by the control program. , or means for identifying whether the virtual machine is in use, and means for identifying whether the input/output device is being used by the control program or by the virtual machine, and a counter group in the service processor. Two sets of counters are provided, and one of the two sets of counters collects the monitor information of the control program, and the other sets of counters collects the monitor information of the virtual machine. Therefore, the monitor information of the VMCP and the entire virtual machine can be collected separately. VM CP and monitor information for each virtual machine can be collected at the same time.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an SVP monitor showing one embodiment of the present invention, Fig. 2 is a block diagram showing another embodiment of the present invention, Fig. 3 is an explanatory diagram of the SET command in the present invention, and Fig. 4 is a processing flowchart of the SET command, FIG. 5 is a block diagram showing still another embodiment of the present invention, FIG. 6 is a block diagram showing an example of a conventional live-action computer system, and FIG. 7 is a block diagram of a conventional virtual computer system. FIG. 8 is a block diagram showing an example of a system, FIG. 8 is a block diagram of a conventional SvP monitor, and FIG. 9 is a block diagram explaining a sense byte reporting method. 1: Real computer system, 1-1: Virtual computer system,
2: Central processing unit, 3: Main storage device, 4: Input/output processing device, 5: Service processor, 6: Console device, 7
: SVP counter register group, 8: SVP monitor mechanism, 9: SVP counter register, 10: VM
Switching mechanism, 1 to 2 interrupt execution circuits, 12: Interrupt execution program, 13: Instruction execution circuit, 14: Instruction execution program, 15: Running mode display register, 16: Used mode display register, 17: Running VMIDL/Jister , 18: In use v , yx I D L/ Sister, 1
9: Save area address register, 20: Save area, 21
:VMID register, 22: Valid bit, 23: VMI
D table, 24: Validity bit, 25: VMI
D feed/L/do, 26: VMID converter, 41: input/output control device, 42: input/output device, 43: VMID register, 44: logic circuit, 45: judgment circuit, 46: memory circuit, 47: report Circuit, 48: ID holding register, 49 Device interface circuit, 51: Sense byte, 5
2: Wait sense instruction bit, 55: Conversion table, l
σ0 to 124: Signal line. Shou l Concave 2nd mouth 3rd concave 40 5th concave 6 Figure 7th area 8th Σ Name 90

Claims (1)

[Claims] 1. The service processor has a group of counters, and if the central processing unit or input/output device is in a specific state at a fixed time interval or triggered by the occurrence of an event to be monitored, a computer having a service processor that updates the counter corresponding to the above and displays the information of the counter on a console device, and a control program that manages running of one or more operating systems, the control program In a virtual computer system configured to realize a logical computer (virtual computer) for the operating system and run each virtual computer on the computer, whether the central processing unit is being used by the control program; Alternatively, a means for identifying whether the virtual machine is in use, a means for identifying whether the input/output device is being used by the control program or by the virtual machine, and a counter group in the service processor is provided. A method for collecting monitor information in a virtual computer system, characterized in that two sets of counters are provided, one of the two sets of counters collects monitor information of the control program, and the other sets of counters collect monitor information of the virtual machine. 2. The service processor has a group of counters, and when the central processing unit or input/output device is in a specific state, the corresponding counter is set at a certain time interval or triggered by the occurrence of a monitored event. a computer having a service processor that updates and displays information on the counter on a console device; and a control program that manages the running of one or more operating systems, the control program controlling the operating system. In a virtual computer system configured to implement virtual computers and run each virtual computer on the computer, means for identifying whether the central processing unit is being used by the control program or the virtual computer;
means for identifying whether the control program or the virtual machine is using the input/output device; 1. A method for collecting monitor information in a virtual computer system, characterized in that a necessary number of sets of identifiers are provided, and monitor information of a virtual machine or the control program corresponding to the set of identifiers is collected in a corresponding counter group.