JPS6320439U - - Google Patents
Info
- Publication number
- JPS6320439U JPS6320439U JP11511486U JP11511486U JPS6320439U JP S6320439 U JPS6320439 U JP S6320439U JP 11511486 U JP11511486 U JP 11511486U JP 11511486 U JP11511486 U JP 11511486U JP S6320439 U JPS6320439 U JP S6320439U
- Authority
- JP
- Japan
- Prior art keywords
- board
- chip
- terminal
- utility
- outside
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11511486U JPS6320439U (en18) | 1986-07-25 | 1986-07-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11511486U JPS6320439U (en18) | 1986-07-25 | 1986-07-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6320439U true JPS6320439U (en18) | 1988-02-10 |
Family
ID=30998474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11511486U Pending JPS6320439U (en18) | 1986-07-25 | 1986-07-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6320439U (en18) |
-
1986
- 1986-07-25 JP JP11511486U patent/JPS6320439U/ja active Pending