JPS6320105Y2 - - Google Patents

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Publication number
JPS6320105Y2
JPS6320105Y2 JP9617182U JP9617182U JPS6320105Y2 JP S6320105 Y2 JPS6320105 Y2 JP S6320105Y2 JP 9617182 U JP9617182 U JP 9617182U JP 9617182 U JP9617182 U JP 9617182U JP S6320105 Y2 JPS6320105 Y2 JP S6320105Y2
Authority
JP
Japan
Prior art keywords
electrode
internal
dielectric ceramic
electrodes
internal electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9617182U
Other languages
Japanese (ja)
Other versions
JPS58196826U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9617182U priority Critical patent/JPS58196826U/en
Publication of JPS58196826U publication Critical patent/JPS58196826U/en
Application granted granted Critical
Publication of JPS6320105Y2 publication Critical patent/JPS6320105Y2/ja
Granted legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【考案の詳細な説明】 本考案は積層セラミックコンデンサに関し、特
に複数の静電容量を有しかつ外部電極の接続の仕
方によって静電容量を選択できるものに関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multilayer ceramic capacitor, and particularly to a multilayer ceramic capacitor that has a plurality of capacitances and allows the capacitance to be selected depending on how external electrodes are connected.

従来の積層セラミックコンデンサは、例えば第
6図第7図に示す様なものが一般的である。すな
わち誘電体磁器1の内部にこの誘電体磁器1を介
して互いに対向する内部電極2、3を設け、各内
部電極2、3の取出し部に外部電極4、5を導通
接続させた構造であり、その電気的等価回路は第
8図の如くである。この様な構成では1つの積層
セラミックコンデンサにおいて、その静電容量は
積層印刷工程での内部電極数によって決定され、
したがって1つの積層セラミックコンデンサには
1つの固定された静電容量しか得られなかった。
Conventional multilayer ceramic capacitors are generally shown in FIGS. 6 and 7, for example. That is, it has a structure in which internal electrodes 2 and 3 are provided inside the dielectric ceramic 1 and are opposed to each other via the dielectric ceramic 1, and external electrodes 4 and 5 are conductively connected to the lead-out portions of the internal electrodes 2 and 3. , its electrical equivalent circuit is shown in FIG. In such a configuration, the capacitance of one multilayer ceramic capacitor is determined by the number of internal electrodes in the multilayer printing process.
Therefore, only one fixed capacitance could be obtained in one multilayer ceramic capacitor.

本考案は、この様な従来の固定形積層セラミッ
クコンデンサの欠点を解消し、複数の静電容量を
有しかつ外部電極の接続の仕方によって静電容量
を選択できる積層セラミックコンデンサの提供を
目的とする。
The purpose of the present invention is to eliminate the drawbacks of conventional fixed-type multilayer ceramic capacitors, and to provide a multilayer ceramic capacitor that has multiple capacitances and allows the capacitance to be selected depending on how the external electrodes are connected. do.

本考案は、このため誘電体磁器の同一面内に互
に対称あるいは非対称な複数の内部電極を設けて
それぞれの外部電極に接続し、この内部電極に誘
電体磁器を介して対向する別の内部電極を設けて
これを前記外部電極とは別の外部電極に接続した
積層セラミックコンデンサを提供する。
For this reason, the present invention provides a plurality of mutually symmetrical or asymmetric internal electrodes in the same plane of dielectric ceramic, connects them to each external electrode, and connects the internal electrodes to another internal electrode facing each other through the dielectric ceramic. A multilayer ceramic capacitor is provided in which an electrode is provided and the electrode is connected to an external electrode different from the external electrode.

以下本考案の一実施例を第1図乃至第3図によ
り説明すると、11は誘電体磁器、12a、12
bは誘電体磁器11の同一面内に位置する互に対
称あるいは非対称な内部電極であり、上下に間隔
をあけて一対づつ設けられている。13は誘電体
11を介して前記内部電極12a、12bと対向
する位置に設けた別の内部電極であり、上下の前
記内部電極12a、12a間及び12b、12b
間に位置している。すなわち、誘電体磁器11上
に内部電極12a、12bを印刷形成し、その上
に誘電体磁器11を設けて内部電極13を印刷形
成し、さらに誘電体磁器11を設けて内部電極1
2a、12bを印刷形成し、その上に誘電体磁器
11を形成している。14、15は夫々内部電極
12a、12bに接続された外部電極、16、1
7は内部電極13に接続された外部電極である。
An embodiment of the present invention will be described below with reference to FIGS. 1 to 3. Reference numeral 11 is dielectric ceramic;
Reference characters b denote mutually symmetrical or asymmetrical internal electrodes located within the same plane of the dielectric ceramic 11, and are provided in pairs vertically at intervals. Reference numeral 13 denotes another internal electrode provided at a position facing the internal electrodes 12a, 12b via the dielectric 11, and between the upper and lower internal electrodes 12a, 12a and 12b, 12b.
It is located in between. That is, the internal electrodes 12a and 12b are formed by printing on the dielectric ceramic 11, the dielectric ceramic 11 is provided thereon and the internal electrodes 13 are formed by printing, and the dielectric ceramic 11 is further provided and the internal electrodes 1 are formed by printing.
2a and 12b are formed by printing, and the dielectric ceramic 11 is formed thereon. 14 and 15 are external electrodes connected to the internal electrodes 12a and 12b, respectively; 16 and 1
7 is an external electrode connected to the internal electrode 13.

この様な構成によると、第3図に示す様な電気
的等価回路となり、同一のコンデンサ内に複数の
静電容量を得ることができ、外部電極の接続の仕
方によって任意の静電容量を選択することができ
る。
With such a configuration, an electrical equivalent circuit as shown in Figure 3 is obtained, and multiple capacitances can be obtained in the same capacitor, and any capacitance can be selected depending on how the external electrodes are connected. can do.

第4図と第5図はそれぞれ他の実施例を示し、
第4図は前記内部電極13を互に独立した2枚の
内部電極13a、13bに分割し、その外部電極
も16a、16bと17a、17bに分割したも
のであり、第5図は内部電極13を適宜内部電極
12a又は12bと対向する様に複数の内部電極
13c、13d、13eに分割し、それぞれの外
部電極18、19、20を設けたものである。こ
の様に本考案は図示の実施例に限らず、種々の変
形が可能である。
4 and 5 show other embodiments,
In Fig. 4, the internal electrode 13 is divided into two mutually independent internal electrodes 13a and 13b, and the external electrodes are also divided into 16a, 16b and 17a, 17b, while in Fig. 5, the internal electrode 13 is divided into a plurality of internal electrodes 13c, 13d, and 13e so as to face the internal electrode 12a or 12b as appropriate, and each is provided with external electrodes 18, 19, and 20. In this way, the present invention is not limited to the illustrated embodiment, and various modifications are possible.

本考案の積層セラミックコンデンサによれば、
以上の説明から明らかな様に、誘電体磁器の同一
面内に互に対称あるいは非対称な複数の内部電極
を設け、この内部電極に誘電体磁器を介して別の
内部電極を対向させているので、複数の静電容量
を持ったコンデンサが得られ、しかも外部電極の
接続の仕方によって任意の静電容量を選択するこ
とができる。
According to the multilayer ceramic capacitor of the present invention,
As is clear from the above explanation, a plurality of mutually symmetrical or asymmetrical internal electrodes are provided on the same surface of the dielectric ceramic, and another internal electrode is opposed to this internal electrode via the dielectric ceramic. , a capacitor with a plurality of capacitances can be obtained, and any capacitance can be selected depending on how the external electrodes are connected.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の平面図、第2図は
同縦断側面図、第3図は同電気的等価回路図、第
4図及び第5図の他の実施例の平面図、第6図は
従来例の縦断正面図、第7図は同平面図、第8図
は電気的等価回路図である。 11は誘電体磁器、12a,12bは内部電
極、13,13a,13b,13c,13d,1
3eは他の内部電極、14,15,16,16
a,16b,17,17a,17b,18,1
9,20は外部電極。
FIG. 1 is a plan view of one embodiment of the present invention, FIG. 2 is a longitudinal sectional side view of the same, FIG. 3 is an electrical equivalent circuit diagram of the same, and plan views of other embodiments of FIGS. 4 and 5. FIG. 6 is a longitudinal sectional front view of the conventional example, FIG. 7 is a plan view thereof, and FIG. 8 is an electrical equivalent circuit diagram. 11 is dielectric ceramic, 12a, 12b are internal electrodes, 13, 13a, 13b, 13c, 13d, 1
3e is another internal electrode, 14, 15, 16, 16
a, 16b, 17, 17a, 17b, 18, 1
9 and 20 are external electrodes.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 誘電体磁器の同一面内に互に対称あるいは非対
称な複数の内部電極を設けてそれぞれの外部電極
に接続し、この内部電極に誘電体磁器を介して対
向する別の内部電極を設けてこれを前記外部電極
とは別の外部電極に接続した積層セラミックコン
デンサ。
A plurality of mutually symmetrical or asymmetric internal electrodes are provided in the same plane of dielectric ceramic and connected to each external electrode, and another internal electrode is provided opposite to this internal electrode via dielectric ceramic to connect this internal electrode. A multilayer ceramic capacitor connected to an external electrode different from the external electrode.
JP9617182U 1982-06-26 1982-06-26 Multilayer ceramic capacitor Granted JPS58196826U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9617182U JPS58196826U (en) 1982-06-26 1982-06-26 Multilayer ceramic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9617182U JPS58196826U (en) 1982-06-26 1982-06-26 Multilayer ceramic capacitor

Publications (2)

Publication Number Publication Date
JPS58196826U JPS58196826U (en) 1983-12-27
JPS6320105Y2 true JPS6320105Y2 (en) 1988-06-03

Family

ID=30229316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9617182U Granted JPS58196826U (en) 1982-06-26 1982-06-26 Multilayer ceramic capacitor

Country Status (1)

Country Link
JP (1) JPS58196826U (en)

Also Published As

Publication number Publication date
JPS58196826U (en) 1983-12-27

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