JPS6319904A - Antenna system - Google Patents

Antenna system

Info

Publication number
JPS6319904A
JPS6319904A JP16528386A JP16528386A JPS6319904A JP S6319904 A JPS6319904 A JP S6319904A JP 16528386 A JP16528386 A JP 16528386A JP 16528386 A JP16528386 A JP 16528386A JP S6319904 A JPS6319904 A JP S6319904A
Authority
JP
Japan
Prior art keywords
phase
shifters
bits
phase shifter
phase shifters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16528386A
Other languages
Japanese (ja)
Inventor
Isamu Chiba
勇 千葉
Seiji Mano
真野 清司
Kenichi Hario
針生 健一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16528386A priority Critical patent/JPS6319904A/en
Publication of JPS6319904A publication Critical patent/JPS6319904A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve the phase setting accuracy and at the same time to shorten the time needed for calculation of the phase setting value, by giving fine cuts to some phase shifters and controlling these shifters to set the sensitivity at zero in the undesired wave arriving direction. CONSTITUTION:The radio waves received by element antennas Ea1-EaN undergo the phase shifts through phase shifters PL1-PLL and PM1-PMM and are synthesized by a synthesizer 1. These synthesized radio waves are transmitted to a receiver 2. A control processor 4 calculates a phase that merely turns a main beam to the desired direction for the phase shifters PL1-PLL of PL bits with rough cuts. While the processor 4 sets the sensitivity at zero in the undesired wave arriving direction instructed by an angle instructing circuit 5 and also calculates a phase that turns the main beam in the desired direction for the phase shifters PM1-PMM of PM bits (PM>PL) with fine cuts. Then a phase shifter controller 3 and a PM-bit phase, shifter controller 6 are actuated. As a result, the number of phase shifters performing complicated calculations are decreased. Thus it is possible to shorten the time needed for calculation of the phase setting value and also to improve the phase setting value owing to the control carried out by phase shifters having fine cuts.

Description

【発明の詳細な説明】 〔従来の技術〕 第4図は例えば特開昭和57−38003号公報に示さ
れた従来のアンテナ装置の構成を示すブロック線図であ
る。図において、  Eal、 Ea2.・・・。
DETAILED DESCRIPTION OF THE INVENTION [Prior Art] FIG. 4 is a block diagram showing the configuration of a conventional antenna device disclosed in, for example, Japanese Unexamined Patent Publication No. 57-38003. In the figure, Eal, Ea2. ....

EaN は素子アンテナ、  pLl、 pL2. ・
、 PLNは移相器、(1)は合成スL 12)は受信
器、(3)は移相2]制仰装置、(4)は制御プロセッ
サ、(5)は角度指示回路である。
EaN is an element antenna, pLl, pL2.・
, PLN is a phase shifter, (1) is a synthesis switch L12) is a receiver, (3) is a phase shift 2] control device, (4) is a control processor, and (5) is an angle indicating circuit.

次に動作について説明する。ここではこのアンテナを受
信装置として用いる場合を例として説明する。素子アン
テナEa1. Ea2.・・・、 EaNで受信された
電波は、移相3 PLl、 P、 2.・・・、PLN
によって位相を変えられる。次いで、各位相器の出力信
号を合成器(1)で合成する。この合成した信号を受信
機(2)に伝送する0通常のビーム走査を行なう場合に
は、ビーム走査に必要な各移相器の設定置を制御プロセ
ッサ(4)が計算し、上記制御プロセッサの演算結果に
従って移相器制剤装置(3)が各移相器を設定してビー
ム走査を行なう。以上述べた動作は通常のフェーズドア
レーアンテナの動作で、このときの放射パターンを第5
図に示す。
Next, the operation will be explained. Here, the case where this antenna is used as a receiving device will be explained as an example. Element antenna Ea1. Ea2. ..., the radio wave received by EaN has a phase shift of 3 PLl, P, 2. ..., PLN
The phase can be changed by Next, the output signals of each phase shifter are combined by a combiner (1). This combined signal is transmitted to the receiver (2).0 When performing normal beam scanning, the control processor (4) calculates the setting position of each phase shifter necessary for beam scanning, and According to the calculation results, the phase shifter control device (3) sets each phase shifter to perform beam scanning. The operation described above is the operation of a normal phased array antenna, and the radiation pattern at this time is
As shown in the figure.

妨害波やクラッタが存在する場合には上記の動作に加え
て、不要波の到米方向に放射パターンの零点を形成する
必要がある。この時には9次の動作を行なう。まず角度
指示回路(5)が妨害波やクラッタ等の不要波の到米方
向を制御プロセッサ(4)に指示する。制御プロセッサ
(4)は、主ビーム方向のレベルを維持して、不要波到
来方向に放射パターンの零点を形成するための移相5 
P、 +、 pL、 2.・・・。
If interference waves or clutter are present, in addition to the above operations, it is necessary to form a zero point of the radiation pattern in the direction in which the unwanted waves arrive. At this time, a ninth-order operation is performed. First, the angle instruction circuit (5) instructs the control processor (4) about the direction in which unwanted waves such as interference waves and clutter will arrive. The control processor (4) maintains the level in the main beam direction and performs a phase shift 5 for forming the zero point of the radiation pattern in the direction of arrival of unwanted waves.
P, +, pL, 2. ....

PLNの位相設定量を計算する。この計算方法について
は最急降下法5equential Unconstr
ainedMinimizat ion Techni
que (SU M T ) 、共役勾配法等の非線形
最適化手法が用いられていた。
Calculate the phase setting amount of PLN. For this calculation method, see steepest descent method 5Equential Unconstr
ainedMinimization Techni
Nonlinear optimization techniques such as que (SU M T ) and conjugate gradient method have been used.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来のアンテナ装置は以上のように構成されているので
、素子数が多い場合、各移相器の設定移相短について、
上記計算方法を適用するため計算時間がかかり、また、
ディジタル移相器を用いるため、設定移相誤差が生じ、
良好t$点深度が得られないなどの問題点があった。第
6図は放射パターンのθ、からθNの範囲に零点を形成
したときの劣下を示す。
Since the conventional antenna device is configured as described above, when the number of elements is large, the phase shift setting of each phase shifter is
Applying the above calculation method takes calculation time, and
Since a digital phase shifter is used, a setting phase shift error occurs,
There were problems such as not being able to obtain a good t$ point depth. FIG. 6 shows the degradation when a zero point is formed in the range of θ to θN of the radiation pattern.

この発明は上記のような問題点を解消するためになされ
たもので、零点を形成するための設定位相を求める演算
時間を短縮すると共に設定位相の精度を上げることがで
きるアンテナ装置を得ることを目的とする。
This invention was made in order to solve the above-mentioned problems, and aims to provide an antenna device that can shorten the calculation time for determining the set phase for forming a zero point and increase the precision of the set phase. purpose.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係るアンテナ装置は各素子アンテナにつなが
れた移相器のうち、一部の移相器のビットを上げて、上
記ビットを上げた移相器のみを制御して、希望波到来方
向の電界レベルを一定値以上に保ち、かつ不要波到来方
向に零点を形成するように調整したものである。
The antenna device according to the present invention increases the bits of some of the phase shifters connected to each element antenna, controls only the phase shifters whose bits have been raised, and adjusts the arrival direction of the desired wave. Adjustment is made to maintain the electric field level above a certain value and to form a zero point in the direction in which unwanted waves arrive.

〔作 用〕[For production]

この発明に8けるアンテナ装置は、各素子アンテナにつ
ながれた移相器のうち、一部の移相器を零点の形成のた
めに用いることにより設定位相を決める演算時間は短縮
され、また、上記一部の移相器のビットを上げることに
より、零点を形成するための設定位相の精度を上げるこ
とができる。
The antenna device according to the eighth aspect of the present invention uses some of the phase shifters connected to each element antenna to form a zero point, so that the calculation time for determining a set phase is shortened. By increasing the bits of some of the phase shifters, it is possible to increase the accuracy of the set phase for forming the zero point.

〔実施例〕〔Example〕

以下、この発明の実施例を図について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図はこの発明の一実強例を示すブロック線図で図に
おいてPLl、 PL2.・・・、P、NはL個のビッ
ト数PLの移相器、 PMl、 PM2.・・・、PM
NはM個のビット数PM(PM>PL)  の移相器、
(6)はこの2Mビット移相器を制御するmビット移相
器制御装置他の部分は上記従来装置と同様のものである
。以下、その動作について説明する。
FIG. 1 is a block diagram showing one practical example of the present invention. In the figure, PLl, PL2. ..., P, N are phase shifters of L bits PL, PMl, PM2 . ..., P.M.
N is a phase shifter with M bits PM (PM>PL),
(6) is an m-bit phase shifter control device for controlling this 2M-bit phase shifter.Other parts are similar to the conventional device described above. The operation will be explained below.

放射パターンの零点方向kに2けるi番目の素子電界の
振幅をaik+位相をpikl  主ビーム方向に8け
るi番目の素子電界の振幅をato+ 位相をPioo
  i番目の素子に与える励振位相をQiとすると評価
関数fは次式で表わされる。
The amplitude of the i-th element electric field at 2 in the zero point direction k of the radiation pattern is aik + the phase is pikl The amplitude of the i-th element electric field at 8 in the main beam direction is ato + The phase is Pioo
When the excitation phase given to the i-th element is Qi, the evaluation function f is expressed by the following equation.

但し。however.

従って、上記口1式の評価関数fを最小にするような設
定位相を上記制御プロセッサ(4)が計算し。
Therefore, the control processor (4) calculates a set phase that minimizes the evaluation function f of the first equation.

この結果をPMビット移相器制制御置(6)に与えるこ
とにより、  PMl、 PM2.・・・、 PMN 
 の移相器が調整され第2図に示すようなθ、からθN
の範囲に零点を形成した放射パターンが得られる。尚1
図中の破線部分は従来のこの種のアンテナ装置を用いて
零点を形成したときの零点深度の劣下を示す。
By giving this result to the PM bit phase shifter control device (6), PMl, PM2 . ..., PMN
The phase shifter is adjusted from θ to θN as shown in Figure 2.
A radiation pattern with zero points in the range is obtained. Sho 1
The broken line portion in the figure shows the deterioration of the zero point depth when a zero point is formed using a conventional antenna device of this type.

又、第3図にこのアンテナ装置の制量フローチャートを
示す。
Further, FIG. 3 shows a flowchart for controlling the antenna device.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、各素子アンテナにつ
ながれた移相器のうち、一部の移相器を希望波到来方向
の電界レベルを一定値以上に保ち。
As described above, according to the present invention, among the phase shifters connected to each element antenna, the electric field level of some of the phase shifters in the direction of arrival of the desired wave is maintained at a certain value or higher.

かつ、不要波到来方向に零点を形成するために用い、上
記一部の移相器のビットを上げたことにより、設定位相
の演算時間を短縮すると共に、$点を形成するための設
定位相の精度を上げることができる。
In addition, by increasing the bits of some of the phase shifters mentioned above, which are used to form a zero point in the direction of arrival of unwanted waves, the calculation time for the set phase is shortened, and the set phase for forming the $ point is reduced. Accuracy can be increased.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実弛例を示すブロック線図、第2
図はこのアンテナ装置による零点を形成した放射パター
ンを示す図、第3図はこのアンテナ装置の制御動作を示
すフローチャート、第4図は従来のアンテナ装置の構成
を示すブロック線図。 第5図は通常のフェーズドアレーの放射パターンを示す
図、第6図は従来のアンテナ装置による零点を形成した
放射パターンを示す図である。 図において+  Ea’+ Eaz、・・・、EaNは
素子アンテナ、  P、1. PL2.・・・、PLN
はPNビットの移相器。 fl+は合成器、+2)は受信機、X3)は移相器制剤
装置。 (4)は制御プロセッサ、(5)は角度指示回路、(6
)はPMビット移相器制圓装置、  PMl、 PM2
.・・・、PMNは2Mビットの移相2ギである。 な29図中、同一符号は同一、又は相当部分を示す。
FIG. 1 is a block diagram showing an example of the present invention;
3 is a flowchart showing the control operation of this antenna device, and FIG. 4 is a block diagram showing the configuration of a conventional antenna device. FIG. 5 is a diagram showing a radiation pattern of a normal phased array, and FIG. 6 is a diagram showing a radiation pattern in which a zero point is formed by a conventional antenna device. In the figure, +Ea'+Eaz,..., EaN are element antennas, P, 1. PL2. ..., PLN
is a PN bit phase shifter. fl+ is a synthesizer, +2) is a receiver, and X3) is a phase shifter regulator. (4) is a control processor, (5) is an angle instruction circuit, (6
) are PM bit phase shifter control devices, PMl, PM2
.. ..., PMN has a 2M bit phase shift of 2G. In Figure 29, the same reference numerals indicate the same or equivalent parts.

Claims (2)

【特許請求の範囲】[Claims] (1)複数個の素子アンテナ、上記各素子アンテナにつ
ながれたディジタル移相器、電力分配器、上記移相器を
制御する移相器制御装置、希望信号波と複数の不要信号
波の到来方向を指示する角度指示回路、希望信号波到来
方向に主ビームを向け、不要信号波到来方向に放射パタ
ーンの零点を形成するために上記移相器に与える設定位
相を計算する制御プロセッサとを備えたアンテナ装置に
おいて、上記素子アンテナ及び移相器の個数をそれぞれ
N個とし、このうちL個(L<N)の移相器のビット数
をP_Lとし、M個(M=N−L)の移相器のビット数
をPM(但し、P_M>P_L)とするとき、上記制御
プロセッサが、上記P_Lのビットを有するL個の移相
器の設定位相を不要信号波の到来しない状態で主ビーム
を希望信号波到来方向に向ける位相に固定し、P_Mの
ビットを有するM個の移相器の設定位相を希望信号波到
来方向の主ビームのレベルを一定値以上に保ち、かつ不
要波到来方向に零点を形成するように調整し、演算時間
を短縮すると共に、零点を形成するための設定位相の精
度を上げたことを特徴とするアンテナ装置。
(1) Multiple element antennas, a digital phase shifter connected to each of the element antennas, a power divider, a phase shifter control device that controls the phase shifter, and directions of arrival of the desired signal wave and multiple unnecessary signal waves. and a control processor that calculates a set phase to be given to the phase shifter in order to direct the main beam in the direction of arrival of the desired signal wave and form the zero point of the radiation pattern in the direction of arrival of the unwanted signal wave. In the antenna device, the number of element antennas and phase shifters is each N, the number of bits of L (L<N) phase shifters is P_L, and the number of bits of L (L<N) phase shifters is P_L. When the number of bits of the phase shifter is PM (however, P_M>P_L), the control processor adjusts the set phases of the L phase shifters having the P_L bits so that the main beam is transmitted in a state where no unnecessary signal waves arrive. The phase is fixed to the direction in which the desired signal wave arrives, and the set phase of the M phase shifters having bits P_M is set so that the level of the main beam in the direction in which the desired signal wave arrives is kept above a certain value, and the phase is directed in the direction in which the unwanted signal arrives. An antenna device that is adjusted to form a zero point, shortens calculation time, and increases the accuracy of a set phase for forming a zero point.
(2)上記M個の移相器としてアナログ移相器を使用し
、上記アナログ移相器にアナログ移相器制御回路を接続
したことを特徴とする特許請求の範囲第(1)項記載の
アンテナ装置。
(2) An analog phase shifter is used as the M phase shifters, and an analog phase shifter control circuit is connected to the analog phase shifter. antenna device.
JP16528386A 1986-07-14 1986-07-14 Antenna system Pending JPS6319904A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16528386A JPS6319904A (en) 1986-07-14 1986-07-14 Antenna system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16528386A JPS6319904A (en) 1986-07-14 1986-07-14 Antenna system

Publications (1)

Publication Number Publication Date
JPS6319904A true JPS6319904A (en) 1988-01-27

Family

ID=15809386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16528386A Pending JPS6319904A (en) 1986-07-14 1986-07-14 Antenna system

Country Status (1)

Country Link
JP (1) JPS6319904A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02168341A (en) * 1980-01-28 1990-06-28 Digital Equip Corp <Dec> Data processing system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02168341A (en) * 1980-01-28 1990-06-28 Digital Equip Corp <Dec> Data processing system
JPH0526225B2 (en) * 1980-01-28 1993-04-15 Digital Equipment Corp

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