JPS63195794U - - Google Patents
Info
- Publication number
- JPS63195794U JPS63195794U JP1987086825U JP8682587U JPS63195794U JP S63195794 U JPS63195794 U JP S63195794U JP 1987086825 U JP1987086825 U JP 1987086825U JP 8682587 U JP8682587 U JP 8682587U JP S63195794 U JPS63195794 U JP S63195794U
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- cooling fins
- ground layer
- front side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001816 cooling Methods 0.000 claims description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
Description
第１図は本考案の印刷配線板の一実施例を示す
断面図、第２図は従来の印刷配線板の一例を示す
断面図である。 ７……冷却フイン、８……接地層、３，１０…
…印刷配線板。
断面図、第２図は従来の印刷配線板の一例を示す
断面図である。 ７……冷却フイン、８……接地層、３，１０…
…印刷配線板。
Claims (1)
- 【実用新案登録請求の範囲】 (1) 表面側に冷却フイン７を設け、この冷却フ
イン７を印刷配線板１０の内部に形成された接地
層８に接続したことを特徴とする印刷配線板。 (2) 印刷配線板１０はフレキシブルプリント基
板より成ることを特徴とする実用新案登録請求の
範囲第１項記載の印刷配線板。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987086825U JPS63195794U (ja) | 1987-06-04 | 1987-06-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987086825U JPS63195794U (ja) | 1987-06-04 | 1987-06-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63195794U true JPS63195794U (ja) | 1988-12-16 |
Family
ID=30943487
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987086825U Pending JPS63195794U (ja) | 1987-06-04 | 1987-06-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63195794U (ja) |
-
1987
- 1987-06-04 JP JP1987086825U patent/JPS63195794U/ja active Pending