JPS63192886U - - Google Patents

Description

[Brief explanation of drawings]

FIG. 1 is a circuit block diagram showing an embodiment of the receiver circuit of the present invention, and FIG. 2 shows an embodiment of the remaining time detection timer means and remaining time notification means provided in the receiver circuit of FIG. FIG. 1: Mode switching circuit, 2: Set switch, 3
: Release switch, 4: Timer circuit, 5: Reset switch, 6: AND gate, 7: Receiving circuit, 8
: Security line, 9: Signal processing circuit, 10: Alarm section,
11: First timer, 12: Second timer, 13: Third timer, 14: First oscillator, 15: Second oscillator, 16: Third oscillator, 17: Sound generation circuit, 18
:Speaker.

Claims (1)

[Scope of Utility Model Registration Request] A delay set function that sets the security alert state after a certain period of time has passed after the crime prevention alert setting operation, and/or a detection output from an intruder detector connected to the crime prevention line. In a crime prevention receiver equipped with a delay function to issue a crime prevention alarm after a certain period of time has elapsed from the setting operation to the crime prevention alert state and/or after receiving the detection output from the intruder detector. A crime prevention receiver comprising: timer means for detecting the remaining time until a crime prevention alarm is issued; and notification means for notifying the remaining time detected by the timer means by acoustic output.