JPS6318936Y2 - - Google Patents
Info
- Publication number
- JPS6318936Y2 JPS6318936Y2 JP1982154907U JP15490782U JPS6318936Y2 JP S6318936 Y2 JPS6318936 Y2 JP S6318936Y2 JP 1982154907 U JP1982154907 U JP 1982154907U JP 15490782 U JP15490782 U JP 15490782U JP S6318936 Y2 JPS6318936 Y2 JP S6318936Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- drive circuit
- pulse
- electromagnetic
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000523 sample Substances 0.000 claims description 11
- 238000002347 injection Methods 0.000 claims description 9
- 239000007924 injection Substances 0.000 claims description 9
- 239000003990 capacitor Substances 0.000 claims description 6
- 230000008878 coupling Effects 0.000 claims description 6
- 238000010168 coupling process Methods 0.000 claims description 6
- 238000005859 coupling reaction Methods 0.000 claims description 6
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 10
- 229910052753 mercury Inorganic materials 0.000 description 10
- 238000001514 detection method Methods 0.000 description 7
- 101100007418 Caenorhabditis elegans cox-5A gene Proteins 0.000 description 6
- 239000004020 conductor Substances 0.000 description 6
- 230000005284 excitation Effects 0.000 description 5
- 230000005669 field effect Effects 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 101150108928 CCC1 gene Proteins 0.000 description 4
- 101150072497 EDS1 gene Proteins 0.000 description 4
- 230000005347 demagnetization Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000007257 malfunction Effects 0.000 description 4
- 239000013307 optical fiber Substances 0.000 description 4
- 101100328890 Arabidopsis thaliana COL3 gene Proteins 0.000 description 3
- 101150050425 CCC2 gene Proteins 0.000 description 3
- 101100328886 Caenorhabditis elegans col-2 gene Proteins 0.000 description 3
- 101000797623 Homo sapiens Protein AMBP Proteins 0.000 description 3
- 102100032859 Protein AMBP Human genes 0.000 description 3
- 101100328883 Arabidopsis thaliana COL1 gene Proteins 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 230000008030 elimination Effects 0.000 description 2
- 238000003379 elimination reaction Methods 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 230000004323 axial length Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Landscapes
- Measuring Leads Or Probes (AREA)
- Tests Of Electronic Circuits (AREA)
Description
【考案の詳細な説明】
本考案は、電子機器、特にデイジタル電子機器
の電源部に混入するインパルス性雑音が電子機器
の作動に及ぼす影響を定量的に測定する高周波ノ
イズシミユレータに関するものである。[Detailed description of the invention] The present invention relates to a high-frequency noise simulator that quantitatively measures the influence of impulsive noise that enters the power supply section of electronic equipment, particularly digital electronic equipment, on the operation of the electronic equipment. .
従来の高周波ノイズシミユレータは、パルスの
電圧、時間幅、位相、極性及び注入相等に応じて
スイツチの切換え及び同軸ケーブルの接続換え等
を手動的に行うように構成されているためスイツ
チの切換操作及び同軸ケーブルの接続換え操作に
比較的多くの時間と労力を要し非能率的である。 Conventional high-frequency noise simulators are configured to manually change switches and coaxial cable connections depending on the pulse voltage, time width, phase, polarity, injection phase, etc. The operation and reconnection of the coaxial cable require a relatively large amount of time and effort and are inefficient.
本考案は、パルスの電圧、時間幅、位相、極性
及び注入相等に対応するスイツチの切換え及び同
軸ケーブルの接続換え等をすべて自動的に行うよ
うに構成することにより、スイツチの切換え及び
同軸ケーブルの接続換え等を能率良く、正確に行
わしめてノイズ試験を迅速に行い得る高周波ノイ
ズシミユレータを実現することを目的とする。 This invention is configured to automatically change the switch corresponding to the pulse voltage, time width, phase, polarity, injection phase, etc. and change the connection of the coaxial cable. The purpose of the present invention is to realize a high-frequency noise simulator that can efficiently and accurately perform connection changes and perform noise tests quickly.
第1図は、本考案の一実施例を示す図で、AC
1は交流電源接続端子、AVRは定電圧装置、T
1は昇圧トランスで、例えば摺動接触片SCを摺
動することにより二次電圧を変化せしめ得るオー
トトランスより成る。PMは摺動接触片SCの駆動
モータで、例えばパルスモータより成る。EDP
はその駆動回路で、例えば直流電源及び高速電子
スイツチより成り、後述するコンピユータの中央
処理装置からの制御信号に応じた数のパルス信号
をパルスモータPMに送出する。T2は電源トラ
ンス、Dは整流用ダイオード、F1はリツプル除
去用フイルタ、SW1は極性転換用切換スイツチ
で、例えば自復型電磁スイツチより成る。EDS
1はその駆動回路で、例えば直流電源及び開閉ス
イツチより成り、コンピユータの中央処理装置か
らの制御信号に応じてスイツチSW1の駆動コイ
ルCOL1に励磁電流を供給する。Rは入力高抵
抗、CC1ないしCCnは同軸ケーブル、CR1ない
しCR(n−1)は同軸リレー、EDC1ないし
EDC(n−1)は各同軸リレーの駆動回路で、
EDS1と同様の構成である。MSWは開閉スイツ
チで、例えば水銀スイツチ
(MercuryWettedContact)より成り、駆動コイ
ルCOL2の励磁及び消磁に対応する可動接片の
変位及び復旧により開閉が行われる。EDMはそ
の駆動回路で、例えば周波数逓倍回路、プリセツ
トカウンタ、単安定マルチバイブレータ、高速開
閉スイツチ及び直流電源より成る。SW2は自復
型電磁切換スイツチ、COL3はその駆動コイル、
EDS2はその駆動回路で、EDS1と同様の構成
である。CCC1及びCCC2は接続用同軸ケーブ
ル、AC2は交流電源接続端子、F2は雑音除去
用フイルタ、HSは高周波除去回路で、例えば外
周に高周波損失物質を設けた導線より成る。C1
及びC2はパルス信号結合コンデンサ、TO1及
びTO2は出力端子で、同軸ケーブルCCO1及び
CCO2の各内部導体を介して被測定電子機器の
電源端子に接続される。CPUはコンピユータの
中央処理装置、KBVはパルス電圧設定回路、
KBPはパルス極性設定回路、KBWはパルス幅設
定回路、KBFはパルス周波数設定回路、KBPH
はパルス位相設定回路、KBMはパルス注入相設
定回路で、各設定回路は例えばキーボードより成
る。PB1ないしPBnは信号検出用プローブ、
EDDは誤動作表示器で、例えばブラウン管より
成る。 FIG. 1 is a diagram showing an embodiment of the present invention.
1 is AC power supply connection terminal, AVR is voltage regulator, T
Reference numeral 1 denotes a step-up transformer, which is, for example, an autotransformer that can change the secondary voltage by sliding a sliding contact piece SC. PM is a drive motor for the sliding contact piece SC, and is composed of, for example, a pulse motor. EDP
is its drive circuit, which is composed of, for example, a DC power supply and a high-speed electronic switch, and sends out a number of pulse signals to the pulse motor PM in accordance with a control signal from a central processing unit of a computer, which will be described later. T2 is a power transformer, D is a rectifying diode, F1 is a ripple removal filter, and SW1 is a polarity changeover switch, such as a self-restoring electromagnetic switch. EDS
Reference numeral 1 denotes the drive circuit, which is composed of, for example, a DC power supply and an on/off switch, and supplies an excitation current to the drive coil COL1 of the switch SW1 in response to a control signal from the central processing unit of the computer. R is input high resistance, CC1 or CCn is coaxial cable, CR1 or CR (n-1) is coaxial relay, EDC1 or
EDC (n-1) is the drive circuit for each coaxial relay,
It has the same configuration as EDS1. MSW is an opening/closing switch, for example, a mercury switch (Mercury Wetted Contact), which is opened and closed by displacement and restoration of a movable contact corresponding to excitation and demagnetization of the drive coil COL2. The EDM's driving circuit consists of, for example, a frequency multiplier, a preset counter, a monostable multivibrator, a high-speed open/close switch, and a DC power supply. SW2 is a self-recovering electromagnetic changeover switch, COL3 is its drive coil,
EDS2 is its drive circuit and has the same configuration as EDS1. CCC1 and CCC2 are coaxial cables for connection, AC2 is an AC power supply connection terminal, F2 is a noise elimination filter, and HS is a high frequency elimination circuit, which is made of, for example, a conductive wire provided with a high frequency loss material on the outer periphery. C1
and C2 are pulse signal coupling capacitors, TO1 and TO2 are output terminals, and coaxial cables CCO1 and
It is connected to the power terminal of the electronic device under test via each internal conductor of CCO2. CPU is the central processing unit of the computer, KBV is the pulse voltage setting circuit,
KBP is pulse polarity setting circuit, KBW is pulse width setting circuit, KBF is pulse frequency setting circuit, KBPH
is a pulse phase setting circuit, KBM is a pulse injection phase setting circuit, and each setting circuit consists of, for example, a keyboard. PB1 to PBn are signal detection probes,
EDD is a malfunction indicator, for example consisting of a cathode ray tube.
第2図は、前記プローブPB1ないしPBnの構
成の一例を示す断面図、第3図及び第4図は、そ
の電気的接続を示す結線図で、各図において、1
は検出端側の絶縁ホルダ、2はリング状突起、3
は金属針、4は絶縁支持筒、5はつば状突起、6
はスプリング、7は電界効果トランジスタ等より
成る検出素子、8は電界効果トランジスタ7のソ
ース電極の引出線、9は発光ダイオード等より成
る光源、10は電源、11は電源スイツチ、12
は光学繊維、13は受光側のホルダ、14は光検
出器、15はその出力取出用引出線、16は電
源、17は電源スイツチで、光検出器14の出力
取出用引出線15を中央処理装置CPUに接続す
ると共に電源スイツチ17を閉じ、電界効果トラ
ンジスタ7のソース電極の引出線8を被測定電子
機器におけるロジツク回路の共通線(地気)に接
続し、スプリング6の弾力に抗して絶縁支持筒4
を後退せしめ、金属針3の屈曲先端の内側をロジ
ツク回路における出力端のピンに接触せしめた
後、絶縁支持筒4を復旧前進せしめて金属針3の
屈曲先端の内側と絶縁支持筒4の先端の間にピン
をはさんで電源スイツチ11を閉じると、このピ
ンにおける信号又はノイズレベルに対応する電界
効果トランジスタ7の出力の大きさに応じて発光
ダイオード9が発光し、この光が光学繊維12を
介して光検出器14に入射し、その出力が引出線
15を介して中央処理装置CPUに導入記憶され
る。このプローブにおいては、光学繊維12によ
つて入出力間が電気的に遮断されているため中央
処理装置CPUの回路定数の影響がプローブを介
して被測定回路に及ぶおそれがないと共にプロー
ブを介して高周波ノイズが被測定回路に混入する
おそれもない等の利点を有する。 FIG. 2 is a sectional view showing an example of the configuration of the probes PB1 to PBn, and FIGS. 3 and 4 are wiring diagrams showing their electrical connections.
is an insulating holder on the detection end side, 2 is a ring-shaped protrusion, 3 is
is a metal needle, 4 is an insulating support tube, 5 is a collar-like projection, 6
7 is a spring, 7 is a detection element such as a field effect transistor, 8 is a lead wire of the source electrode of field effect transistor 7, 9 is a light source such as a light emitting diode, 10 is a power source, 11 is a power switch, 12
13 is an optical fiber, 13 is a holder on the light receiving side, 14 is a photodetector, 15 is a leader line for taking out the output thereof, 16 is a power source, 17 is a power switch, and the leader line 15 for taking out the output of the photodetector 14 is centrally processed. Connect it to the device CPU, close the power switch 17, connect the lead wire 8 of the source electrode of the field effect transistor 7 to the common line (earth) of the logic circuit in the electronic device under test, and resist the elasticity of the spring 6. Insulating support tube 4
is moved back and the inside of the bent tip of the metal needle 3 is brought into contact with the pin at the output end of the logic circuit, and then the insulating support tube 4 is restored and moved forward to connect the inside of the bent tip of the metal needle 3 and the tip of the insulating support tube 4. When the power switch 11 is closed with a pin in between, the light emitting diode 9 emits light according to the magnitude of the output of the field effect transistor 7 corresponding to the signal or noise level at this pin, and this light is transmitted to the optical fiber 12. The light enters the photodetector 14 via the lead line 15, and its output is introduced and stored in the central processing unit CPU via the leader line 15. In this probe, since the input and output are electrically isolated by the optical fiber 12, there is no risk that the circuit constants of the central processing unit CPU will affect the circuit under test through the probe. It has the advantage that there is no risk of high frequency noise entering the circuit under test.
第1図における端子AC1に交流電圧を加える
と定電圧装置AVRにおいて一定電圧に保たれ、
オートトランスT1で所要の高圧に昇圧された後
電源トランスT2を介してダイオードDに加えら
れ、その整流出力がフイルタF1、切換スイツチ
SW1及び高抵抗Rを介して同軸ケーブルCC1に
加えられる。中央処理装置CPUからの制御信号
に応じて駆動回路EDMの出力電流が駆動コイル
COL2に間欠的に流れて水銀スイツチMSWが開
閉すると、水銀スイツチMSWの開放時において
は、ダイオードDの整流電圧Eが高抵抗Rを介し
て同軸ケーブルCC1の分布容量分を充電する。
水銀スイツチMSWの出力側に接続された回路の
合成インピーダンス(以下終端インピーダンスと
称する)を同軸ケーブルCC1の特性インピーダ
ンスに等しく形成しておけば、水銀スイツチ
MSWが閉じた瞬間に終端インピーダンスに1/2
Eなる電圧が生じ、水銀スイツチMSWの入力側
においては電圧Eから1/2Eに降下するステツプ
電圧−1/2Eが発生して同軸ケーブルCC1を伝ぱ
んした後先端において正反射し、この正反射電圧
−1/2が水銀スイツチMSWを介して終端インピ
ーダンスの電圧1/2Eと合成され、終端インピー
ダンスの電圧は零となる。したがつて終端インピ
ーダンスには方形の試験用パルス信号が発生し、
その時間幅は同軸ケーブルCC1における電圧の
伝ぱん時間、即ち同軸ケーブルCC1の軸長によ
つて定まる。 When an AC voltage is applied to terminal AC1 in FIG. 1, the voltage is kept constant by the constant voltage device AVR.
After the voltage is increased to the required high voltage by the autotransformer T1, it is applied to the diode D via the power transformer T2, and the rectified output is passed through the filter F1 and the changeover switch.
The output current of the driving circuit EDM is applied to the driving coil CC1 via SW1 and a high resistance R.
When current flows intermittently through COL2 and the mercury switch MSW opens and closes, the rectified voltage E of the diode D charges the distributed capacitance of the coaxial cable CC1 via the high resistance R when the mercury switch MSW is open.
If the composite impedance (hereinafter referred to as the termination impedance) of the circuit connected to the output side of the mercury switch MSW is formed equal to the characteristic impedance of the coaxial cable CC1,
The moment the MSW is closed, the termination impedance is reduced to 1/2
A voltage E is generated, and a step voltage -1/2E, which drops from voltage E to 1/2E, is generated on the input side of the mercury switch MSW. This voltage propagates through the coaxial cable CC1 and is specularly reflected at the tip. This specularly reflected voltage -1/2 is combined with the voltage 1/2E of the terminating impedance via the mercury switch MSW, and the voltage of the terminating impedance becomes zero. Therefore, a square test pulse signal is generated in the terminating impedance.
The time width is determined by the voltage propagation time in the coaxial cable CC1, i.e., the axial length of the coaxial cable CC1.
次に端子AC2に交流電圧を加えると、フイル
タF2、高周波阻止回路HS、出力端子TO1及
びTO2、同軸ケーブルCCO1及びCCO2の各内
部導体を介して被測定電子機器の電源部に印加さ
れる。そして切換スイツチSW2の可動接片を接
点a側に切換えると、試験用パルス信号が結合コ
ンデンサC1を介して出力端子TO1に加えら
れ、同軸ケーブルCCO1の内部導体及び外部導
体を介して被測定電子機器に加えられる。切換ス
イツチSW2の可動接片を接点b側に切換える
と、試験用パルス信号は結合コンデンサC2、出
力端子TO2、同軸ケーブルCCO2の内部導体及
び外部導体を介して被測定電子機器に加えられ
る。したがつて試験用パルス信号は端子AC2に
加えられた交流電圧に重畳して被測定電子機器に
加えられることとなる。 Next, when an alternating current voltage is applied to the terminal AC2, it is applied to the power supply section of the electronic device under test via the filter F2, the high frequency blocking circuit HS, the output terminals TO1 and TO2, and the internal conductors of the coaxial cables CCO1 and CCO2. When the movable contact of the changeover switch SW2 is switched to the contact a side, a test pulse signal is applied to the output terminal TO1 via the coupling capacitor C1, and is applied to the electronic device under test via the internal conductor and external conductor of the coaxial cable CCO1. added to. When the movable contact of the changeover switch SW2 is switched to the contact b side, the test pulse signal is applied to the electronic device under test via the coupling capacitor C2, the output terminal TO2, and the inner and outer conductors of the coaxial cable CCO2. Therefore, the test pulse signal is superimposed on the alternating current voltage applied to the terminal AC2 and is applied to the electronic device under test.
そして本案ノイズシミユレータにおいては、パ
ルス電圧設定回路KBVに所要の電圧値に対応す
る設定値を設定すると、この設定値に対応するコ
ンピユータの中央処理装置CPUの出力信号によ
り駆動回路EDPを介してパルスモータPMが正逆
方向に歩進回転せしめられ、オートトランスT1
の摺動接触片SCが摺動して出力電圧を設定値に
対応せしめ、パルス極性設定回路KBPに所要の
パルス極性に対応する設定値を設定すると、この
設定値に対応する中央処理装置CPUの出力信号
により駆動回路EDS1を介して駆動コイルCOL
1の励磁又は消磁が制御され切換スイツチSW1
の切換又は復旧が行われ、パルス幅設定回路
KBWに所要のパルス幅に対応する設定値を設定
すると、この設定値に対応する中央処理装置
CPUの出力信号により駆動回路EDC1ないし
EDC(n−1)を介して同軸リレーCR1ないし
CR(n−1)のすべてが開放状態に保たれるか、
CR1のみが閉成するか、CR1とCR2、又はCR
1ないしCR3、……或はCR1ないしCR(n−
1)のすべてが閉成して同軸ケーブルCC1のみ
を入力高抵抗Rと水銀スイツチMSWの接続線に
分岐接続し、又は同軸ケーブルCC1、同軸リレ
ーCR1及び同軸ケーブルCC2の縦続接続回路を
RとMSWの接続線に分岐接続し、或はCC1ない
しCC3の縦続接続回路をRとMSWの接続線に分
岐接続し、……若しくはCC1ないしCCnの縦続
接続回路をRとMSWの接続線に分岐接続する。
(尚、縦続接続された同軸回路間にインピーダン
スの急変を生じないように構成すること勿論で、
これは同軸ケーブルCC1とCCC1の接続点、
CCC1とMSWの接続点、MSWとCCC2の接続
点についても同様である。)更にパルス周波数設
定回路KBFに所要のパルス周波数に対応する設
定値を設定すると、この設定値に対応する中央処
理装置CPUの出力信号により駆動回路EDMの高
速開閉スイツチが作動し、駆動コイルCOL2の
励磁及び消磁が繰返されて水銀スイツチMSWが
設定値に応じて開閉し、パルス位相設定回路
KBPHに所要のパルス位相に対応する設定値を
設定すると、この設定値に対応する中央処理装置
CPUの出力信号により駆動回路EDMのプリセツ
トカウンタに設定位相に対応する値がプリセツト
され、周波数逓倍回路において端子AC2に加え
られた交流電圧の周波数が逓倍され、この逓倍周
波数がプリセツトカウンタで計数され、その計数
値がプリセツト値に達した際の出力信号により単
安定マルチバイブレータが発振して高速開閉スイ
ツチを瞬間的に閉成し、駆動コイルCOL2を瞬
間的に励磁するから水銀スイツチMSWの開閉に
より生ずる試験用パルス信号の位相はプリセツト
カウンタのプリセツト値に対応したものとなる。
パルス注入相設定回路KBMに所要の注入相に対
応する設定値を設定すると、この設定値に対応す
る中央処理装置CPUの出力信号により駆動回路
EDS2を介して駆動コイルCOL3の励磁又は消
磁が制御され、切換スイツチSW2の可動接片を
接点a又はbの何れかに切換接触せしめる。 In the proposed noise simulator, when a setting value corresponding to the required voltage value is set in the pulse voltage setting circuit KBV, an output signal from the central processing unit CPU of the computer corresponding to this setting value is used to output the signal through the drive circuit EDP. The pulse motor PM is rotated step by step in the forward and reverse directions, and the autotransformer T1
When the sliding contact piece SC slides to make the output voltage correspond to the set value, and the pulse polarity setting circuit KBP is set to the set value corresponding to the desired pulse polarity, the central processing unit CPU corresponding to this set value is set. The output signal drives the drive coil COL through the drive circuit EDS1.
The excitation or demagnetization of 1 is controlled by the changeover switch SW1.
is switched or restored, and the pulse width setting circuit
When you set a setting value corresponding to the required pulse width in KBW, the central processing unit corresponding to this setting value
Drive circuit EDC1 or
Coaxial relay CR1 or
Are all CR(n-1) kept open?
Only CR1 closes, CR1 and CR2, or CR
1 to CR3, ... or CR1 to CR(n-
All of 1) are closed and only the coaxial cable CC1 is connected to the input high resistance R and mercury switch MSW connection line, or the cascade connection circuit of coaxial cable CC1, coaxial relay CR1 and coaxial cable CC2 is connected to R and MSW. , or connect the cascaded circuits of CC1 to CC3 to the connection line of R and MSW, ...or connect the cascaded circuits of CC1 to CCn to the connection line of R and MSW. .
(Of course, the configuration must be such that sudden changes in impedance do not occur between the cascade-connected coaxial circuits.
This is the connection point of coaxial cables CC1 and CCC1,
The same applies to the connection point between CCC1 and MSW and the connection point between MSW and CCC2. ) Furthermore, when a setting value corresponding to the required pulse frequency is set in the pulse frequency setting circuit KBF, the high-speed opening/closing switch of the drive circuit EDM is activated by the output signal of the central processing unit CPU corresponding to this setting value, and the high-speed opening/closing switch of the drive circuit EDM is activated. Excitation and demagnetization are repeated, and the mercury switch MSW opens and closes according to the set value, and the pulse phase setting circuit
When a setting value corresponding to the required pulse phase is set in KBPH, the central processing unit corresponding to this setting value
The output signal of the CPU presets the preset counter of the drive circuit EDM to a value corresponding to the set phase, and the frequency of the AC voltage applied to terminal AC2 is multiplied in the frequency multiplier circuit, and this multiplied frequency is counted by the preset counter. The output signal when the count value reaches the preset value causes the monostable multivibrator to oscillate, instantaneously closing the high-speed open/close switch, and instantaneously energizing the drive coil COL2, thereby opening/closing the mercury switch MSW. The phase of the test pulse signal generated by this corresponds to the preset value of the preset counter.
When the setting value corresponding to the required injection phase is set in the pulse injection phase setting circuit KBM, the drive circuit is activated by the output signal of the central processing unit CPU corresponding to this setting value.
Excitation or demagnetization of the drive coil COL3 is controlled via the EDS2, and the movable contact piece of the changeover switch SW2 is brought into switching contact with either contact a or b.
したがつて各設定回路の設定値を適当に変化せ
しめて試験用パルス信号の波高値、極性、周波数
又は位相、注入相を変えることにより被測定電子
機器に誤動作を生ぜしめる最低パルス電圧を求め
得るから被測定電子機器への電力供給線の何れか
一方と地気を介して混入するコンモンモードノイ
ズへの対策を効果的に講ずることが出来る。 Therefore, by appropriately changing the setting values of each setting circuit and changing the peak value, polarity, frequency or phase, and injection phase of the test pulse signal, it is possible to find the lowest pulse voltage that causes malfunction in the electronic device under test. It is possible to effectively take countermeasures against common mode noise that enters from the power supply line to the electronic device under test through the ground air and either side of the power supply line.
尚、切換スイツチSW2の可動接片を接点a
(又はb)側に切換えると共に出力端子TO1
(又はTO2)に接続された同軸ケーブルCCO1
(又はCCO2)の外部導体を同軸ケーブルCCO2
(又はCCO1)の内部導体に接続すると、試験用
パルス信号は電力供給線の2線を介して被測定電
子機器に加えられることとなるので、電力供給線
に混入するノルマルモードノイズの検討に好適で
ある。 In addition, the movable contact piece of changeover switch SW2 is connected to contact a.
(or b) side and output terminal TO1
Coaxial cable CCO1 connected to (or TO2)
(or CCO2) outer conductor of coaxial cable CCO2
(or CCO1), the test pulse signal will be applied to the electronic device under test via the two power supply lines, making it suitable for examining normal mode noise mixed into the power supply line. It is.
そして本案ノイズシミユレータにおいては、被
測定電子機器がロジツク回路を含む場合には、各
ロジツク回路の出力端にプローブPB1ないし
PBnの何れかのプローブの金属針3を圧着保持せ
しめ、試験用パルス信号を加えない場合における
各プローブの検出信号を中央処理装置CPUに記
憶せしめ、試験用パルス信号を加えた場合におけ
る各プローブの検出信号と比較し、その比較結果
を表示器EDDに表示せしめることにより被測定
電子機器に誤動作を生ぜしめる最低パルス電圧を
極めて容易確実に求めることが出来る。 In the proposed noise simulator, if the electronic device under test includes a logic circuit, probe PB1 or
The metal needle 3 of one of the probes of PBn is crimped and held, the detection signal of each probe when no test pulse signal is applied is stored in the central processing unit CPU, and the detection signal of each probe when a test pulse signal is applied is stored. By comparing it with the detection signal and displaying the comparison result on the display EDD, the lowest pulse voltage that causes a malfunction in the electronic device under test can be determined very easily and reliably.
第1図は、本考案の一実施例を示す図、第2図
ないし第4図は、本案ノイズシミユレータにおけ
る信号検出用プローブの構成の一例を示す図で、
AC1及びAC2:交流電源接続端子、AVR:定
電圧装置、T1:昇圧トランス、SC:摺動接触
片、PM:駆動モータ、EDP,EDS1,EDC1な
いしEDC(n−1),EDM及びEDS2:駆動回
路、T2:電源トランス、D:整流用ダイオー
ド、F1及びF2:フイルタ、SW1及びSW
2:切換スイツチ、COL1ないしCOL3:駆動
コイル、R:入力高抵抗、CC1ないしCCn,
CCC1,CCC2,CCO1及びCCO2:同軸ケー
ブル、CR1ないしCR(n−1):同軸リレー、
MSW:開閉スイツチ、HS:周波数阻止回路、
C1及びC2:結合コンデンサ、TO1及びTO
2:出力端子、CPU:コンピユータの中央処理
装置、KBV,KBP,KBW,KBF,KBPH及び
KBM:設定回路、PB1ないしPBn:プローブ、
EDD:誤動作表示器、1及び13:ホルダ、2
及び5:突起、3:金属針、4:支持筒、6:ス
プリング、7:電界効果トランジスタ、8及び1
5:引出線、9:光源、10及び16:電源、1
1及び17:電源スイツチ、12:光学繊維、1
4:光検出器である。
FIG. 1 is a diagram showing an embodiment of the present invention, and FIGS. 2 to 4 are diagrams showing an example of the configuration of a signal detection probe in the noise simulator of the present invention.
AC1 and AC2: AC power supply connection terminals, AVR: Constant voltage device, T1: Step-up transformer, SC: Sliding contact piece, PM: Drive motor, EDP, EDS1, EDC1 to EDC (n-1), EDM and EDS2: Drive Circuit, T2: Power transformer, D: Rectifier diode, F1 and F2: Filter, SW1 and SW
2: Selector switch, COL1 to COL3: Drive coil, R: Input high resistance, CC1 to CCn,
CCC1, CCC2, CCO1 and CCO2: Coaxial cable, CR1 or CR (n-1): Coaxial relay,
MSW: Open/close switch, HS: Frequency blocking circuit,
C1 and C2: coupling capacitors, TO1 and TO
2: Output terminal, CPU: Computer central processing unit, KBV, KBP, KBW, KBF, KBPH and
KBM: Setting circuit, PB1 or PBn: Probe,
EDD: Malfunction indicator, 1 and 13: Holder, 2
and 5: protrusion, 3: metal needle, 4: support tube, 6: spring, 7: field effect transistor, 8 and 1
5: Leader line, 9: Light source, 10 and 16: Power supply, 1
1 and 17: power switch, 12: optical fiber, 1
4: It is a photodetector.
Claims (1)
及びその駆動回路と、前記昇圧トランスの二次側
出力の整流回路と、この整流回路出力の極性転換
用電磁型切換スイツチ及びその駆動回路と、前記
極性転換用電磁型切換スイツチに接続される電磁
型開閉スイツチ及びその駆動回路と、前記極性転
換用電磁型切換スイツチと前記電磁型開閉スイツ
チの接続線から分岐されると共に複数個の同軸ケ
ーブルをそれぞれ同軸リレーを介して縦続接続し
て成る回路と、前記複数個の同軸リレー毎に設け
た駆動回路と、切換接片が前記電磁型開閉スイツ
チに接続され、一方の固定接点が第1の結合コン
デンサを介して被測定電子機器への電力供給線の
一方の線路に接続され、他方の固定接点が第2の
結合コンデンサを介して前記電力供給線の他方の
線路に接続されるパルス注入相切換用電磁型切換
スイツチ及びその駆動回路と、パルス電圧設定回
路、パルス極性設定回路、パルス幅設定回路、パ
ルス周波数設定回路、パルス位相設定回路並にパ
ルス注入相設定回路の各設定値に応じた制御信号
を前記駆動モータの駆動回路、前記極性転換用電
磁型切換スイツチの駆動回路、前記複数個の同軸
リレーの各駆動回路、前記電磁型開閉スイツチの
駆動回路並に前記パルス注入相切換用電磁型切換
スイツチの駆動回路に各別に送出するコンピユー
タの中央処理装置と、被測定電子機器におけるロ
ジツク回路の信号を検出するプローブと、試験用
パルス信号の印加時及び不印加時に前記プローブ
により検出され前記コンピユータの中央処理装置
に記憶された信号相互の比較結果の表示器と、前
記電力供給線の各出力端に接続された同軸ケーブ
ルとより成ることを特徴とするノイズシミユレー
タ。 A drive motor for a sliding contact piece in a step-up transformer and its drive circuit, a rectifier circuit for the secondary output of the step-up transformer, an electromagnetic changeover switch for changing the polarity of the output of the rectifier circuit and its drive circuit, and the polarity changer. An electromagnetic on-off switch connected to the electromagnetic changeover switch and its drive circuit, and a plurality of coaxial cables branched from the connection line between the electromagnetic changeover switch for polarity change and the electromagnetic on-off switch, and a coaxial relay. A drive circuit provided for each of the plurality of coaxial relays and a switching contact are connected to the electromagnetic switch, and one fixed contact is connected via a first coupling capacitor. An electromagnetic type for pulse injection phase switching, in which the fixed contact is connected to one line of the power supply line to the electronic device under test, and the other fixed contact is connected to the other line of the power supply line via a second coupling capacitor. The control signals according to the respective settings of the changeover switch and its drive circuit, pulse voltage setting circuit, pulse polarity setting circuit, pulse width setting circuit, pulse frequency setting circuit, pulse phase setting circuit, and pulse injection phase setting circuit are transmitted as described above. A drive circuit for the drive motor, a drive circuit for the electromagnetic changeover switch for polarity change, a drive circuit for each of the plurality of coaxial relays, a drive circuit for the electromagnetic open/close switch, and a drive circuit for the electromagnetic changeover switch for pulse injection phase change. A central processing unit of the computer that sends signals to each drive circuit separately, a probe that detects signals from the logic circuit in the electronic device under test, and a central processing unit of the computer that detects signals from the logic circuit in the electronic device under test, which are detected by the probe when the test pulse signal is applied and not applied. A noise simulator comprising: a display for comparing results of signals stored in the device; and a coaxial cable connected to each output end of the power supply line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15490782U JPS5958376U (en) | 1982-10-13 | 1982-10-13 | noise simulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15490782U JPS5958376U (en) | 1982-10-13 | 1982-10-13 | noise simulator |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5958376U JPS5958376U (en) | 1984-04-16 |
JPS6318936Y2 true JPS6318936Y2 (en) | 1988-05-27 |
Family
ID=30342277
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15490782U Granted JPS5958376U (en) | 1982-10-13 | 1982-10-13 | noise simulator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5958376U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5743259B2 (en) * | 1980-02-04 | 1982-09-13 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5743259U (en) * | 1980-08-20 | 1982-03-09 |
-
1982
- 1982-10-13 JP JP15490782U patent/JPS5958376U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5743259B2 (en) * | 1980-02-04 | 1982-09-13 |
Also Published As
Publication number | Publication date |
---|---|
JPS5958376U (en) | 1984-04-16 |
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