JPS63187433U - - Google Patents

Info

Publication number
JPS63187433U
JPS63187433U JP1987078387U JP7838787U JPS63187433U JP S63187433 U JPS63187433 U JP S63187433U JP 1987078387 U JP1987078387 U JP 1987078387U JP 7838787 U JP7838787 U JP 7838787U JP S63187433 U JPS63187433 U JP S63187433U
Authority
JP
Japan
Prior art keywords
calling number
paging receiver
sounding
compares
match
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987078387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987078387U priority Critical patent/JPS63187433U/ja
Publication of JPS63187433U publication Critical patent/JPS63187433U/ja
Pending legal-status Critical Current

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  • Mobile Radio Communication Systems (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案によるページング受信機の外観
図、同図aは正面図、同図bは上面図、同図cは
側面図、第2図は本考案の一実施例の全体の回路
構成図、第3図A〜FはPOCSAG方式のデー
タ構成図、第4図は通信制御回路の回路構成図、
第5図はCPUの詳細なブロツク構成図、第6図
は通信制御回路の動作フローチヤート及びタイミ
ングチヤート、第7図はRAMの構成の一部を示
す図、第8図は本実施例の処理動作を示すフロー
チヤート、第9図は報音制御部の詳細な回路図で
ある。 11……通信制御回路、12……CPU、15
……ブザー、45……ROM、46……RAM、
49……報音制御部。
Figure 1 is an external view of a paging receiver according to the present invention, Figure a is a front view, Figure b is a top view, Figure c is a side view, and Figure 2 is the overall circuit configuration of an embodiment of the present invention. Figures 3A to 3F are data configuration diagrams of the POCSAG method, Figure 4 is a circuit configuration diagram of the communication control circuit,
Fig. 5 is a detailed block configuration diagram of the CPU, Fig. 6 is an operation flowchart and timing chart of the communication control circuit, Fig. 7 is a diagram showing a part of the configuration of the RAM, and Fig. 8 is the processing of this embodiment. A flowchart showing the operation, FIG. 9 is a detailed circuit diagram of the alarm control section. 11...Communication control circuit, 12...CPU, 15
...Buzzer, 45...ROM, 46...RAM,
49...Sound control section.

Claims (1)

【実用新案登録請求の範囲】 呼出番号を受信し該呼出番号と予め設定されて
いる自己の呼出番号とを比較し一致したとき報知
駆動を行なうページング受信機において、 自己の呼出番号を検出したとき報音の音量を時
間の経過とともに増加する報音手段を有すること
を特徴とするページング受信機。
[Scope of Claim for Utility Model Registration] When a paging receiver that receives a calling number, compares the calling number with its own preset calling number, and performs a notification drive when they match, detects its own calling number. A paging receiver characterized by having a sounding means that increases the volume of the sounding sound over time.
JP1987078387U 1987-05-25 1987-05-25 Pending JPS63187433U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987078387U JPS63187433U (en) 1987-05-25 1987-05-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987078387U JPS63187433U (en) 1987-05-25 1987-05-25

Publications (1)

Publication Number Publication Date
JPS63187433U true JPS63187433U (en) 1988-11-30

Family

ID=30927285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987078387U Pending JPS63187433U (en) 1987-05-25 1987-05-25

Country Status (1)

Country Link
JP (1) JPS63187433U (en)

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