JPS63185354U - - Google Patents

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Publication number
JPS63185354U
JPS63185354U JP7556987U JP7556987U JPS63185354U JP S63185354 U JPS63185354 U JP S63185354U JP 7556987 U JP7556987 U JP 7556987U JP 7556987 U JP7556987 U JP 7556987U JP S63185354 U JPS63185354 U JP S63185354U
Authority
JP
Japan
Prior art keywords
matching resistor
noise removal
filter
removal circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7556987U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7556987U priority Critical patent/JPS63185354U/ja
Publication of JPS63185354U publication Critical patent/JPS63185354U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路図である。 FIG. 1 is a circuit diagram of an embodiment of the present invention.

Claims (1)

【実用新案登録請求の範囲】 (1) 映像検波出力信号を入力するエミツタホロ
ワ回路と、該回路の出力側に直列接続される第1
のマツチング抵抗と、該抵抗の後段に接続される
ハイカツトフイルタと、該フイルタの後段に接地
との間に接続される第2のマツチング抵抗とで構
成したことを特徴とするノイズ除去回路。 (2) 上記フイルタの遮断周波数が5MHzであ
ることを特徴とする実用新案登録請求の範囲第1
項記載のノイズ除去回路。 (3) 上記第2のマツチング抵抗が、第1のマツ
チング抵抗と同値であることを特徴とする実用新
案登録請求の範囲第1項又は第2項記載のノイズ
除去回路。 (4) 上記第2のマツチング抵抗が、その出力側
に直流カツト用コンデンサを介してアナログスイ
ツチを有することを特徴とする実用新案登録請求
の範囲第1項又は第2項記載のノイズ除去回路。
[Claims for Utility Model Registration] (1) An emitter follower circuit that inputs a video detection output signal, and a first emitter follower circuit that is connected in series to the output side of the circuit.
1. A noise removal circuit comprising: a matching resistor; a high-cut filter connected after the resistor; and a second matching resistor connected after the filter and ground. (2) Claim 1 of the utility model registration characterized in that the cut-off frequency of the filter is 5 MHz.
Noise removal circuit described in section. (3) The noise removal circuit according to claim 1 or 2, wherein the second matching resistor has the same value as the first matching resistor. (4) The noise removal circuit according to claim 1 or 2, wherein the second matching resistor has an analog switch on its output side via a DC cut capacitor.
JP7556987U 1987-05-20 1987-05-20 Pending JPS63185354U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7556987U JPS63185354U (en) 1987-05-20 1987-05-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7556987U JPS63185354U (en) 1987-05-20 1987-05-20

Publications (1)

Publication Number Publication Date
JPS63185354U true JPS63185354U (en) 1988-11-29

Family

ID=30921834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7556987U Pending JPS63185354U (en) 1987-05-20 1987-05-20

Country Status (1)

Country Link
JP (1) JPS63185354U (en)

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