JPS63173948U - - Google Patents
Info
- Publication number
- JPS63173948U JPS63173948U JP6816187U JP6816187U JPS63173948U JP S63173948 U JPS63173948 U JP S63173948U JP 6816187 U JP6816187 U JP 6816187U JP 6816187 U JP6816187 U JP 6816187U JP S63173948 U JPS63173948 U JP S63173948U
- Authority
- JP
- Japan
- Prior art keywords
- protocol conversion
- data
- memory access
- terminal device
- direct memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 230000005540 biological transmission Effects 0.000 claims 1
- 230000006870 function Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Bus Control (AREA)
- Communication Control (AREA)
Description
第１図は本考案の一実施例を示す構成図、第２
図は従来の一例を示す構成図である。
１０……通信プロトコル変換装置、１１……Ｄ
ＭＡコントローラ、１２……プロトコル変換回路
、１５……マイクロコンピユータ、１６……選択
回路、１７……ＲＡＭ、２０……パーソナルコン
ピユータ、２１……制御回路、２２……ＲＡＭ、
２３……シリアルポート。
Fig. 1 is a configuration diagram showing one embodiment of the present invention;
The figure is a configuration diagram showing an example of a conventional system. 10...Communication protocol conversion device, 11...D
MA controller, 12...Protocol conversion circuit, 15...Microcomputer, 16...Selection circuit, 17...RAM, 20...Personal computer, 21...Control circuit, 22...RAM,
23...Serial port.
Claims (1)
ド情報及び前記プロトコル変換回路からの状態表
示のためのインデイケーシヨン情報と送受信デー
タとを無手順通信プロトコルを有するデータ端末
装置との間でシリアル情報で送受信し、前記デー
タ端末装置がダイレクトメモリアクセス転送機能
を有する場合はダイレクトメモリアクセス転送に
よりデータを送受信することを特徴とする通信プ
ロトコル変換装置。 transmitting and receiving command information for operating a protocol conversion circuit, indication information for displaying a status from the protocol conversion circuit, and transmission/reception data as serial information with a data terminal device having a non-procedural communication protocol; A communication protocol conversion device characterized in that when the data terminal device has a direct memory access transfer function, data is transmitted and received by direct memory access transfer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6816187U JPS63173948U (en) | 1987-05-06 | 1987-05-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6816187U JPS63173948U (en) | 1987-05-06 | 1987-05-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63173948U true JPS63173948U (en) | 1988-11-11 |
Family
ID=30907722
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6816187U Pending JPS63173948U (en) | 1987-05-06 | 1987-05-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63173948U (en) |
-
1987
- 1987-05-06 JP JP6816187U patent/JPS63173948U/ja active Pending
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