JPS63173494A - Luminance signal separating circuit - Google Patents

Abstract

PURPOSE:To exactly separate a luminance signal even from a composite video signal by providing first and second median detection circuits and a low pass filter circuit, constituting a comb line filter for the luminance signal separation with an adding means, and removing a color signal component, the center of which is a color subcarrier wave, by a first median detection circuit. CONSTITUTION:A delay circuit 11 has a delay time, which is shorter by 1/3fsc than one horizontal scanning period H, and the delay circuits 12 and 13 have the same delay time by 1/3fsc. Besides, fsc is a color subcarrier wave frequency. When an original signal, as shown in a figure (a), is impressed to a terminal 10, the signals, as shown by waveforms b1, (b), b2, are brought into existence from the respective delay circuits 11, 12, 13 respectively. On the other hand, the first median detection circuit 16 outputs the waveforms like (d), (e) from respective color signals b1, (b), b2, and also, the second median detection circuit 21 outputs the same waveforms like (d), (e) from the waveforms (c), (b), (d). Both these signals (d), (e) contain the component of 3fsc. The low pass filter 26 removes the above mentioned component of 3fsc, and outputs the signal (f), the color signal component of which is completely removed.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a luminance signal separation circuit for separating a luminance signal from a composite video signal in a color television receiver, and particularly relates to a luminance signal separation circuit that separates a luminance signal from a composite video signal. The present invention relates to a luminance signal separation circuit that can effectively separate luminance and color signals even in the case of signals.

(Prior Art) Generally, color television broadcasting transmits two color components using subcarriers set within a video band. For example, in the NTSC system, the three primary color signals of red, green, and blue are converted into a luminance signal that indicates the brightness of the screen, and a color signal that has information on hue and saturation, and then transmitted.

The baseband video signal is, for example, 0 to 4.2 [MHz
A color signal (C signal) having a color subcarrier of, for example, 3.579545 MHz is inserted in a portion that overlaps with the high frequency band of the brightness signal (Y signal) of l.

In a color receiver that receives such transmitted color television signals, accurate separation of luminance signals and color signals is required. In particular, processing of luminance signal components near color signals is a problem. The technology for separating a composite video signal into a luminance signal and a chrominance signal involves extracting only the luminance component using a 3°58 [MHz] trap circuit, and using a 3.58±0.5
There is a method of extracting color signals using a [MH2] band-pass filter, and a method of separating a luminance signal and a color signal at the same time using a comb-shaped filter.

FIG. 7 shows an example of a luminance/color separation circuit using a comb filter. In this way, the comb filter is implemented by the adder 2. -Horizontal scanning period delay circuit 3. The composite video signal from the terminal 1 and one horizontal scanning period (1H
) and the delayed output using adder 2, the luminance signal is derived to output terminal 5, the signal from terminal 1 and the 1N delayed output are subtracted by subtractor 4, and the color signal is derived from output terminal 6. This is a circuit that does this.

FIG. 8 is a waveform diagram showing an example of operation waveforms of each part of the circuit of FIG. 7. When a composite video signal as shown in (a) is input to terminal 1, the delay circuit 3 outputs an IH signal as shown in (b).
i! ! The extended signal is output. In this 1('' delayed output, the color subcarrier has a phase inversion with respect to the original signal. Therefore, in the output of adder 2, the color signal is canceled out, and only the luminance component appears as shown in (C). However, , the amplitude of the luminance signal is doubled.On the other hand, in the output of the subtracter 4, the luminance component is canceled out, and only the color signal shown in (d) appears.

However, in the circuit shown in FIG. 7, if a luminance signal with different amplitudes in one horizontal scanning period (a so-called signal with no vertical correlation) is input to terminal 1 as shown in FIG. 9(a), the 1H delayed output will be as shown in FIG. As shown in FIG. 9(b), a brightness signal with an incorrect amplitude as shown in FIG. 9 is output to the terminal 5, and the vertical boundaries on the screen become blurred.

The circuit in FIG. 10 shows a configuration in which the above measures have been taken. 1st
0, the difference from the configuration in FIG. 7 is that another adder 7 is provided between the adder 2 and the luminance signal output terminal 5, and a A low-pass filter 8 and an inverting circuit 9 are provided, and the vertical detail signal obtained through the filter 8 is supplied to the adder 7 via the inverting circuit 9 and added to the output of the adder 2.

FIG. 11 is a waveform diagram showing the operation of the circuit of FIG. 10.

In FIG. 11, <a> is the color signal output appearing at the terminal 6. Only the low-frequency components of this signal are extracted by a low-pass filter 8, and further inverted by an inverting circuit 9.
The waveform shown in (b) is output. The output from the inverting circuit 9 is supplied as a vertical detail signal to the adder 7, where it is added to the luminance signal from the adder 2 (see FIG. 9C). A brightness signal corrected like a solid line waveform is obtained. Note that the dotted line is the luminance component before being corrected.

However, in the circuit shown in FIG. 10, the characteristics of the low-pass filter 8 pose a problem. For example, if the passband of the low-pass filter 8 is wide, the color signal component will leak and the color signal will be mixed into the luminance signal output.

Furthermore, if the characteristics of the low-pass filter 8 are narrow, the vertical detail signal from the inverting circuit 9 becomes dull as shown in FIG. 12 (waveform shown in FIG. 12), and the luminance signal appearing at the terminal 5 has a drawback that ringing occurs as shown in FIG. 12(C).

(Problems to be Solved by the Invention) When separating a composite video signal that has no correlation in luminance between adjacent horizontal scans, a conventional luminance/color separation circuit using a comb filter cannot produce a luminance signal with accurate amplitude. There was a problem that they could not be separated.

This invention solves the above problems and provides a composite video signal.

In particular, it is an object of the present invention to provide an r4 degree signal separation circuit that can accurately separate luminance signals even from signals having no vertical correlation.

[Structure of the Invention] (Means for Solving the Problems) This invention provides a method in which a composite video signal is input as an original signal,
a first signal delayed by one horizontal scanning period from the original signal;
A second signal that is 10-fsc ahead of the first signal in time;
delay means for respectively obtaining a third signal temporally delayed by 3 fsc; and addition means for performing addition processing on the original signal and the first signal to extract a luminance signal in which the color signal component is attenuated. and the above-mentioned No. 1. Second and third signals are each provided as inputs.

a first intermediate value detection circuit that detects and outputs a signal at a level exhibiting an intermediate value among these three signals; a signal obtained by level-shifting the output of the adding means to 1; the first signal; The output signal of the intermediate value detection circuit and the output signal of the intermediate value detection circuit are respectively supplied as inputs, and the intermediate value of these three signals? a second intermediate value detection circuit that detects and outputs a signal component;
A low-frequency j-wave circuit is provided for extracting a low-frequency component signal from the output of the second intermediate value detection circuit.

(Function) The addition means of the present invention constitutes a comb-shaped filter for separating luminance signals. Further, the first intermediate value detection circuit removes the color signal component centered on the color subcarrier.

Therefore, no color signal is output from the second intermediate value detection circuit. Also, for video signals without vertical correlation,
Due to the action of the second intermediate value detection circuit, no blurring of the screen occurs.

(Example) The present invention will be described below with reference to an example shown in FIG.

FIG. 1 is a circuit diagram showing an embodiment of a luminance signal separation path according to the present invention. However, although the signal processed by this circuit is an NTSC signal, it is of course possible to use a signal of another system.

In FIG. 1, a composite video signal a is supplied to a terminal 10. 11.12.13 is a delay circuit, and the delay circuit 11 has a delay time of 1/(3fs) from one horizontal scanning period (11-1).
Delay circuits 12 and 13 have the same delay time of 1/(3fsc).

Note that fSCu is the color subcarrier frequency. Therefore, the output of the delay circuit 12 is a signal delayed by 1H from the signal (original signal) at the terminal 10, and the output of the delay circuit 11 is l/(3fsc) from the output of the delay circuit 12. b1), and the output of the delay circuit 13 becomes a signal (hereinafter referred to as signal b2) delayed by 1/(3fsc) from the output of the delay circuit 12.

Of the outputs from each of the delay circuits 11, 12, and 13, the signal A is input to the adder 14 together with the original signal a. Adder 14
is an attenuation circuit 15 which amplifies these signals a and b and outputs them.
supply to. The attenuation circuit 15 is a circuit that outputs a signal C whose input level is halved.

On the other hand, the output of each delay circuit 11, 12, 13 is supplied to a first intermediate value detection circuit 16, respectively.

This circuit 16 is an intermediate value detection circuit that selects an output indicating an intermediate level among the outputs from each delay circuit 11, 12, 13, and maximum value output circuit (MAX) 17, 18.1.
9 and a minimum value output circuit (MIN) 20. The maximum value output circuits 17, 18, 19 each output a signal b1,
b and bl and signals b1 and bl are input, and the signal exhibiting the maximum level of each of the two inputs is selected and output. The minimum value output circuit 20 inputs the outputs from the maximum value output circuits 17, 18, and 19, selects the signal exhibiting the minimum level, and outputs the intermediate value signal d.

Next, 1]1 delay signal S, output signal C9 of the attenuation circuit 15
The output signal d of the intermediate value detection circuit 16 is input to the second intermediate value detection circuit 21. This second intermediate value detection circuit 2
1 consists of a maximum value output circuit 22.degree. 23.24 and a minimum value output circuit 25, similar to the configuration of the first intermediate value detection circuit 16 described above.

The maximum value output circuit 22 selectively outputs the signal exhibiting the maximum level among the signal C and the signal S. The maximum value output circuit 23 selectively outputs the signal exhibiting the maximum level from among the signals S and D. The maximum value output circuit 24 selects and outputs the signal exhibiting the maximum level from among the signal C and the signal d. The minimum value output circuit 25 selects the signal exhibiting the minimum level among the outputs of the maximum value output circuits 22, 23, and 24, and outputs the intermediate value signal e. This intermediate value signal e is guided to an output terminal 27 via a low-pass filter 26. Let the signal appearing at this output terminal 27 be f.

The luminance signal separation circuit according to this embodiment is configured as described above. Next, its operation will be explained with reference to FIGS. 2 and 3, but before that, the operation of the intermediate value detection circuit 16 will be described.

In the intermediate value detection circuit 16, the maximum value output circuit 17 selects and outputs the signal of the level that takes the maximum value among the signals b1 and b, and from this circuit 17, the waveforms (bl) and (b) are output.
The OR output waveform is extracted. Also, maximum value output circuit 1
Reference numeral 8 outputs the signal that takes the maximum value among the signals Tf3(b) and Tbl), and the OR output of the waves Tf3(b) and Tf3(b) is taken out from this circuit 18. Roughly maximum (1j1 output circuit 1
Reference numeral 9 outputs a signal having the maximum value of the signals b1 and bl, and the OR output of the waveforms (bl) and (bl) is taken out from this circuit 19. The minimum value output circuit 20 outputs a signal that takes the minimum value among the outputs from the maximum value output circuits 17, 18, and 19. (That is, get the AND output d). As a result, the output of the first intermediate value detection circuit 16 is AN
D output becomes d.

FIG. 4 is a waveform diagram showing the above operation, and waveform 8
1 and S2.83 are the signals bi and b, respectively.

Corresponding to bl, waveform S4 is the output of the maximum value output circuit 17, waveform $5 is the output of the maximum value output circuit 18, waveform S6 is the output of the maximum value output circuit 19, and waveform S7 is the output of the minimum value output circuit 2.
This output S7 corresponds to the output d of the intermediate value detection circuit 16, respectively. Note that the second intermediate value detection circuit 21 also operates in a similar manner.

FIG. 2 is a waveform diagram showing the separation performance of the luminance signal near the color subcarrier, and (Δ) shows how the color signal is removed.
(B) shows how the luminance signal is accurately extracted. The symbols indicating the waveforms in each of (A) and (B) correspond to the output signals of each product in FIG.

When the composite video signal supplied to the color signal processing terminal 10 includes a 3.58 MHz color signal, the original signal is represented by a waveform as shown in FIG. 2(a). One period of this waveform is 1/(fSC),
It is assumed to be an O-phase signal. When the above signals are applied to the terminal 10, signals as shown in waveforms (bl), (b), and (b2) appear from each delay circuit 11, 12, and 13, respectively. Waveform (bl) is delayed by [1H--L-] with respect to original signal a, waveform (b) is delayed by 11'' with respect to original signal a, and waveform (b2) is delayed with respect to original signal a. [1t++-L-]fsc Extends forever. Waveform (C) is the output after the signal a and the output of the adder horn 5, ie, the output of the adder 14, are adjusted to a predetermined level through the attenuation circuit 15.

Signal a and signal S are signals that are in an inverse relationship to each other, so that signal C becomes a DC-like signal. The reason why the signal a and the signal A have an inverted relationship is due to the relationship between the frequency ratio of the horizontal frequency and the color subcarrier. Waveform (b)' is a direct representation of waveform (b).

On the other hand, the first intermediate value detection circuit 16 outputs a signal having the solid line waveform shown in FIG. 2(x) as an intermediate value signal from the color signals bl, b, b2 as described above. Waveform (d) shows the output of the intermediate value detection circuit 16, and the signals fibl, b, b2
This corresponds to the solid line waveform in the waveform diagram (X) shown overlappingly. Such a signal contains a frequency of 3 fsc.

Further, the second intermediate value detection circuit 21 detects the waveform (C).

From (b) and (d), the waveform operation equivalent to that of the first intermediate value detection circuit 16 is performed, and a waveform as shown in (e) is output. This signal e also includes a 3fsc component.

The low-pass filter 26 removes the 3fsc component and (
As shown in f), a signal with color signal components completely removed can be output.

Regarding the processing method for the r4 degree signal near the chrominance signal, FIG. 2(B) shows the operation when a composite video signal containing a luminance signal component near the chrominance signal is input. in this case,
The relationship between the original signal a and the output of each delay circuit 11, 12, 13 is as shown in (bl), (b), and (b2), and the signal a and signal S are in phase. However, unlike the case of the color signal, the output of the attenuation circuit 15 has a waveform in which the amplitudes of the signals a and b are added together, as shown in waveform (C).

On the other hand, as in the case of the color signal, the first intermediate value detection circuit 16 outputs a luminance signal in which the 3fSC component remains, according to the operating waveform diagram (X).

However, the output of the second intermediate value detection circuit 21 has a waveform (e
), a waveform equivalent to the original signal appears. In this way, a luminance signal of 3.58 [MH7] can be taken out at the output terminal 27.

According to the circuit shown in FIG. 1, the color signal component leaking from the second intermediate value detection circuit 21 is 3°58 [MH2]
Since the center frequency is 3-8 higher than that of the low-pass filter 26, there is no problem even if there are variations in the characteristics of the low-pass filter 26. When a low-pass filter is used as in the past (see FIG. 9), the low-pass filter 8 is required to have high accuracy.

Next, the operation when processing a signal with a large vertical amplitude difference in the horizontal scanning amount and low vertical correlation will be described. First, the case where there is vertical correlation will be described. In addition, in Figure 3, (
△) is an operating waveform diagram when there is vertical correlation, (B1),
(B2) is an operation waveform diagram when vertical correlation is small. Further, the symbols indicating the waveforms in each figure correspond to the operation signals of each part in FIG. 1, as in the case of FIG. 2.

When there is vertical correlation If the signal input to terminal 10 has vertical correlation, the third
Waveforms (bl) and (b) in figure (A).

As shown in (b2), the 11-1 delayed signal from the delay circuit 12 has the same phase as the original signal a, and the delay circuit 11
The signal b1 from the 1H delay signal is 1/(3
fsc), and the output b2 from the delay circuit 13 is 1.
It is delayed by 1/(3fSC) with respect to the first delayed signal. Therefore adder 14. The output C that has passed through the attenuation circuit 15 becomes the same as the original signal a (the adder output whose amplitude has been doubled is halved by the attenuation circuit 15). Note that (b)′ is (b
) is shown as it is. Further, a signal having a waveform shown in (d) is extracted from the first intermediate value detection circuit 16.

As can be seen from the waveforms (c), (b), and (d), each input signal to the second intermediate value detection circuit 21 has the same phase and amplitude as the original signal a. The second intermediate value detection circuit 21 performs the same operation as described in FIG. 4 on each of these signals and outputs a signal e. The signal e also has the same phase and amplitude as the original signal a, as shown by waveform (e). Therefore, a signal equivalent to the original signal @a is output to the 4H element 27 (see waveform f).

Figures 3 (Bl) and (B2), which do not have vertical lines, show the case where the brightness level is different around 1F1. In addition, the waveform (a) of FIG. 3 (B1), and the waveforms (bl) and (b) of FIG. 3 (B2).

(B2), (b)', (d), (e), and (f) represent low rIi degree levels, respectively, and the waveforms (bl), (b), (B2), ( b)′, (d
).

(e), (f), and FIG. 3(f) each represent a high brightness level, while waveform (C) in FIG. 3(B1) and waveform (C) in FIG. 3(B2) represent an intermediate brightness level. It represents the level signal.

First, Figure (B1) shows a case where the original signal waveform (a') has lower luminance than the one-day delayed signal.

In this way, if there is a level difference between the original signal a and the 1+-1i11f extended signal, the output of the adder 14 will be the same as the level of the 1H delay signal, so the attenuation circuit 15 will delay the 1H delay signal. Outputs a signal whose signal size is halved (see waveform C). Even if the signal C has the above amplitude, the maximum value output circuit 22 in the second intermediate value detection circuit 21 has a waveform (
b)' In other words, a signal equivalent to the 1H delayed signal does not appear. The output d of the first intermediate value detection circuit 16 also outputs the same output (waveform d) as in the case of FIG. 3(A). Therefore, the output e of the second intermediate value detection circuit 21 outputs a signal waveform (f) representing a luminance level equivalent to that of the 1H delayed signal.

Next, FIG. 3 (B2) shows the case where the original signal waveform (a) is higher in brightness than the one-day delayed output waveform (b), and the outputs of each delay circuit 11, 12, and 13 are (bl), respectively. ,(b)
, (B2), which is different from that shown in FIG. 3 (B1). In this case, since the levels of the signal a and the signal S have simply been swapped, the output C of the attenuation circuit 15 is
It exhibits the same waveform (C) as in case B1). Further, the output of the first intermediate value detection circuit 16 has a waveform (d) indicating a low luminance level.

Here, the maximum value output circuit 22 in the second intermediate value detection circuit 21 selectively outputs the waveform (C), but since the output of the maximum value output circuit 23 outputs a signal with a low luminance level,
The minimum value output circuit 25 selects the maximum value output circuit 23, and the output e becomes a luminance signal with a low luminance level, as shown in waveform (e). This output e is passed through the low-pass filter 26
The same holds true after passing through (see waveform f).

As is clear from comparing the waveform (f) in FIG. 3 (B1) and the waveform (f) in FIG. 3 (B2), the levels of both are divided into a signal showing high brightness and a signal showing low brightness. clearly differentiated.

In this way, the present embodiment can prevent screen blurring at image boundaries even when receiving 1rIli degree signals without vertical correlation.

FIG. 5 is a circuit diagram showing another example of the configuration of the intermediate value detection circuit 16.21. This circuit is a reverse version of the maximum value output circuit and minimum value output circuit of the above embodiment. When such a circuit is used, for example, as the first intermediate value detection circuit 16, a signal b1 is supplied to the terminal D1, a signal S is supplied to the terminal D1, and a signal b2 is supplied to the terminal D2. Then, the minimum value output circuit 51 selects the signal that takes the minimum value from among the signals b1 and b. The minimum value output circuit 52 outputs a signal b
Select the signal that takes the minimum value of 2. Further, the minimum value output circuit 53 outputs a signal that takes the minimum value of the signal b1 and the signal b2. 54 is a maximum value output circuit, and each minimum value output circuit 5
Select the signal that takes the maximum value among the outputs from 4. Terminal E corresponds to the output terminal of signal d. Even if the maximum value output circuit and the minimum value output circuit are replaced in this way, the final output remains unchanged, only the order of selecting the signals explained in FIG. 4 is changed.

Also, Fig. 6 shows the maximum value output circuit 17, 18.1922.2
3.24 and a circuit diagram showing an example of a specific circuit of the minimum value output circuit 20.25. 6(a) is a maximum value output circuit, in which the collectors of transistors Q1 and Q2 are connected to the voltage source terminal Vcc, the emitters are connected to a reference potential point via a resistor R1, and both ends of the resistor R1 are connected. The signal generated in the output terminal PO is outputted through the output terminal PO. Each transistor Ql.

The terminals X and Y connected to the base of Q2 receive signals b1. b
, b2. A selected signal such as d is provided. FIG. 6(b) is an example of a minimum value output circuit. Since the minimum value output circuit used in the example is powered by three people, the transistor Q3
. The output is then output from both ends of the resistor R2 via the output terminal PO. Inputs are also supplied to the bases of the transistors Q3, Q4, and Q5 through terminals X, Y, and Z.

In addition, in this invention, the signal for the signal, b2
The lead and lag times are not limited to the values in the above embodiments, but are calculated using [11-(±3fsc) where n is an integer excluding multiples of 3.
] can be selected.

[Effects of the Invention] As described above, according to the present invention, there is an effect that a luminance signal, particularly a luminance signal near a color subcarrier, can be reliably separated from a composite video signal. In particular, there is an effect that the separation performance for signals with little vertical correlation is high.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the luminance signal separation circuit according to the present invention, FIGS. 2 to 4 are operation waveform diagrams of each part for explaining the invention in detail, and FIG. 5 is a circuit diagram showing an embodiment of the luminance signal separation circuit according to the present invention. A circuit diagram showing another example of the intermediate value detection circuit used, FIG. 6 is a circuit diagram showing an example of a specific circuit of the maximum value output circuit and minimum value output circuit used in this invention, and FIG. 7 is a comb-shaped circuit diagram. A circuit diagram showing a brightness/color separation circuit using a filter, Figure 8 is the 7th
Figure 9 is a waveform diagram showing the operation of the circuit in Figure 7 when a signal with no vertical correlation is input, Figure 10 is a waveform diagram showing the operation of the circuit in Figure 7. A circuit diagram showing an example of the circuit, Fig. 11 is a waveform diagram showing the operation of the circuit in Fig. 10, and Fig. 12 is a waveform diagram showing the operation of the circuit in Fig. 10 when a signal without vertical correlation is input. be. 11.12.13...Delay circuit, 14...Adder,
15... Attenuation circuit, 16... First intermediate value detection circuit, 17.18.19.22.23.24... Maximum value output circuit, 21... Second intermediate value detection circuit, 20, 25
...Minimum value output circuit. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 (G) (b) Figure 6 Figure 7 Figure 8 Figure 9 Figure 10

Claims (5)

[Claims] (1) A composite video signal is input as an original signal, and a first signal is delayed by one horizontal scanning period from this original signal, and a second signal is temporally advanced by (n/3fsc) from this first signal. and a third signal temporally delayed by (n/3fsc) from the second signal, where fSC is the color subcarrier frequency and n is the 3rd signal. one representing a positive integer excluding multiples; an adding means for adding the original signal and the first signal to extract a luminance signal with an attenuated color signal component; a first intermediate value detection circuit which is supplied with a third signal as an input and detects and outputs a signal at a level exhibiting an intermediate value among these three signals; and a signal obtained by level-shifting the output of the adding means. and a second intermediate value detection circuit, which is supplied with the first signal and the output signal of the intermediate value detection circuit as inputs, and detects and outputs a signal portion exhibiting an intermediate value among these three signals. and a low-pass filter circuit for extracting a low-frequency component signal from the output of the second intermediate value detection circuit. (2) The first and second intermediate value detection circuits input two different signals among the three signals supplied as inputs, compare them, and select a signal with a larger level. The first, second, and third maximum value output circuits that selectively output 2. The luminance signal separation circuit according to claim 1, further comprising a first minimum value output circuit that selectively outputs a small signal. (3) The first and second intermediate value detection circuits receive two different signals among the three signals supplied as input, compare them, and select the one with the smaller level. second, third, and fourth minimum value output circuits that selectively output signals; and a fourth maximum value output circuit that selectively outputs each output signal from the second, third, and fourth minimum value output circuits. A luminance signal separation circuit according to claim 1, characterized in that the circuit comprises: (4) The maximum value output circuit includes a plurality of NPN transistors each having a different signal input to its base, a collector connected to a common voltage source, and an emitter connected to a reference potential point via a common emitter resistance. 3. The luminance signal separation circuit according to claim 2, wherein the luminance signal separation circuit has a common emitter of each transistor and selectively outputs a signal of maximum level from a common emitter of each transistor. (5) The minimum value output circuit has a plurality of transistors each having different signals inputted to their bases, collectors commonly connected to a reference potential point, and emitters connected to a voltage source via a common emitter resistance. 3. The luminance signal separation circuit according to claim 2, wherein the luminance signal separation circuit is configured to selectively output a signal of the lowest level from common emits of each transistor.