JPS63171083A - Video signal reproducing device - Google Patents

Abstract

PURPOSE:To make the increase of the number of heads and the level supervision of reproducing a video signal unnecessary and to execute quick reproducing where a noise bar does not occur by controlling the write in a memory with the aid of the multiplying signal of a signal in the medium tracing period of a reproducing head. CONSTITUTION:In a two-head VTR the rotating phase of the head is detected and a head switching signal having the same period as the rotating period of the head is generated. With the switching signal the multiplying signal is generated in a control signal generation circuit 36 and with the multiplying signal a timing sequencer 18 controls the write and the read of a field memory 20. The circuit 36 generates a control signal for switching the kind of a refer ence pilot signal for tracking servo and outputs it to terminals 40 and 42. In the period when the multiplying signal of the head switching signal is 'H', the A/D converted 16 signal is written in the memory 20 and in the period of 'L' the signal in a corresponding section, accumulated in the memory 20 and reproduced one track scanning period before is read out and supplied to a D/A converter 22.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an apparatus for reproducing a video signal recorded on a large number of tracks formed on a recording medium, and in particular a mode for reproducing the video signal at high speed. It relates to a device having.

[Conventional technology]

When performing so-called high-speed playback in a rotary head type video playback device such as a video tape recorder (VTR), the playback head moves to a recording track formed diagonally on the magnetic tape, as shown in Figure 3 (al). In this case, for example, when a guard band is formed between tracks or when recording with an inclined azimuth in which the recording azimuth is different between adjacent tracks, the In the envelope of the resulting modulated video signal, small portions of the signal occur periodically as shown in FIG. output becomes extremely small.

Conventionally, as a method for improving the image quality of high-speed reproduction, two magnetic heads IOA and IOB having different azimuth angles are arranged close to each other, as shown in Fig. 4fa), and each head IOA and IOB is By outputting output only when scanning a track with the same azimuth as the head, I was able to obtain an image with less noticeable noise bars. (b) in Figure 4
) indicates the envelope of the output of the head IOA, and the same (C
) indicates the envelope of the output of the head 10B. Here, if the output of the head 10A and the output of the head IOB are selectively outputted as appropriate, a signal shown in FIG. 4(d) without an extremely low portion of the reproduction level of the signal is obtained.

Another way to improve image quality during high-speed playback is to monitor the level of the modulated video signal played back from the recording tape, store parts with higher levels in memory, and store parts with lower levels in memory. There is a way to read the data and use it alternatively. This method also allows )is
You can get an image without bars.

[Problem that the invention seeks to solve]

If the former conventional technology is applied to a so-called two-headed helical scanning type playback device, at least four heads are required, and two heads must be placed close to each other, making the head configuration complicated. Become. In addition, with the increase in the number of heads,
Since the rotary transformer also has multiple grooves and becomes large, it cannot be practically used in devices that use a small rotating head drum, such as an 8 mm VTR.

The latter conventional technology has the advantage that in principle, the speed of high-speed playback can be set arbitrarily, but from the viewpoint of ease of viewing, the speed is limited to some extent in practice, and the speed is limited to an integer multiple of the normal playback speed. Considering that it is difficult to maintain a constant speed when the speed is shifted, it is difficult to say that this is a great advantage. On the other hand,
A circuit to monitor the playback level of the modulated video signal is required, but since there are variations in the playback level due to the relative relationship between the magnetic tape and the head, and variations in the head itself, it is necessary to store it in the memory, especially when considering compatibility. It is difficult to set the threshold level for reading from the memory and the dark value level for reading from the memory.

The present invention was made to solve such problems,
It is an object of the present invention to provide a video signal reproducing device that realizes high-speed reproduction without generating noise or bars without increasing the number of heads at all and without requiring monitoring of the reproduction level of the reproduced modulated video signal. .

Means for Solving Problem c] The video signal reproducing apparatus according to the present invention is an apparatus for reproducing a video signal recorded on a large number of tracks formed on a recording medium together with a plurality of types of tracking control pilot signals. a memory having a high-speed playback mode for the video signal and temporarily storing the video signal read out from the recording medium by the playback head; and a multiplication of a periodic signal related to the trace period of the recording medium of the playback head. A multiplier circuit that generates a signal, a reference pilot switching circuit that switches the type of a reference pilot signal for tracking servo along with a biloft signal reproduced by a reproducing head according to the multiplier signal from the multiplier circuit and the periodic signal, and the multiplier circuit. The present invention is characterized by comprising a control circuit that controls writing to the memory in accordance with a multiplied signal from the memory.

[Effect]

In the present invention, by controlling writing to the memory using a signal multiplied by a periodic signal related to the medium tracing period of the playback head, at a timing when the level of the playback signal from the recording medium predicted by the multiplication signal is small, Signal writing to the memory is prohibited, and the reproduction signal is written to the memory at the timing when the level of the reproduction signal is high. Therefore, without providing a circuit for monitoring the level of the reproduced signal, high-speed reproduction without noise bars can be achieved as with the monitoring circuit. In addition, since the type of reference pyrode signal used for the tracking servo is switched according to the multiplied signal, the control target track is switched at an appropriately short cycle during playback, increasing the accuracy of the tracking servo, so that each recording track is On the other hand, the head trajectory has a constant relationship, and the writing to the memory and the tracking state of the head can be maintained in a desired relationship.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the main structure of an apparatus according to one embodiment. In this embodiment, the present invention is applied to a well-known rotating two-head helical scanning VTR.

In FIG. 1, an input terminal 12 receives a composite color video signal that is reproduced at high speed from a reproduction head (not shown). This reproduced composite color video signal is passed through a low pass filter (LPF) 14 to an A/D converter 16.
supplied to A/D converter 16 converts the input analog video signal to a digital video signal and provides it to timing sequencer 18 . The timing sequencer 18 exchanges this digital video signal with the field memory 20 according to the set operation mode, and also transfers the digital video signal to the D/A converter 2.
Supply to 2. In other words, the timing sequencer 18 uses the A/D converter 16 when input signals are input and when writing to memory.
The digital video signal from the memory 20 is supplied to the memory 20 and the D/A converter 22, and the digital video signal read from the memory 20 is transferred to the D/A converter 22 when the memory is continuously read out.

D/A converter 22 converts the digital video signal back into an analog composite color video signal and supplies it to output terminal 26 via LPF 24 . A known television device (not shown) or the like is connected to the output terminal 26.

Burst gate 28 extracts a color burst signal from the reproduced composite color video signal at input terminal 12 and supplies it to clock generation circuit 30. The clock generation circuit 30 generates a clock that is synchronized with this color burst signal and has a frequency that is a multiple of the subcarrier frequency of the chroma signal,
The clock is applied to A/D converter 16, timing sequencer 18 and D/A converter 22. The timing sequencer 18 uses this clock to
The RAS (row address strobe) signal and CAS (column address strobe) signal necessary for writing and continuing memory 20
strobe) signal, WE (write enable) signal,
OB (output enable) (supplies No. 8, etc. to the field memory 20 and address signal generation circuit 3
2 with an address clock signal. Address signal generation circuit 32 generates an address signal for field memory 20.

In a two-head VTR, a head switching signal having the same period as the rotational period of the rotary head is generated by detecting the rotational phase of the head, and the head used for reproduction is switched by the head switching signal.

This head switching signal is supplied to another input terminal 34,
The control signal generation circuit 36 generates various control signals from this head switching signal. First, a multiplied signal of the head switching signal is formed and supplied to the timing sequencer 18 via terminal 38. Timing sequencer 18 controls writing to and subsequent output from field memory 20 using this multiplied signal. Control signal generation circuit 36
secondly forms a control signal for switching the type of reference viroft signal for tracking servo, and connects terminal 4 to
Output at 0.42.

A specific configuration of the control signal generation circuit 36 is shown in FIG. The head switching signal input to the input terminal 34 is applied to one input of the phase comparison circuit 50.

The output of the phase comparison circuit 50 is applied to a voltage controlled oscillation circuit (VCO) 54 via an LPF 52.

The VCO 54 oscillates at a frequency according to the input voltage value and sends its output to the terminal 38. The output of VCO54 is also
The signal is also supplied to a frequency divider circuit 56, and the frequency-divided signal is applied to the other input of the phase comparator circuit 50. Therefore, the phase comparison circuit 50 outputs a voltage having a value corresponding to the phase difference between the head switching signal and the signal from the frequency dividing circuit 56. This circuit part constitutes a multiplication circuit using a so-called phase-locked loop (PLL), and a multiplication signal whose phase is synchronized with the head switching signal of the input terminal 34 is output to the terminal 38, and the multiplication ratio is determined by the frequency division circuit. It is equal to the reciprocal of the frequency division ratio of 46.

The output of the VCO 54 is also applied to one input of an exclusive NOR (NOR) circuit 58, and the other input of the circuit 58 is applied with the head switching signal at the input terminal 34. The output of the exclusive NOR circuit 58 is output to the terminal 40, and 1/2
It is also applied to the frequency dividing circuit 60. The 1/2 frequency divider circuit 60 is
The frequency is divided by 1/2 in synchronization with the rising edge of the input signal (or falling edge in the case of reverse direction search) and output to the terminal 42. The edge pulse generation circuit 62 receives the head switching signal at the input terminal 34, generates a pulse that becomes H for a short period of time from the rising or falling edge of the signal, and applies it to the recent control input of the 1/2 frequency divider circuit 60. The 1/2 frequency divider circuit 60 outputs an H signal while the preset control manual signal is at an H level.

However, assuming that the speed ratio between high-speed playback and normal playback is n, this is the case when I|n-11=4+3 (m is O or a positive integer), and when I|n-11=4+1, the head The rising pulse of the switching signal is applied to the recent control input of the 1/2 frequency divider circuit 60, and the falling pulse is applied to the reset control input.

Next, the operation of the circuits shown in FIGS. 1 and 2 will be explained using a quadruple speed forward search as an example. Figure 3 (al) shows the trace locus of the rotary head on the magnetic tape, and at this time the reproduced modulated video signal becomes as shown in Figure 3 (phantom). The signal 72 of the switching signal (tc) is its multiplied signal and the signal at the terminal 38,
The signal 74 in (d) is the output of the exclusive NOR circuit on the 5th day, (
The signal 76 of el is the output of the 1/2 frequency divider circuit 60, same (f)
A signal 78 indicates a recent signal to the 1/2 frequency divider circuit 60. Furthermore, as explained earlier, I n-11-4m+
In the case of 1, a reset signal is also applied to the 1/2 frequency divider circuit 60.

In FIG. 3, the multiplied signal 72 of the head switching signal 70 is H(
The peaks of the reproduced modulated video signal 80 (in the figure) correspond to the L (low) period of the multiplied signal 72, and the valleys of the reproduced modulated video signal 80 correspond to the L (low) period of the multiplied signal 72. The reason for this is as follows.That is, if the ratio of the speed of high-speed playback to the speed of normal playback is n, the scanning period of one pair of rotating disks, that is, the scanning period of two tracks, is 1n211 pairs. A reproduced modulated video signal with peaks and troughs is obtained.By the way, as is well known, tracking and
In a servo, during recording, a pilot signal is repeatedly recorded for each track in the order of f, , f2, f, , f, and during playback, the head trajectory is such that, for example, the frequency of the reproduced pilot signal and the frequency of the reference pilot signal match. Apply phase control to the capstan so that That is, the track control target track is recorded with a pilot signal having the same frequency as the reference pilot signal.

Here, for example, as shown in Table 1, the reference pilot signal is configured to be switched according to the combination of two types of signals A and B, and the signal 74 at the terminal 40 corresponds to the signal A, and the signal 76 at the terminal 42 corresponds to the signal B. Then, the tracking servo can be sequentially applied to each track according to the head trajectory shown in FIG. The description is omitted.The reproduced modulated video signal in this case becomes as shown in FIG.
The peaks will correspond, and the valleys will correspond to the period of L. Furthermore, by choosing n to be an even number, in the corresponding interval one track scanning period before the interval in which the rotating head scans a track of opposite azimuth (i.e., a track recorded by another rotating head), another rotating head Therefore, a normal reproduction signal can be obtained.

Therefore, for example, during the H period of the multiplied signal 72 of the head switching signal, the digital video signal from the A/D converter 16 is written into the field memory 20, and at the same time is supplied as is to the D/A converter 22 for reproduction. During the L period, the digital signal of the corresponding section that was reproduced one trunk scanning period ago, which is stored in the field memory 20, is read out and supplied to the D/A converter 22. Figure 3 (
In C), W indicates memory write and R indicates memory read. Through such operations, a composite color video signal free of noise bars is supplied to the output terminal 26.

FIG. 3(h) shows an example of the playback screen and its changes.

The numbers in FIG. 3(h) indicate the corresponding recording tracks on the magnetic tape.

The frequency dividing circuit 56 in FIG. 2 is a programmable frequency dividing circuit,
The frequency division ratio may be configured to change in accordance with the speed of high-speed reproduction. Then, the multiplication ratio of the PLL multiplier circuit of the control signal generation circuit 36 changes in accordance with the playback speed,
At the same time, the pilot signal switching control signals 74° 76 at the terminals 40° 42 also change according to the playback speed.
It can also be used as is for variable speed search.

Further, in the above embodiment, the multiplier circuit of the control signal generation circuit 36 was configured with a PLL, but instead of this, a clock (for example, a clock for address generation, etc.) is counted,
A configuration may be adopted in which a counter is used in which the polarity of an output signal is inverted when the count value reaches a preset value, and the counter is reset by a head switching signal. According to this configuration, the signal for controlling writing and reading of the memory 20 is not affected by jitter fluctuations of the head switching signal and has a constant period. In general, a phase-locked loop (P
A multiplier circuit using L L has poor transient response to shifter fluctuations in the reference signal, and when the amount of jitter is large, a shift in phase synchronization between the head switching signal and its multiplied signal may occur.

Therefore, in such a case, it is more advantageous to use a multiplier circuit using this counter.

Furthermore, in the above embodiment, when the multiplied signal is H, the A/D converter 1
6 is written in the memory 20 and supplied to the D/A converter 22, and when the multiplication signal is L, the data read from the memory 20 is supplied to the D/A converter 22. Using a memory module that can write and read at the same time, when the multiplication signal is H, the A/
The configuration may be such that data from the D converter 16 is written into the memory 20 and data is continuously output from the memory 20 at all times.

〔Effect of the invention〕

As can be easily understood from the above explanation, the video signal reproducing device of the present invention has a simple circuit configuration and can eliminate noise.
You can get a fast playback screen without bars.

Table 1

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of a main part of a video signal reproducing device according to the present invention, and FIG. 2 is a control signal generation circuit 3 of FIG. 1.
FIG. 3 is an explanatory diagram of the operation of FIGS. 1 and 2, and FIG. 4 is a diagram showing the trace locus of the reproducing head and its reproduction output during conventional high-speed reproduction. 10A, 10B--Reproducing magnetic head 12...--Reproducing signal input terminal 14--LPF 16--A/
D converter 18--Timing sequencer 20-Field memory 22-D/A converter 24--
-LPF 26--Output terminal 28-Burst gate 30--Clock generation circuit 32-Address generation circuit 34-Period signal input terminal 36-Control signal generation circuit 50--Phase comparison circuit 52--LPF 5
4--Voltage controlled oscillation circuit 56-- Frequency dividing circuit 58-
Exclusive NOR circuit 60-1/2 frequency divider circuit 62-edge pulse generation circuit Fig. 1 Fig. 2 Fig. 3

Claims (3)

[Claims] (1) A device for reproducing a video signal recorded on a large number of tracks formed on a recording medium together with a plurality of types of pilot signals for tracking control, which has a high-speed reproduction mode for the video signal, and has a high-speed reproduction mode for the video signal, and a memory that temporarily stores the video signal read out by the playback head from the playback head; a multiplier circuit that generates a signal multiplied by the periodic signal related to the trace period of the recording medium of the playback head; A reference pilot switching circuit that switches the type of reference pilot signal for tracking servo along with the pilot signal reproduced by the reproducing head according to the periodic signal, and writing to the memory is controlled according to the multiplication signal from the multiplication circuit. A video signal reproducing device comprising: a control circuit. (2) The apparatus according to claim (1), wherein the plurality of tracks are formed by azimuth recording, and the speed ratio of high-speed reproduction to normal reproduction is an even number. (3) The device according to claim (1) or (2), wherein the multiplication rate of the multiplier circuit is |n-1|, where n is the speed ratio of high-speed playback to normal playback. .