JPS63169137A - Differential signal transmission system - Google Patents

Abstract

PURPOSE:To increase bit number more than quantization width by making the time moving average value of a digital signal of m-bits to be transmitted and a digital signal after the bit processing equal to the time moving average value of a differential signal prior to the bit processing. CONSTITUTION:A transmission system is constituted of a quantizer 8, a demodulator 9, a delayer 12, a first adder 11, a digital filter 3, and a control circuit 10. The digital filter 3, assuming the value of a differential signal at a point of time is (dn) and the value of an output signal from the demodulator that demodulates an output m-bit digital signal from the quantizer at the same point of time is (yn), generates such a k-bit digital signal Zn as satisfying an equation I. As a result, the bit number of a signal can be increased to be practically higher than the bit number (quantization width) limited by the quantizer.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a differential signal transmission system, and in particular, obtains a differential signal from a 1-bit digital signal obtained by digitally modulating an analog signal, and The present invention relates to a differential signal transmission method in which a signal (m<k) is selected, transmitted, and received.

Wired transmission systems using telephone lines, audio/music recording/playback systems using semiconductor memory, etc., pulse code modulation signals (
In digital signal transmission systems such as mobile communication systems using PCM signals, there is a need for light resistance to long distance transmission,
In consideration of transmission band limitations and the like, digital signals are band compression coded and transmitted.

In this band compression encoding method, the first thing to do is to minimize the influence of quantization errors caused by bit reduction! The key point.

[Conventional technology]

As an example of a band compression encoding method, a predictive encoding method is conventionally known. This method predicts the next encoded sample value from past encoded sample values, and encodes and transmits the difference (difference signal) between the predicted value and the actual encoded sample value. For example, as an example of the ADPCM transmission method, L.

H, RO8ENTHAL et al.: “A n A 1lJOr
ithlfor LOCatin9 the Bea
Inning and End of fan uttera
nce Using ADPCM CodedS
peach”, Be1l System
Technical Journal, Vol.
53.11116. JUIV-August197
4. Others are known.

Further, the present inventor previously disclosed in Japanese Patent Laid-Open No. 56-168449 that the differential coefficient of the output signal of a first adder that adds the predicted signal and the output signal to be transmitted is detected, and this detected differential coefficient is appropriately set. We proposed a digital signal transmission method in which the weighting is multiplied by a coefficient, and the multiplied output signal is added and combined with the output signal of the first adder in a second adder to obtain a predicted signal.

According to this proposed method, it is possible to extremely easily set the coefficient to be multiplied without using any conventional extremely complicated and time-consuming statistical processing according to the nature of the input signal, and the DPCM (Differential PCM) Signal-specific overload noise.

It has features such as being able to improve granular noise.

In addition, the present inventor has also proposed the following as another digital signal transmission method:
JP-A-56-146313 proposed a transmission system in which the transmitting side controls the variable gain IR51 based on a prediction signal to compress the level of the analog conversion value and transmit it, and the receiving side expands the level.

According to this proposed method, it is possible to transmit a digital signal (modulated wave) with a quality higher than the conversion accuracy of an AD converter or an OA converter, and by using a signal prediction circuit, a control signal indicating level compression information can be transmitted. Since no signal transmission is required, it has the advantage of being able to transmit digital signals with fewer bits than conventional methods.

(Problem to be Solved by the Invention) However, in each of the digital signal transmission systems described above, the difference signal or modulated wave is transmitted with fewer bits than the input digital signal, so the effect of reducing the number of effective bits is , deterioration of transmission quality was inevitable.

The present invention was created in view of the above points, and is a difference method that solves the above problems by effectively increasing the number of bits than the number of bits (quantization width) limited by the quantizer. The purpose is to provide a signal transmission method.

(Means for Solving the Problems) The differential signal transmission method of the present invention generates a differential signal from a bit digital signal at an input with a quantization bit count of k bits, and In a method of selecting and transmitting a signal and decoding an original n-bit difference signal from a received m-bit signal, a quantizer, a demodulator,
A transmitting system is made up of an i1 delayer, a first adder, a digital filter, and a control circuit, and a receiving system is made up of a demodulating means and a second adder.

Here, the digital filter described above converts the value of the difference signal at a certain time into d. , the value at the same time of the output signal of the demodulator that demodulates the m-bit digital signal output from the E encoder is y
. When closed, the bit digital signal Z satisfies the following formula. generate.

[Effect]

The input bit digital signal is converted into a differential signal and then supplied to a quantizer via a digital filter, where m bits are selected and output for transmission, while a demodulator converts them to an analog equivalent level. is level IW
A is demodulated into a bit digital signal.

This demodulated digital signal is made into a prediction signal by a circuit section consisting of a first adder and a delay device, and is outputted to a differentiator.

On the other hand, in the receiving system, the m-bit digital signal is demodulated by the demodulation means to become a bit digital signal, which is then supplied to the second adder, where it is added to the past sample value and the difference signal is decoded. Ru.

Here, if we call the circuit section consisting of the quantizer i, mWA device, and a control circuit that outputs operation signals to these devices to shift bits in opposite directions mutually, the bit processing section, then the average over a certain period of time is Then, approximately the difference signal d
. and demodulated digital signal y. can be defined by the following relational expression.

N N Σd , -Σyn-i n-+ i -Of =0 The above expression means the difference signal d before being processed by the bit processing section. The time moving average output of is a bit-processed signal y.

It is assumed that it is approximately equal to the time moving average output of .

Therefore, the time moving average value of the output signal ("yo) is effectively equal to that of the input signal of the bit processing section (output signal of the digital filter) (zo), in other words, that of the difference signal (d,). You can think about it.

As a result, the signal (y) whose effective bit number has been reduced in the bit processing unit, that is, the transmitted m-bit digital signal (pn) before demodulation of (yo), is the input difference signal when viewed on time average. (d,).

From this, the following equation is obtained.

N N y = Σd , -Σyn-i (3n
, n-+.

+=O+=1 Rewriting equation ■ gives N N p −Σd , −Σyn−i c4) n, n
-1゜+=O+=Madashi, p=Q(z), y=Q-' (
po) n n n, Q
is a quantization function, and Q-1 is an inverse quantization function.

Therefore, the digital filter calculates (Zo) by performing digital filtering processing shown in equation (0) so that equation (4) can be obtained. In the present invention, this signal (2) is quantized by a quantizer to generate (po) in equation (4) and transmitted.

(Embodiment) The figure shows a block system diagram of an embodiment of the differential signal transmission method according to the present invention. In the figure, the number of quantized bits input to input terminal 1 is the input digital signal X at bit time nT (where T is the sampling time). is supplied to the differentiator 2, and is a predicted signal y, which will be described later. −1 and a difference signal d of k bits or more. is converted to

This difference signal d. is supplied to the arithmetic circuit 4 and delay device 51 in the digital filter 3. Digital filter 3
is an arithmetic circuit 4, a plurality of cascaded delay devices 5+
#52 e ”..., a plurality of cascade-connected delay devices 6+ #62 *... Delay devices 5+ e 52 m..., 6+, 62,...
each has a delay time equal to the one-marking time of the input digital signal xn, and the output signal of each delay device is
are also supplied respectively.

A demodulated digital signal y, which will be described later, is supplied to the delay device 61. The arithmetic circuit 4 receives the difference signal d. .

The respective output signals of the delay units 51*, 521, etc. are enhanced, and each output signal of the delay units 6+, 62,... is subtracted, thereby obtaining the bits shown in equation (1). Digital signal Z. generate. This digital signal 2o is sent to the bit processing section 7 as an output signal of the digital filter 3.
It is supplied to the dumpling machine 8 inside.

The bit processing section 7 includes a mother/son generator 8, a demodulator 9, and a signal prediction control circuit 10. The m-bit digital signal Np is quantized by the quantization WA8 and has a smaller number of quantized bits than the input bits. is taken out, and this digital signal pn is sent out to the transmission path, and is also supplied to the demodulator 9 and the signal prediction control circuit 10, respectively.

A demodulator 9 receives the transmitted digital signal p. The analog equivalent level is level demodulated so that the bits of the digital signal Y. shall be. The control operations of this demodulator 9 and the above-mentioned mother/son generator 8 are such that the bits are shifted in mutually opposite directions based on the output signal of the signal prediction control circuit 10.
The lI+ control algorithm is the above-mentioned Japanese Patent Application Laid-open No. 56-1
The method disclosed in No. 46313 may be used, or the method disclosed in the above-mentioned document BSTJ Vol. 53. N116. DD1
The method described in Nos. 127 to 1135 may also be used. Since these control algorithms are well known, their explanation will be omitted.

Next, the configuration and operation of the receiving system will be explained. In the figure, the transmitted m-bit digital signal port is the digital signal q. After being received, the signal is supplied to the demodulator 13 and the signal prediction control circuit 14, respectively. The predicted signal obtained by the signal prediction control circuit 14 is supplied to the demodulator 13,
Here, a demodulated digital signal rn of bits or more is obtained.

Demodulated digital signal r. are supplied to the adder 15, where they are sequentially cumulatively added, so that the output terminal 16 receives the original bit difference signal S. is decrypted and extracted.

Here, in this embodiment, the digital signal p is expressed by the above equation (4). is sent and received, but the meaning of equation (4) is V
=d + (dn-1-yn-1) +n (d n-2-yn-2) +・+ (d o-, -y
n-N). Here, by the digital filtering process of the digital filter 3, for example, δ1+62 0, δ1+δ
2+δ3yuO9..., δ1+δ2+δ3+...+δ
Since N can be determined as 0, it is possible to make y and dn equal on a time average. Therefore, the transmitted digital signal p corresponding to the quantized signal of the digital signal yo also becomes equal to the difference signal d.

In other words, the signals p and y have their effective bit numbers reduced by the bit processing unit 7. Since is approximately equal to the difference signal dn on a time average basis, the hanging error is caused by reducing the number of hanging bits in the bit processing unit 7 from n bits to m bits by (km) bits. This means that it almost never occurs on a time average.

However, in reality, the quantization level was improved by about 2 bits per pit compared to the conventional ADPCM method. The method for evaluating and measuring the effect of improving the quantization level is based on a document already disclosed by the present inventor (Masao Kasuga: "About improving the resolution of D/A conversion system", Journal of the Acoustical Society of Japan, Vol. 42, No. 5 (1988).
6) Since it can be performed in the same manner as the computer simulation in ), detailed explanation thereof will be omitted.

(Effects of the Invention) As described above, according to the present invention, the m-bit digital signal to be transmitted and the time-moving average value of the digital signal after bit processing obtained by suspending it and the bit-processed digital signal are Since a digital filter is used to impart a predetermined characteristic so that the time-moving average values of the previous difference signals are equal to each other, the number of bits can be effectively reduced from the 11J limited number of bits (ffi conversion width). Can increase traditional ADP
The quantization level can be improved by about 1 to 2 bits compared to the CM method. Therefore, if the signal quality is the same as before, the difference signal can be generated with about 1 to 2 bits fewer quantization pits than before. It also has the advantage of being able to improve signal quality by 6 to 12 cE in terms of S/N ratio if the number of quantization bits (number of transmission bits) is the same as the conventional one.

[Brief explanation of the drawing]

The figure is a block system diagram showing an embodiment of the system of the present invention. 1...Digital signal input terminal, 2...Differentiator, 3
...Digital filter, 4...Arithmetic circuit, 7...
-Bit processing unit, 8... quantizer, 9, 13... demodulator, 10.14... signal prediction control circuit, 11.15
...Adder, 12...Delay device. Patent Applicant: Japan Victor Co., Ltd. Procedural Book (Method) April 218, 1988 1. Relationship with the case indicated Patent Applicant Address: 3-12 Moriya-cho, Kanayō-ku, Yokohama-shi, Kanagawa Prefecture 221 Name (432) Victor Japan Co., Ltd. Representative Director and President Kunio Kakiki 4 Address of agent 5-7 Kojimachi, Chiyoda-ku, Tokyo 102 March 31, 1986 (shipment date) 6. Column for brief explanation of drawings and drawings. 7. Contents of amendment (1) In the specification, "Figure" on page 15, line 6 has been changed to "Figure 1"
and correct it. ■ Correct the drawing as shown in the attached sheet.

Claims (1)

[Claims] From an input k-bit digital signal with a quantization bit count of k bits, a predicted signal one sample earlier is generated, and corresponds to the difference between the input k-bit digital signal and the predicted signal. A k-bit difference signal is extracted from a subtractor, m (where m<k) bits in the difference signal are selected and transmitted, and the original k-bit difference signal is extracted from the received m-bit signal. The differential signal transmission method for decoding includes a quantizer that sends out the m-bit digital signal, and inverse quantization of the output signal of the quantizer so that the analog equivalent level is demodulated to generate a k-bit digital signal. a demodulator which has a delay time of one sample time and which generates the predicted signal and supplies it to the differentiator; , a first adder that supplies the addition signal to the delay device, and a value of the output difference signal of the difference device at a certain time as d_n,
When the value of the output signal of the demodulator at the same time is y_n, generate a k-bit digital signal Z_n that satisfies the formula ▲There are mathematical formulas, chemical formulas, tables, etc., and supply it to the quantizer. a digital filter; and a control circuit to which the m-bit digital signal sent from the quantizer to the transmission path is branched and supplied, and outputs an operation signal that causes the quantizer and the demodulator to bit shift in mutually opposite directions. A transmitting system is constructed by the following: demodulating means for demodulating the received m-bit digital signal into a k-bit digital signal; and a second demodulating means for adding the bit digital signal to the output of the demodulating means and decoding the difference signal. A differential signal transmission method characterized by a receiving system configured with an adder.