JPS6316789A - Color demodulation circuit - Google Patents

Abstract

PURPOSE:To adjust the set condition of a phase shifting unit at any time by adding a chrominance signal and a signal which is obtained by phase shifting the chrominance signal through the phase shifting unit to two input multiplication detectors respectively and controlling the phase shifting unit with the output signal of the multiplication detector. CONSTITUTION:The chrominance signal and the signal which directly passes through the signal and the phase shifting unit 1 are added to the respective inputs of the first multiplication detector 2 and the second multiplication detector 3 and the first multiplication detector 2 detects for the duration of a burst gate pulse to generate a burst detection output. From the burst detection output a DC voltage is detected and inputted in a voltage comparison circuit 6 with a reference voltage generated by a reference voltage generation circuit 5. The output of the voltage comparison circuit 6 is generated when the inputted DC voltage, that is, the DC voltage corresponding to the detected output of the first multiplication detector 2 is compared with the specified reference voltage and it exceeds the specified reference voltage, and the output of the circuit 6 makes a capacity control circuit 7 start. Thus when the capacity control circuit 7 is made to start the variable capacity in the phase shifting unit 1 can be adjusted to a desirable capacity value.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a color demodulation circuit used in a color television receiver, and more particularly to a color demodulation circuit used in a SECAM color television receiver. It is something.

In a conventional SECAM color television receiver, the carrier color signal is the same as the signal that sends the R-Y axis components on the chromaticity diagram.
The signal for sending the B-Y axis components is a line sequential signal that is sent alternately for each horizontal scanning line. A signal that sends the R-Y axis component (DR multiplied signal is a signal that sends the R-Y axis component to the 4.40MHz carrier wave
The frequency is modulated by an amount proportional to the Y-axis component. on the other hand,
Signal to send B-Y axis component (DB double signal is 4.25MH
The frequency of the z carrier wave is modulated by an amount proportional to the BY axis component. In order to demodulate this carrier color signal, as shown in the block diagram of FIG. The signals detected during the burst gate pulse period are inputted in parallel to the first multiplicative detector 2 and the second multiplicative detector 3, respectively, and the signals detected during the burst gate pulse period, the so-called A burst detection output is obtained from the second multiplier detector 3, and a line-sequential color difference output is obtained from the second multiplier detector 3, respectively. The phase shifter 1 includes a coil, a capacitor, and a resistor, and the demodulated signal is extracted as a sine wave function with respect to frequency, particularly by using a linearly changing region. In order to properly perform this demodulation, it is necessary to adjust the amount of phase shift of the phase shifter 1. Conventionally, this adjustment of the amount of phase shift was performed by adjusting the 4.40 MHz DR multiplied signal 4.2 while observing the output of the second multiplier detector 3.
This was done by manually adjusting the variable capacitance in the phase shifter 1 so that each DC voltage demodulated from the 5 MHz DB signal was obtained at a predetermined relative value.

Problems to be Solved by the Invention However, conventional color demodulation circuits deviate from their initial settings due to temperature changes or changes over time, and often require readjustment.

The present invention provides a color demodulation circuit that does not require manual adjustment.

Means for Solving the Problems The present invention uses a two-input multiplier detector to convert a carrier color signal and a signal obtained by passing the carrier color signal through a phase shifter whose phase shift amount changes depending on the frequency. The color demodulation circuit is provided with means for controlling the phase shifter with an output signal of the multiplicative detector when the multiplicative detector is put into use during a burst gate pulse period as each input. The means for controlling the phase shifter include
It is optimal to use a capacitance control circuit that uses the output signal of the multiplicative detector as a control signal, thereby automatically adjusting the variable capacitance in the phase shifter.

According to the present invention, a carrier color signal and a signal obtained by passing the carrier color signal through a phase shifter and having its phase shifted are respectively applied to a two-input multiplier detector, and the output signal of the multiplier detector is used to input the carrier color signal to the phase shifter. Since the phase shifter is controlled, the setting conditions of the phase shifter can be adjusted at any time.

Example Next, the present invention will be described in detail with reference to examples.

FIG. 1 is a block diagram of an embodiment of the present invention. The direct signal of the carrier color signal and the signal passed through the phase shifter 1 are respectively applied to the first multiplicative detector 2 and the second multiplicative detector 3. The first multiplicative detector 2 is
Detection is performed during the burst gate pulse period to generate a burst detection output. Therefore, a DC voltage is detected by the DC detection circuit 4 from this burst detection output, and this DC voltage is input to the voltage comparison circuit 6 together with the reference voltage generated by the reference voltage generation circuit 5. This voltage comparison circuit 6
The output is generated when the input DC voltage, that is, the DC voltage corresponding to the detection output of the first multiplier detector 2, is compared with a predetermined reference voltage and exceeds the predetermined reference voltage. The capacity control circuit 7 is activated. When this capacitance control circuit 7 is activated, it adjusts the variable capacitance within the phase shifter 1 to a desired capacitance value. Note that a variable capacitance diode can be used as the variable capacitor.

FIG. 2 is a frequency-output voltage characteristic diagram of the first multiplicative detector 2 and the second multiplicative detector 3. Characteristic I is when the center frequency of adjustment is shifted to the lower frequency side, characteristic ■ is Similarly, the center frequency is a DR multiplied signal carrier (4.40MHz)
and the carrier wave (4.25MHz) of the DB signal (approximately 4.25MHz).
32 MHz) and characteristic (2) are typical examples of the same case (where the center frequency is shifted to the high frequency side).

FIG. 3 shows the output voltage of the first multiplicative detector 2 in the frequency-output voltage characteristics shown in the second diagram, that is, the characteristics! , characteristics■
and characteristic (2) are shown in comparison with the reference voltage Vo.

The output of the first multiplicative detector 2 is detected at the period of the burst signal a, and is detected at a frequency of 4.40 MHz for each horizontal scanning line.
and 4.25M7 are detected, so the output waveform 1a is obtained for characteristic I, and the output waveform 11a is obtained for characteristic (■).

In characteristic (2), each time-series waveform of the output waveform ma appears. In the actual circuit configuration, the characteristic H in Fig. 2 is
The initial conditions are set so that the output voltage of the first multiplier detector 2 is obtained based on Make sure the distance is even.

In this state, the DC voltage detected by the DC detection circuit 4 has an average value of zero, and therefore the operations of the voltage comparison circuit 6 and the capacity control circuit 7 remain stationary. Next, when the phase shift amount of the phase shifter 1 deviates from the initial setting value, a fluctuation occurs between the two human input signals of the first multiplier detector 2, and the output voltage of the first multiplier detector 2 changes from the output shown in FIG. As shown in waveform 1a or waveform 111a, either the positive or negative voltage changes to become larger.

As a result, the DC voltage detected by the DC detection circuit 4 moves to the positive or negative side from the reference voltage Vo. At this time, the voltage comparator circuit 6 operates, and the capacitance control circuit 7 is activated, and the variable capacitance of the phase shifter 1 is controlled by the capacitance control circuit 7 to increase the capacitance value or move toward the capacitance value range. In this way, the phase shift amount of the phase shifter 1 is returned to the initial setting value.

When the phase shift amount of the phase shifter 1 is automatically adjusted to a constant set value, the output of the second multiplicative detector 3, that is, the line-sequential color difference output is also stable, and the function of the color demodulation circuit is stable. maintained.

Effects of the Invention According to the present invention, the carrier color signal is passed through a phase shifter whose phase shift amount changes depending on the frequency, and the signal and the original carrier color signal are input to the multiplicative detector, and the multiplicative detector The DC component of a predetermined output of the phase shifter can be detected and the amount of phase shift of the phase shifter can be automatically adjusted thereby, making it easy to stabilize the function of the color demodulation circuit that demodulates color difference signals from these carrier color signals. achieved.

[Brief explanation of the drawing]

FIG. 1 is a configuration block diagram of an embodiment of the present invention, FIG. 2 is a characteristic diagram of the embodiment, and FIG. 3 is a poem sequence output waveform diagram of the embodiment.
FIG. 4 is a block diagram of a conventional example. 1... Phase shifter, 2... First multiplicative detector, 3... Second multiplicative detector, 4...
DC detection circuit, 5...Reference voltage generation circuit, 6.
... Voltage comparison circuit, 7 ... Capacity control circuit. Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2 Figure 3 Figure 4

Claims (2)

[Claims] (1) A carrier color signal and a signal obtained by passing the carrier color signal through a phase shifter whose phase shift amount changes depending on the frequency are input to a two-input multiplicative detector, and the multiplicative detector is A color demodulation circuit comprising means for controlling the phase shifter with an output signal of the multiplicative detector when activated during a burst gate pulse period. (2) The means for controlling the phase shifter is activated by a DC detection circuit that receives the output signal of the multiplicative detector, a voltage comparison circuit that compares the output of the DC detection circuit with a reference voltage, and the output of the voltage comparison circuit. A color demodulation circuit according to claim (1), comprising a capacitance control circuit.